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公开(公告)号：US08344524B2
公开(公告)日：2013-01-01
申请号：US11425155
申请日：2006-06-20
申请人： Chiu-Ming Chou , Shih-Hsiung Lin , Mou-Shiung Lin , Hsin-Jung Lo
发明人： Chiu-Ming Chou , Shih-Hsiung Lin , Mou-Shiung Lin , Hsin-Jung Lo
CPC分类号： H01L24/49 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2224/04042 , H01L2224/05073 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05639 , H01L2224/05644 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/45015 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/48257 , H01L2224/4845 , H01L2224/48465 , H01L2224/48639 , H01L2224/48644 , H01L2224/48669 , H01L2224/48673 , H01L2224/48739 , H01L2224/48769 , H01L2224/48773 , H01L2224/48839 , H01L2224/48844 , H01L2224/48873 , H01L2224/4903 , H01L2224/73265 , H01L2224/78301 , H01L2224/85 , H01L2224/85045 , H01L2224/85203 , H01L2224/85205 , H01L2924/00014 , H01L2924/01006 , H01L2924/01012 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/05042 , H01L2924/10329 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/78 , H01L2924/00 , H01L2224/48869 , H01L2224/48744 , H01L2924/00015
摘要： This invention provides a wire bonding method, comprising providing an integrated circuit (IC) die having thereon a passivation layer and a plurality of first bonding pads exposed by respective openings in the passivation layer; forming a polymer layer on the passivation layer; forming an adhesive/barrier layer on the polymer layer; forming a metal pad layer on the adhesive/barrier layer; bonding a wire onto the metal pad layer to form a ball bond thereon; and after forming the ball bond on the metal pad layer, running the wire so as to contact the wire with a second bonding pad and forming a wedge bond thereto.
摘要翻译： 本发明提供一种引线接合方法，其包括提供其上具有钝化层的集成电路（IC）管芯和由钝化层中的相应开口暴露的多个第一接合焊盘; 在钝化层上形成聚合物层; 在聚合物层上形成粘合/阻挡层; 在粘合/阻挡层上形成金属垫层; 将金属线接合到金属垫层上以在其上形成球接合; 并且在所述金属焊盘层上形成所述焊球之后，运行所述焊丝以使所述焊丝与第二接合焊盘接触并且形成楔形键。
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公开(公告)号：US20110241183A1
公开(公告)日：2011-10-06
申请号：US13159368
申请日：2011-06-13
IPC分类号： H01L23/58 , H01L23/488
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/525 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/06135 , H01L2224/06136 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/4824 , H01L2224/49 , H01L2224/73215 , H01L2224/73265 , H01L2224/92147 , H01L2224/92247 , H01L2225/0651 , H01L2225/06558 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A chip package comprises a first chip having a first side and a second side, wherein said first chip comprises a first pad, a first trace, a second pad and a first passivation layer at said first side thereof, an opening in said first passivation layer exposing said first pad, said first trace being over said first passivation layer, said first trace connecting said first pad to said second pad; a second chip having a first side and a second side, wherein said second chip comprises a first pad at said first side thereof, wherein said second side of said second chip is joined with said second side of side first chip; a substrate joined with said first side of said first chip or with said first side of said second chip; a first wirebonding wire connecting said second pad of said first chip and said substrate; and a second wirebonding wire connecting said first pad of said second chip and said substrate.
摘要翻译： 芯片封装包括具有第一侧和第二侧的第一芯片，其中所述第一芯片包括第一焊盘，第一焊盘，第二焊盘和在其第一侧的第一钝化层，所述第一钝化层中的开口 暴露所述第一焊盘，所述第一迹线在所述第一钝化层之上，所述第一迹线将所述第一焊盘连接到所述第二焊盘; 具有第一侧和第二侧的第二芯片，其中所述第二芯片包括在其第一侧的第一焊盘，其中所述第二芯片的所述第二侧与所述第二芯片的所述第二侧接合; 与所述第一芯片的所述第一侧或所述第二芯片的所述第一侧连接的衬底; 连接所述第一芯片的所述第二焊盘和所述衬底的第一引线接合线; 以及连接所述第二芯片的所述第一焊盘和所述衬底的第二引线键合线。
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公开(公告)号：US20070212869A1
公开(公告)日：2007-09-13
申请号：US11425155
申请日：2006-06-20
申请人： Chiu-Ming Chou , Shih-Hsiung Lin , Mou-Shiung Lin , Hsin-Jung Lo
发明人： Chiu-Ming Chou , Shih-Hsiung Lin , Mou-Shiung Lin , Hsin-Jung Lo
IPC分类号： H01L21/44
CPC分类号： H01L24/49 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/85 , H01L2224/04042 , H01L2224/05073 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05639 , H01L2224/05644 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/45015 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/48257 , H01L2224/4845 , H01L2224/48465 , H01L2224/48639 , H01L2224/48644 , H01L2224/48669 , H01L2224/48673 , H01L2224/48739 , H01L2224/48769 , H01L2224/48773 , H01L2224/48839 , H01L2224/48844 , H01L2224/48873 , H01L2224/4903 , H01L2224/73265 , H01L2224/78301 , H01L2224/85 , H01L2224/85045 , H01L2224/85203 , H01L2224/85205 , H01L2924/00014 , H01L2924/01006 , H01L2924/01012 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/05042 , H01L2924/10329 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/78 , H01L2924/00 , H01L2224/48869 , H01L2224/48744 , H01L2924/00015
摘要： This invention provides a wire bonding method, comprising providing an integrated circuit (IC) die having thereon a passivation layer and a plurality of first bonding pads exposed by respective openings in the passivation layer; forming a polymer layer on the passivation layer; forming an adhesive/barrier layer on the polymer layer; forming a metal pad layer on the adhesive/barrier layer; bonding a wire onto the metal pad layer to form a ball bond thereon; and after forming the ball bond on the metal pad layer, running the wire so as to contact the wire with a second bonding pad and forming a wedge bond thereto.
摘要翻译： 本发明提供一种引线接合方法，其包括提供其上具有钝化层的集成电路（IC）管芯和由钝化层中的相应开口暴露的多个第一接合焊盘; 在钝化层上形成聚合物层; 在聚合物层上形成粘合/阻挡层; 在粘合/阻挡层上形成金属垫层; 将金属线接合到金属垫层上以在其上形成球接合; 并且在所述金属焊盘层上形成所述焊球之后，运行所述焊丝以使所述焊丝与第二接合焊盘接触并且形成楔形键。
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公开(公告)号：US07932172B2
公开(公告)日：2011-04-26
申请号：US12273548
申请日：2008-11-19
申请人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
IPC分类号： H01L21/00
CPC分类号： H01L23/3192 , H01L2224/05001 , H01L2224/05022 , H01L2224/05572 , H01L2224/16 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/15174 , H01L2924/15184 , H01L2924/15311 , H01L2924/19041
摘要： A semiconductor chip comprises a first MOS device, a second MOS device, a first metallization structure connected to said first MOS device, a second metallization structure connected to said second MOS device, a passivation layer over said first and second MOS devices and over said first and second metallization structures, and a third metallization structure connecting said first and second metallization structures.
摘要翻译： 半导体芯片包括第一MOS器件，第二MOS器件，连接到所述第一MOS器件的第一金属化结构，连接到所述第二MOS器件的第二金属化结构，在所述第一和第二MOS器件上方的钝化层， 和第二金属化结构，以及连接所述第一和第二金属化结构的第三金属化结构。
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公开(公告)号：US20070069347A1
公开(公告)日：2007-03-29
申请号：US11534672
申请日：2006-09-24
申请人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
IPC分类号： H01L29/788 , H01L23/495
CPC分类号： H01L23/3192 , H01L2224/05001 , H01L2224/05022 , H01L2224/05572 , H01L2224/16 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/15174 , H01L2924/15184 , H01L2924/15311 , H01L2924/19041
摘要： A semiconductor chip comprises a first MOS device, a second MOS device, a first metallization structure connected to said first MOS device, a second metallization structure connected to said second MOS device, a passivation layer over said first and second MOS devices and over said first and second metallization structures, and a third metallization structure connecting said first and second metallization structures.
摘要翻译： 半导体芯片包括第一MOS器件，第二MOS器件，连接到所述第一MOS器件的第一金属化结构，连接到所述第二MOS器件的第二金属化结构，在所述第一和第二MOS器件上方的钝化层， 和第二金属化结构，以及连接所述第一和第二金属化结构的第三金属化结构。
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公开(公告)号：US07990037B2
公开(公告)日：2011-08-02
申请号：US11563215
申请日：2006-11-27
申请人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
IPC分类号： H01L23/52
CPC分类号： H01L23/53238 , H01L21/288 , H01L21/76838 , H01L23/5227 , H01L23/53223 , H01L23/53276 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/48 , H01L2221/1094 , H01L2224/02166 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/05082 , H01L2224/05084 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05567 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05681 , H01L2224/05683 , H01L2224/114 , H01L2224/116 , H01L2224/13099 , H01L2224/451 , H01L2224/45155 , H01L2224/48091 , H01L2224/48463 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/1305 , H01L2924/13091 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2224/05552 , H01L2224/45099
摘要： The present invention proposes a circuit component structure, which comprises a semiconductor substrate, a fine-line metallization structure formed over the semiconductor substrate and having at least one metal pad, a passivation layer formed over the fine-line metallization structure with the metal pads exposed by the openings of the passivation layer, at least one carbon nanotube layer formed over the fine-line metallization structure and the passivation layer and connecting with the metal pads. The present invention is to provide a carbon nanotube circuit component structure and a method for fabricating the same, wherein the circuit of a semiconductor element is made of an electrically conductive carbon nanotube, and the circuit of the semiconductor element can thus be made finer and denser via the superior electric conductivity, flexibility and strength of the carbon nanotube.
摘要翻译： 本发明提出了一种电路部件结构，其包括半导体衬底，形成在半导体衬底上并具有至少一个金属焊盘的细线金属化结构，形成在细线金属化结构上的钝化层，金属焊盘暴露 通过钝化层的开口，形成在细线金属化结构上的至少一个碳纳米管层和钝化层并与金属焊盘连接。 本发明提供一种碳纳米管回路部件结构及其制造方法，其中，半导体元件的电路由导电性碳纳米管构成，能够使半导体元件的电路变得更细且更致密 通过优异的导电性，柔性和碳纳米管的强度。
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公开(公告)号：US20090065871A1
公开(公告)日：2009-03-12
申请号：US12273548
申请日：2008-11-19
申请人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
IPC分类号： H01L27/088 , H01L23/52
CPC分类号： H01L23/3192 , H01L2224/05001 , H01L2224/05022 , H01L2224/05572 , H01L2224/16 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/15174 , H01L2924/15184 , H01L2924/15311 , H01L2924/19041
摘要： A semiconductor chip comprises a first MOS device, a second MOS device, a first metallization structure connected to said first MOS device, a second metallization structure connected to said second MOS device, a passivation layer over said first and second MOS devices and over said first and second metallization structures, and a third metallization structure connecting said first and second metallization structures.
摘要翻译： 半导体芯片包括第一MOS器件，第二MOS器件，连接到所述第一MOS器件的第一金属化结构，连接到所述第二MOS器件的第二金属化结构，在所述第一和第二MOS器件上方的钝化层， 和第二金属化结构，以及连接所述第一和第二金属化结构的第三金属化结构。
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公开(公告)号：US20070164430A1
公开(公告)日：2007-07-19
申请号：US11563215
申请日：2006-11-27
申请人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
CPC分类号： H01L23/53238 , H01L21/288 , H01L21/76838 , H01L23/5227 , H01L23/53223 , H01L23/53276 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/48 , H01L2221/1094 , H01L2224/02166 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/05082 , H01L2224/05084 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05567 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05681 , H01L2224/05683 , H01L2224/114 , H01L2224/116 , H01L2224/13099 , H01L2224/451 , H01L2224/45155 , H01L2224/48091 , H01L2224/48463 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/1305 , H01L2924/13091 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2224/05552 , H01L2224/45099
摘要： The present invention proposes a circuit component structure, which comprises a semiconductor substrate, a fine-line metallization structure formed over the semiconductor substrate and having at least one metal pad, a passivation layer formed over the fine-line metallization structure with the metal pads exposed by the openings of the passivation layer, at least one carbon nanotube layer formed over the fine-line metallization structure and the passivation layer and connecting with the metal pads. The present invention is to provide a carbon nanotube circuit component structure and a method for fabricating the same, wherein the circuit of a semiconductor element is made of an electrically conductive carbon nanotube, and the circuit of the semiconductor element can thus be made finer and denser via the superior electric conductivity, flexibility and strength of the carbon nanotube.
摘要翻译： 本发明提出了一种电路部件结构，其包括半导体衬底，形成在半导体衬底上并具有至少一个金属焊盘的细线金属化结构，形成在细线金属化结构上的钝化层，金属焊盘暴露 通过钝化层的开口，形成在细线金属化结构上的至少一个碳纳米管层和钝化层并与金属焊盘连接。 本发明提供一种碳纳米管回路部件结构及其制造方法，其中，半导体元件的电路由导电性碳纳米管构成，能够使半导体元件的电路变得更细且更致密 通过优异的导电性，柔性和碳纳米管的强度。
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公开(公告)号：US20110266680A1
公开(公告)日：2011-11-03
申请号：US13180479
申请日：2011-07-11
申请人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Chien-Kang Chou , Hsin-Jung Lo
IPC分类号： H01L23/532 , B82Y10/00 , B82Y40/00 , H01L21/768
CPC分类号： H01L23/53238 , H01L21/288 , H01L21/76838 , H01L23/5227 , H01L23/53223 , H01L23/53276 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/48 , H01L2221/1094 , H01L2224/02166 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/05082 , H01L2224/05084 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05567 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05681 , H01L2224/05683 , H01L2224/114 , H01L2224/116 , H01L2224/13099 , H01L2224/451 , H01L2224/45155 , H01L2224/48091 , H01L2224/48463 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/1305 , H01L2924/13091 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2224/05552 , H01L2224/45099
摘要： The present invention proposes a circuit component structure, which comprises a semiconductor substrate, a fine-line metallization structure formed over the semiconductor substrate and having at least one metal pad, a passivation layer formed over the fine-line metallization structure with the metal pads exposed by the openings of the passivation layer, at least one carbon nanotube layer formed over the fine-line metallization structure and the passivation layer and connecting with the metal pads. The present invention is to provide a carbon nanotube circuit component structure and a method for fabricating the same, wherein the circuit of a semiconductor element is made of an electrically conductive carbon nanotube, and the circuit of the semiconductor element can thus be made finer and denser via the superior electric conductivity, flexibility and strength of the carbon nanotube.
摘要翻译： 本发明提出了一种电路部件结构，其包括半导体衬底，形成在半导体衬底上并具有至少一个金属焊盘的细线金属化结构，形成在细线金属化结构上的钝化层，金属焊盘暴露 通过钝化层的开口，形成在细线金属化结构上的至少一个碳纳米管层和钝化层并与金属焊盘连接。 本发明提供一种碳纳米管回路部件结构及其制造方法，其中，半导体元件的电路由导电性碳纳米管构成，能够使半导体元件的电路变得更细且更致密 通过优异的导电性，柔性和碳纳米管的强度。
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公开(公告)号：US08008775B2
公开(公告)日：2011-08-30
申请号：US11017169
申请日：2004-12-20
申请人： Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
发明人： Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
CPC分类号： H01L23/3171 , H01L23/5223 , H01L23/5227 , H01L23/5228 , H01L23/5329 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2224/04042 , H01L2224/13022 , H01L2224/131 , H01L2224/13144 , H01L2224/16265 , H01L2924/01019 , H01L2924/04953 , H01L2924/05042 , H01L2924/12044 , H01L2924/14 , H01L2924/19015 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/30105 , H01L2924/014
摘要： A system and method for forming post passivation metal structures is described. Metal interconnections and high quality electrical components, such as inductors, transformers, capacitors, or resistors are formed on a layer of passivation, or on a thick layer of polymer over a passivation layer.
摘要翻译： 描述了用于形成后钝化金属结构的系统和方法。 金属互连和高质量的电气部件，例如电感器，变压器，电容器或电阻器形成在钝化层上，或者在钝化层上的厚层聚合物上。
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