公开(公告)号：US20070187826A1

公开(公告)日：2007-08-16

申请号：US11307615

申请日：2006-02-14

申请人： Il Kwon Shim ,  Byung Joon Han ,  Seng Guan Chow

发明人： Il Kwon Shim ,  Byung Joon Han ,  Seng Guan Chow

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a system for 3D package stacking system, comprising providing a substrate, attaching a ball grid array package, in an inverted position, to the substrate, forming a lower package, the lower package having the ball grid array package and the substrate encapsulated by a molding compound and attaching a second integrated circuit package over the lower package.

摘要翻译： 本发明提供了一种用于3D封装堆叠系统的系统，包括提供衬底，将反向位置的球栅阵列封装连接到衬底，形成下封装，下封装具有球栅阵列封装和衬底 通过模制化合物封装并且将下一个封装上的第二集成电路封装。

公开(公告)号：US20070063320A1

公开(公告)日：2007-03-22

申请号：US11162682

申请日：2005-09-19

申请人： Jeffrey Punzalan ,  Il Kwon Shim ,  Zigmund Camacho ,  Henry Bathan

发明人： Jeffrey Punzalan ,  Il Kwon Shim ,  Zigmund Camacho ,  Henry Bathan

IPC分类号： H01L23/495

CPC分类号： H01L23/49503 ,  H01L21/4828 ,  H01L23/49548 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/27013 ,  H01L2224/29007 ,  H01L2224/29191 ,  H01L2224/29198 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/2939 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/0715 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system including an integrated circuit die and a lead frame with a trenched die pad. The integrated circuit die is mounted to the trenched die pad.

摘要翻译： 一种集成电路封装系统，包括集成电路管芯和具有沟槽管芯焊盘的引线框架。 集成电路管芯安装到沟槽焊盘上。

公开(公告)号：US07153725B2

公开(公告)日：2006-12-26

申请号：US10766746

申请日：2004-01-27

申请人： Tie Wang ,  Virgil Cotoco Ararao ,  Il Kwon Shim ,  Sheila Marie L. Alvarez

发明人： Tie Wang ,  Virgil Cotoco Ararao ,  Il Kwon Shim ,  Sheila Marie L. Alvarez

IPC分类号： H01L23/31

CPC分类号： H01L23/3128 ,  H01L23/4334 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/81 ,  H01L2924/00

摘要： A method for fabricating a semiconductor package with a substrate in a strip format is provided. Semiconductor devices are attached in a strip format to the substrate, and a thermal interface material is applied to the semiconductor devices. A flat panel heat spreader is attached to each semiconductor device. The semiconductor devices are encapsulated with open encapsulation, leaving the surface of the flat panel heat spreader opposite the substrate externally exposed. Individual semiconductor packages are then singulated from the strip format.

摘要翻译： 提供了一种以条形格式制造具有衬底的半导体封装的方法。 半导体器件以条形格式附接到衬底，并且热界面材料被施加到半导体器件。 平板式散热器安装在每个半导体器件上。 半导体器件用开放封装封装，使平板散热器的表面与外部裸露的衬底相对。 然后单独的半导体封装从条形格式分割。

公开(公告)号：US20060197207A1

公开(公告)日：2006-09-07

申请号：US11164453

申请日：2005-11-22

申请人： Seng Guan Chow ,  Ming Ying ,  Il Kwon Shim

发明人： Seng Guan Chow ,  Ming Ying ,  Il Kwon Shim

IPC分类号： H01L23/02 ,  H01L21/50

CPC分类号： H01L23/552 ,  H01L21/4828 ,  H01L23/3135 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated package system with die and package combination including forming a leadframe having internal leads and external leads, encapsulating a first integrated circuit on the leadframe, and encapsulating a second integrated circuit over the first integrated circuit.

摘要翻译： 一种具有管芯和封装组合的集成封装系统，包括形成具有内部引线和外部引线的引线框架，在引线框上封装第一集成电路，并在第一集成电路上封装第二集成电路。

公开(公告)号：US20050194698A1

公开(公告)日：2005-09-08

申请号：US10794109

申请日：2004-03-03

申请人： Il Kwon Shim ,  Virgil Ararao ,  Hyeong Hur ,  Byung Han

发明人： Il Kwon Shim ,  Virgil Ararao ,  Hyeong Hur ,  Byung Han

IPC分类号： H01L23/48

CPC分类号： H01L24/73 ,  H01L24/32 ,  H01L2224/16245 ,  H01L2224/29007 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit package is provided with a connective structure having a wire bonding zone and a keep-out zone. An integrated circuit die has an undercut defining an undercut zone, which is overlapped by the keep-out zone. A wire is bonded between the integrated circuit die and the connective structure within the wire bonding zone and outside of the keep-out zone.

摘要翻译： 集成电路封装设置有具有引线接合区和保护区的连接结构。 集成电路管芯具有限定了与保护区重叠的底切区的底切。 集成电路管芯和引线接合区域内的结合结构之间的接合线和保护区外部的接合线。

公开(公告)号：US06861288B2

公开(公告)日：2005-03-01

申请号：US10676736

申请日：2003-09-30

申请人： Il Kwon Shim ,  Kambhampati Ramakrishna ,  Seng Guan Chow ,  Byung Joon Han

发明人： Il Kwon Shim ,  Kambhampati Ramakrishna ,  Seng Guan Chow ,  Byung Joon Han

IPC分类号： H01L25/065 ,  H01L25/10 ,  H01L25/16 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/1815 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： A method for fabricating a stacked semiconductor package includes providing a substrate and mounting a first semiconductor device on the substrate. An interposer is supported above the first semiconductor device opposite the substrate. The interposer is electrically connected to the substrate. A second semiconductor device is then mounted on the interposer.

摘要翻译： 一种用于制造堆叠半导体封装的方法，包括提供衬底并将第一半导体器件安装在衬底上。 插入器被支撑在与衬底相对的第一半导体器件的上方。 插入器电连接到基板。 然后将第二半导体器件安装在插入器上。

公开(公告)号：US06818981B2

公开(公告)日：2004-11-16

申请号：US10765644

申请日：2004-01-26

申请人： Il Kwon Shim ,  Hermes T. Apale ,  Gerry Balanon

发明人： Il Kwon Shim ,  Hermes T. Apale ,  Gerry Balanon

IPC分类号： H01L2310

CPC分类号： H01L23/36 ,  H01L23/10 ,  H01L23/3677 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A PBGA package is provided. The heat spreader interfaces with the substrate with the standoff of the heat spreader. The stand-off of the heat spreader is provided with an opening, the stand-off of the heat spreader is aligned with the substrate of the PBGA package by means of a copper pad that is provided over a second surface of the substrate. A solder bump is further provided over the surface of the copper pad. Thermally conductive solder is deposited over the opening of the heat spreader and over the copper pad. If the heat spreader stand-off is aligned with contact pads, thermally conductive epoxy is deposited over the contact pads.

摘要翻译： 提供PBGA封装。 散热器与散热器的支架与基板相接。 散热器的支架设置有开口，散热器的支架通过设置在基板的第二表面上的铜垫与PBGA封装的基板对准。 在铜焊盘的表面上进一步设置焊料凸块。 导热焊料沉积在散热器的开口上并穿过铜焊盘。 如果散热器对接与接触垫对准，则导热环氧树脂沉积在接触垫上。

公开(公告)号：US06534859B1

公开(公告)日：2003-03-18

申请号：US10116983

申请日：2002-04-05

申请人： Il Kwon Shim ,  Seng Guan Chow ,  Gerry Balanon

发明人： Il Kwon Shim ,  Seng Guan Chow ,  Gerry Balanon

IPC分类号： H01L23495

CPC分类号： H01L23/4334 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A new method and package is provided for face-up packaging of semiconductor devices. The semiconductor device is mounted over the surface of a semiconductor device support surface using conventional methods of device packaging up through device bond wire interconnect to electrical traces on the surface of the semiconductor device support surface over which the device is mounted. An internal mold cap is formed over the device, the internal mold cap has an opening exposing the surface of the device. An external mold cap is formed surrounding the internal mold cap with a cavity separating the external mold cap from the internal mold cap. Thermally conductive epoxy is deposited in the opening of the internal mold cap and in the cavity between the internal and the external mold cap. The heat spreader is placed and attached after which a thermal epoxy and mold cure is applied to the package. The package is further completed by the application of contact balls to a first surface of the semiconductor device support surface, the semiconductor devices is mounted has been mounted over a second surface of the semiconductor device support surface.

摘要翻译： 为半导体器件的正面封装提供了一种新的方法和封装。 使用传统的器件封装技术将半导体器件安装在半导体器件支撑表面的表面上，该器件通过器件接合线互连连接到半导体器件支撑表面上安装器件的表面上的电迹线。 内部模具盖形成在该装置上方，内部模具帽具有露出装置表面的开口。 外部模具盖形成在内部模具盖周围，并且具有将外部模具盖与内部模具盖分离的空腔。 导热环氧树脂沉积在内部模具盖的开口中以及在内部和外部模具盖之间的空腔中。 放置和附接散热器，然后将热环氧树脂和模具固化施加到包装上。 通过将接触球施加到半导体器件支撑表面的第一表面来进一步完成封装，半导体器件被安装在半导体器件支撑表面的第二表面上。

公开(公告)号：US5864470A

公开(公告)日：1999-01-26

申请号：US883541

申请日：1997-06-25

申请人： Il Kwon Shim ,  Young Wook Heo ,  Robert Francis Darveaux

发明人： Il Kwon Shim ,  Young Wook Heo ,  Robert Francis Darveaux

IPC分类号： H01L23/12 ,  H01L23/14 ,  H01L23/367 ,  H01L23/498 ,  H01L23/50 ,  H05K7/06

CPC分类号： H01L24/32 ,  H01L23/3677 ,  H01L23/4985 ,  H01L23/50 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181

摘要： A flexible circuit board for a ball grid array semiconductor package including a flexible resin film, a plurality of electrically conductive traces formed on an upper surface of the resin film, the conductive traces having solder ball pads, and a die flag including a semiconductor chip paddle located on a central portion of the circuit board, the chip paddle having a plurality of heat-discharging and grounding solder ball pads, and a plurality of lattice-shaped traces adapted to electrically connect the solder ball pads, the traces being shaped into a lattice to prevent a bleed-out of a silver-filled epoxy resin, a ground bonding rim located around the chip paddle, and a plurality of radial traces adapted to electrically connect the chip paddle to the ground bonding rim, and the flexible resin film being perforated to define solder ball lands on lower surfaces of the solder ball pads. Since the semiconductor chip paddle has an enlarged opened portion, it is possible to minimize the gold plated region, thereby greatly reducing the manufacturing costs. It is also possible to minimize a deformation of the package caused by mechanical stress generated due to a difference in thermal expansion coefficient between different materials of package elements. A bleed-out of silver-filled epoxy resin is also surely prevented.

摘要翻译： 一种用于球栅阵列半导体封装的柔性电路板，包括柔性树脂膜，形成在树脂膜的上表面上的多个导电迹线，具有焊球垫的导电迹线和包括半导体芯片片的裸片标记 位于电路板的中心部分上的芯片焊盘具有多个放热和接地焊球焊盘，以及多个格子状迹线，用于电连接焊球焊盘，所述迹线被成形为格子 以防止银填充的环氧树脂渗漏，位于芯片焊盘周围的接地边缘，以及多个径向迹线，其适于将芯片焊盘电连接到接地边缘，并且柔性树脂膜被穿孔 以限定焊球的下表面上的焊球。 由于半导体芯片焊盘具有扩大的开口部分，因此可以使镀金区域最小化，从而大大降低制造成本。 也可能由于包装元件的不同材料之间的热膨胀系数的差异而产生的机械应力引起的包装变形最小化。 也可以防止银填充环氧树脂渗出。

公开(公告)号：US5729432A

公开(公告)日：1998-03-17

申请号：US588172

申请日：1996-01-18

申请人： Il Kwon Shim ,  Young Wook Heo

发明人： Il Kwon Shim ,  Young Wook Heo

IPC分类号： H01L23/12 ,  H01L23/13 ,  H01L23/31 ,  H01L23/34 ,  H01L23/498 ,  H05K7/20

CPC分类号： H01L23/49816 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/32 ,  H01L2224/29007 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181

摘要： A BGA (ball grid array) semiconductor package with improved heat dissipation and dehumidification effect is disclosed. The above BGA package is provided with an open through slot on the chip mounting portion of the printed circuit board and/or the heat sink. The above through slot is occluded by neither the heat conductive epoxy resin nor the solder mask but is simply opened, thus directly exposing the bottom surface of the semiconductor chip to the outside of the package and effectively performing heat dissipation and dehumidification without causing any pop corn phenomenon during the dehumidification reflow. The size of the open through slot is not larger than the semiconductor chip. The open through slot is selected from among a rectangular slot, a large circular slot, a plurality of small circular slots, a radial slot, a cross slot or any combination thereof.

摘要翻译： 公开了具有改善的散热和除湿效果的BGA（球栅阵列）半导体封装。 上述BGA封装在印刷电路板和/或散热器的芯片安装部分上设置有开放通孔。 上述贯穿槽既不是导热环氧树脂也不是阻焊剂而被简单地打开，因此直接将半导体芯片的底面暴露于封装的外部，并且有效地进行散热和除湿，而不会引起任何流行的玉米 除湿回流期间的现象。 开放槽的尺寸不大于半导体芯片。 开放通槽选自矩形槽，大圆形槽，多个小圆形槽，径向槽，十字槽或其任何组合。