公开(公告)号：US07745938B2

公开(公告)日：2010-06-29

申请号：US12039054

申请日：2008-02-28

申请人： Mayumi Nakasato ,  Hideki Mizuhara ,  Ryosuke Usui

发明人： Mayumi Nakasato ,  Hideki Mizuhara ,  Ryosuke Usui

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05624 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/00014

摘要： A circuit device includes a semiconductor substrate on which a circuit element is formed, an electrode formed on a surface of the semiconductor substrate, an insulating layer formed on the electrode, a second wiring layer formed on the insulating layer, and a conductive bump which penetrates the insulating layer and electrically connects the electrode and the second wiring layer. The conductive bump is such that the size of crystal grains in a direction parallel with the surface of the semiconductor substrate is larger than the size of crystal grains in a conduction direction of the electrode and the wiring layer.

摘要翻译： 电路装置包括形成有电路元件的半导体基板，形成在半导体基板的表面上的电极，形成在电极上的绝缘层，形成在绝缘层上的第二布线层和穿透绝缘层的导电凸块 绝缘层并且电连接电极和第二布线层。 导电凸块使得在与半导体衬底的表面平行的方向上的晶粒的尺寸大于电极和布线层的导电方向上的晶粒尺寸。

公开(公告)号：US20060032049A1

公开(公告)日：2006-02-16

申请号：US11207293

申请日：2005-08-19

申请人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Sakamoto

发明人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Sakamoto

IPC分类号： H01R43/00

CPC分类号： H01L24/97 ,  H01L21/4846 ,  H01L23/3128 ,  H01L23/49894 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85913 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01011 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/381 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A circuit device manufacturing method is provided, wherein the adhesion of an overcoat resin, formed on a conductive wiring layer, to a sealing resin layer is improved by irradiating plasma onto the overcoat resin. A first conductive film 23A and a second conductive film 23B, which are laminated with an interlayer insulating layer 22 interposed in between, are formed. By selectively removing the first conductive film, a first conductive wiring layer 12A is formed and the first conductive wiring layer is covered with an overcoat resin 18. Overcoat resin 18 is irradiated with plasma to roughen its top surface. A sealing resin layer 17 is formed so as to cover the top surface of the roughened overcoat resin 18 and circuit elements 13.

摘要翻译： 提供了一种电路器件制造方法，其中通过将等离子体照射到外涂层树脂上来改善形成在导电布线层上的外涂层树脂与密封树脂层的粘合性。 形成有夹在中间层间绝缘层22的第一导电膜23A和第二导电膜23B。 通过选择性地去除第一导电膜，形成第一导电布线层12A，并且用外涂层树脂18覆盖第一导电布线层。 外涂层树脂18用等离子体照射以使其顶表面粗糙化。 形成密封树脂层17以覆盖粗糙的外涂层树脂18和电路元件13的顶表面。

公开(公告)号：US06953712B2

公开(公告)日：2005-10-11

申请号：US10724918

申请日：2003-12-01

申请人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Sakamoto

发明人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Sakamoto

IPC分类号： H05K3/28 ,  H01L21/48 ,  H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H05K3/38 ,  H01L21/44 ,  H01L21/50

CPC分类号： H01L24/97 ,  H01L21/4846 ,  H01L23/3128 ,  H01L23/49894 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85913 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01011 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/381 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A circuit device manufacturing method is provided, wherein the adhesion of an overcoat resin, formed on a conductive wiring layer, to a sealing resin layer is improved by irradiating plasma onto the overcoat resin. A first conductive film 23A and a second conductive film 23B, which are laminated with an interlayer insulating layer 22 interposed in between, are formed. By selectively removing the first conductive film, a first conductive wiring layer 12A is formed and the first conductive wiring layer is covered with an overcoat resin 18. Overcoat resin 18 is irradiated with plasma to roughen its top surface. A sealing resin layer 17 is formed so as to cover the top surface of the roughened overcoat resin 18 and circuit elements 13.

摘要翻译： 提供了一种电路器件制造方法，其中通过将等离子体照射到外涂层树脂上来改善形成在导电布线层上的外涂层树脂与密封树脂层的粘合性。 形成有夹在中间层间绝缘层22的第一导电膜23A和第二导电膜23B。 通过选择性地去除第一导电膜，形成第一导电布线层12A，并且用外涂层树脂18覆盖第一导电布线层。 外涂层树脂18用等离子体照射以使其顶表面粗糙化。 形成密封树脂层17以覆盖粗糙的外涂层树脂18和电路元件13的顶表面。

公开(公告)号：US20080157338A1

公开(公告)日：2008-07-03

申请号：US11957030

申请日：2007-12-14

申请人： Mayumi Nakasato ,  Kiyoshi Shibata ,  Yoshio Okayama ,  Ryosuke Usui ,  Hideki Mizuhara

发明人： Mayumi Nakasato ,  Kiyoshi Shibata ,  Yoshio Okayama ,  Ryosuke Usui ,  Hideki Mizuhara

IPC分类号： H01L21/50 ,  H01L23/52

CPC分类号： H01L23/3114 ,  H01L23/525 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00

摘要： A manufacturing technology is provided capable of improving the reliability of a semiconductor module having a via contact connected to an electrode part of a semiconductor device. A conductive bump is formed on an insulating layer such that the end of the conductive bump is in contact with an electrode of a semiconductor substrate. By pressure-molding the assembly using a press machine, the semiconductor substrate, the conductive bump, and the insulating layer are integrated. With this, the conductive bump is allowed to embed itself in the insulating layer while maintaining contact with the electrode. The insulating layer is subject to laser irradiation from above so as to form an aperture exposing the conductive bump. Subsequently, the upper surface of the insulating layer and the interior surface of the aperture are plated with copper by electroless plating and electroplating so as to form a copper plating layer, and a via contact is formed in the aperture so as to coat the inner wall of the aperture.

摘要翻译： 提供了能够提高具有连接到半导体器件的电极部分的通孔接触的半导体模块的可靠性的制造技术。 导电凸块形成在绝缘层上，使得导电凸块的端部与半导体衬底的电极接触。 通过使用压制机对组件进行加压成型，将半导体衬底，导电凸块和绝缘层集成。 由此，允许导电凸块自身嵌入绝缘层中，同时保持与电极的接触。 绝缘层从上方经受激光照射，以形成露出导电凸块的孔。 随后，绝缘层的上表面和孔的内表面通过无电解电镀和电镀电镀铜，以形成镀铜层，并且在孔中形成通孔接触以涂覆内壁 的孔径。

公开(公告)号：US07301228B2

公开(公告)日：2007-11-27

申请号：US10725993

申请日：2003-12-03

申请人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Kojima ,  Noriaki Sakamoto

发明人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Kojima ,  Noriaki Sakamoto

IPC分类号： H01L23/04 ,  H01R9/09

CPC分类号： H01L21/6835 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01088 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H05K1/024 ,  H05K3/205 ,  H05K3/4676 ,  H05K3/4682 ,  H05K2201/068 ,  Y10S428/901 ,  Y10T428/24917 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： The present invention provides a low-profile and light-weight semiconductor device having improved product reliability and higher frequency performance. A multi-layer interconnect line structure is disposed just under circuit devices 410a and 410b. An Interlayer insulating film 405 that composes a part of the multi-layer interconnect line structure is formed of a material having a relative dielectric constant within a range from 1.0 to 3.7, and a dielectric loss tangent within a range from 0.0001 to 0.02.

摘要翻译： 本发明提供一种具有改进的产品可靠性和更高频率性能的低轮廓和轻量级的半导体器件。 多层互连线结构正好位于电路器件410a和410b的正下方。 组成多层互连线结构的一部分的层间绝缘膜405由相对介电常数为1.0〜3.7，介电损耗角正切为0.0001〜0.02的材料形成。

公开(公告)号：US07221049B2

公开(公告)日：2007-05-22

申请号：US11139263

申请日：2005-05-27

申请人： Yusuke Igarashi ,  Sadamichi Takakusaki ,  Hideki Mizuhara ,  Ryosuke Usui

发明人： Yusuke Igarashi ,  Sadamichi Takakusaki ,  Hideki Mizuhara ,  Ryosuke Usui

IPC分类号： H01I23/12

CPC分类号： H01L23/5383 ,  H01L21/4857 ,  H01L21/4871 ,  H01L23/3735 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0206 ,  H05K1/056 ,  H05K3/0061 ,  H05K3/284 ,  H05K3/4652 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/0266 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A circuit device having a multilayered wiring structure and an excellent heat dissipation property, and a method of manufacturing the circuit device are provided. In a circuit device, a multilayered wiring structure including a first conductive pattern and a second conductive pattern is formed on a surface of a circuit substrate. A first insulating layer is formed entirely on the surface of the circuit substrate. The first conductive pattern and the second conductive pattern are mutually insulated by a second insulating layer. An amount and grain sizes of filler included in the second insulating layer are smaller than an amount and grain sizes of filler included in the first insulating layer. Therefore, it is easier to connect the above two conductive patterns by way of penetrating the second insulating layer.

摘要翻译： 具有多层布线结构和散热性优异的电路装置以及制造该电路装置的方法。 在电路装置中，在电路基板的表面上形成包括第一导电图案和第二导电图案的多层布线结构。 第一绝缘层整体形成在电路基板的表面上。 第一导电图案和第二导电图案由第二绝缘层相互绝缘。 包含在第二绝缘层中的填料的量和晶粒尺寸小于包含在第一绝缘层中的填料的量和晶粒尺寸。 因此，通过穿透第二绝缘层更容易连接上述两个导电图案。

公开(公告)号：US20050205996A1

公开(公告)日：2005-09-22

申请号：US11082150

申请日：2005-03-16

申请人： Ryosuke Usui ,  Atsuhiro Nishida ,  Hideki Mizuhara ,  Takeshi Nakamura

发明人： Ryosuke Usui ,  Atsuhiro Nishida ,  Hideki Mizuhara ,  Takeshi Nakamura

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/48 ,  H01L25/16 ,  H05K1/02 ,  H05K3/28 ,  H05K3/38

CPC分类号： H01L25/16 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/3142 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0218 ,  H05K3/284 ,  H05K3/381 ,  H05K2203/095 ,  H05K2203/1311 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A semiconductor apparatus includes a substrate and elements or semiconductor chips provided on the substrate. The elements are sealed by being brought into contact with a sealing compound. The surface of contact on the elements or the sealing compound is plasma treated. The semiconductor chip is adhesively attached to another semiconductor chip via an adhesive compound. The surface of the semiconductor chip in contact with the adhesive compound is plasma treated.

摘要翻译： 半导体装置包括衬底和设置在衬底上的元件或半导体芯片。 这些元件通过与密封化合物接触而被密封。 元件或密封剂上的接触表面进行等离子体处理。 半导体芯片通过粘合剂化合物粘附到另一半导体芯片上。 与粘合剂化合物接触的半导体芯片的表面进行等离子体处理。

公开(公告)号：US07939373B2

公开(公告)日：2011-05-10

申请号：US12143603

申请日：2008-06-20

申请人： Ryosuke Usui ,  Hideki Mizuhara ,  Takeshi Nakamura

发明人： Ryosuke Usui ,  Hideki Mizuhara ,  Takeshi Nakamura

IPC分类号： H01L21/60

CPC分类号： H01L21/6835 ,  H01L23/3128 ,  H01L23/498 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/244 ,  H05K3/305 ,  H05K3/3452 ,  H05K3/381 ,  H05K2201/0989 ,  H05K2203/049 ,  H05K2203/095 ,  Y10S438/906 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An adhesive film is formed on an electrode film, and a coating film is formed thereon. Nickel, chrome, molybdenum, tungsten, aluminum or an alloy of them is used as a constituent material of the adhesive film. Gold, silver, platinum or an alloy of them is used as a constituent material of the coating film.

摘要翻译： 在电极膜上形成粘合膜，在其上形成涂膜。 镍，铬，钼，钨，铝或它们的合金被用作粘合膜的构成材料。 金，银，铂或它们的合金被用作涂膜的构成材料。

公开(公告)号：US07364941B2

公开(公告)日：2008-04-29

申请号：US11207293

申请日：2005-08-19

申请人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Sakamoto

发明人： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Noriaki Sakamoto

IPC分类号： H01L21/44 ,  H01L23/02

CPC分类号： H01L24/97 ,  H01L21/4846 ,  H01L23/3128 ,  H01L23/49894 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85913 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01011 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/381 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A circuit device manufacturing method is provided, wherein the adhesion of an overcoat resin, formed on a conductive wiring layer, to a sealing resin layer is improved by irradiating plasma onto the overcoat resin. A first conductive film 23A and a second conductive film 23B, which are laminated with an interlayer insulating layer 22 interposed in between, are formed. By selectively removing the first conductive film, a first conductive wiring layer 12A is formed and the first conductive wiring layer is covered with an overcoat resin 18. Overcoat resin 18 is irradiated with plasma to roughen its top surface. A sealing resin layer 17 is formed so as to cover the top surface of the roughened overcoat resin 18 and circuit elements 13.

摘要翻译： 提供了一种电路器件制造方法，其中通过将等离子体照射到外涂层树脂上来改善形成在导电布线层上的外涂层树脂与密封树脂层的粘合性。 形成有夹在中间层间绝缘层22的第一导电膜23A和第二导电膜23B。 通过选择性地去除第一导电膜，形成第一导电布线层12A，并且用外涂层树脂18覆盖第一导电布线层。 外涂层树脂18用等离子体照射以使其顶表面粗糙化。 形成密封树脂层17以覆盖粗糙的外涂层树脂18和电路元件13的顶表面。

公开(公告)号：US20050263880A1

公开(公告)日：2005-12-01

申请号：US11139263

申请日：2005-05-27

申请人： Yusuke Igarashi ,  Sadamichi Takakusaki ,  Hideki Mizuhara ,  Ryosuke Usui

发明人： Yusuke Igarashi ,  Sadamichi Takakusaki ,  Hideki Mizuhara ,  Ryosuke Usui

IPC分类号： H05K3/46 ,  H01L21/48 ,  H01L21/50 ,  H01L23/12 ,  H01L23/34 ,  H01L23/373 ,  H01L23/538 ,  H01L25/00 ,  H05K1/02 ,  H05K1/05 ,  H05K3/00 ,  H05K3/28

CPC分类号： H01L23/5383 ,  H01L21/4857 ,  H01L21/4871 ,  H01L23/3735 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0206 ,  H05K1/056 ,  H05K3/0061 ,  H05K3/284 ,  H05K3/4652 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/0266 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A circuit device having a multilayered wiring structure and an excellent heat dissipation property, and a method of manufacturing the circuit device are provided. In a circuit device, a multilayered wiring structure including a first conductive pattern and a second conductive pattern is formed on a surface of a circuit substrate. A first insulating layer is formed entirely on the surface of the circuit substrate. The first conductive pattern and the second conductive pattern are mutually insulated by a second insulating layer. An amount and grain sizes of filler included in the second insulating layer are smaller than an amount and grain sizes of filler included in the first insulating layer. Therefore, it is easier to connect the above two conductive patterns by way of penetrating the second insulating layer.

摘要翻译： 具有多层布线结构和散热性优异的电路装置以及制造该电路装置的方法。 在电路装置中，在电路基板的表面上形成包括第一导电图案和第二导电图案的多层布线结构。 第一绝缘层整体形成在电路基板的表面上。 第一导电图案和第二导电图案由第二绝缘层相互绝缘。 包含在第二绝缘层中的填料的量和晶粒尺寸小于包含在第一绝缘层中的填料的量和晶粒尺寸。 因此，通过穿透第二绝缘层更容易连接上述两个导电图案。