公开(公告)号：US20130320477A1

公开(公告)日：2013-12-05

申请号：US13883828

申请日：2011-10-28

申请人： Tadahiro Ohmi ,  Tomotsugu Ohashi ,  Kazuhiro Yoshikawa ,  Tatsuro Yoshida ,  Teppei Uchimura ,  Kazuki Soeda ,  Shigetoshi Sugawa

发明人： Tadahiro Ohmi ,  Tomotsugu Ohashi ,  Kazuhiro Yoshikawa ,  Tatsuro Yoshida ,  Teppei Uchimura ,  Kazuki Soeda ,  Shigetoshi Sugawa

IPC分类号： H01L31/0248 ,  H01L21/306

CPC分类号： H01L31/0248 ,  H01L21/30604 ,  H01L21/6708 ,  H01L27/1464 ,  H01L29/78603

摘要： A method of etching capable of rapidly and flatly performing wet etching on a Si substrate using fluonitric acid represented by HF(a)HNO3(b)H2O(c) (where the unit of a, b and c is wt % and a+b+c=100). The etching rate of an SiO2 layer with the highly concentrated fluonitric acid is significantly lowered by the appropriate selection of its composition as compared with the etching rate of the Si substrate, and etch the Si substrate until the SiO2 layer is exposed. In this way, it is possible to rapidly etch the Si substrate and significantly enhance the flatness of the etched surface.

摘要翻译： 使用HF（a）HNO 3（b）H 2 O（c）（其中a，b和c的单位为wt％和a + b）表示的氟酸，在Si衬底上快速且平坦地进行湿蚀刻的方法 + c = 100）。 与Si衬底的蚀刻速率相比，通过适当选择其组成，通过适当选择具有高浓度荧光酮的SiO 2层的蚀刻速率，并且蚀刻Si衬底直至暴露SiO 2层。 以这种方式，可以快速蚀刻Si衬底并显着提高蚀刻表面的平坦度。

公开(公告)号：US08487192B2

公开(公告)日：2013-07-16

申请号：US12946993

申请日：2010-11-16

申请人： Masatoshi Kunieda ,  Kazuhiro Yoshikawa ,  Takeshi Furusawa

发明人： Masatoshi Kunieda ,  Kazuhiro Yoshikawa ,  Takeshi Furusawa

IPC分类号： H05K3/02 ,  H05K3/10 ,  H05K1/03

CPC分类号： H01L23/49861 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49866 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/0097 ,  H05K3/205 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A printed wiring board including an insulation layer made of a resin material and having first and second surfaces, the insulation layer having an opening portion opened on the second surface, a conductive circuit having first and second surfaces, the conductive circuit being embedded in the insulation layer such that the first surface of the conductive circuit is formed flush with the first surface of the insulation layer and that the second surface of the conductive circuit is exposed through the opening portion of the insulation layer, a first surface-treatment film formed on the conductive circuit and facing the first surface of the conductive circuit, and a second surface-treatment film formed on the conductive circuit and facing the second surface of the conductive circuit and in the opening portion of the insulation layer.

摘要翻译： 一种印刷电路板，包括由树脂材料制成并具有第一和第二表面的绝缘层，所述绝缘层具有在第二表面上开口的开口部分，具有第一和第二表面的导电电路，所述导电电路嵌入绝缘体中 使得导电电路的第一表面与绝缘层的第一表面齐平并且导电电路的第二表面通过绝缘层的开口部露出，形成在第一表面处理膜上的第一表面处理膜 导电电路并且面对导电电路的第一表面，以及形成在导电电路上并面向导电电路的第二表面和绝缘层的开口部分的第二表面处理膜。

公开(公告)号：US08441133B2

公开(公告)日：2013-05-14

申请号：US12695722

申请日：2010-01-28

申请人： Daiki Komatsu ,  Kazuhiro Yoshikawa

发明人： Daiki Komatsu ,  Kazuhiro Yoshikawa

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L23/3121 ,  H01L23/49816 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13022 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device including a first substrate having first and second surfaces, multiple first mounting pads formed on the first surface of the first substrate and for mounting a first semiconductor element on the first surface of the first substrate, multiple first connection pads formed on the first surface of the first substrate and positioned on the periphery of the multiple first mounting pads, a second substrate formed on the first substrate and having first and second surfaces, the second substrate having a second penetrating electrode which penetrates through the first and second surfaces of the second substrate, multiple second mounting pads formed on the first surface of the second substrate and for mounting a second semiconductor element, and a conductive member formed on one of the first connection pads and electrically connecting an end portion of the second penetrating electrode and the one of the first connection pads.

摘要翻译： 一种半导体器件，包括具有第一和第二表面的第一衬底，形成在第一衬底的第一表面上的多个第一安装焊盘，以及用于将第一半导体元件安装在第一衬底的第一表面上的多个第一连接焊盘， 所述第一基板的表面并且位于所述多个第一安装焊盘的周边上，形成在所述第一基板上并具有第一和第二表面的第二基板，所述第二基板具有穿过所述第一基板的第一和第二表面的第二穿透电极 第二基板，形成在第二基板的第一表面上并用于安装第二半导体元件的多个第二安装焊盘以及形成在第一连接焊盘中的一个上并且电连接第二穿透电极的端部和 的第一连接垫。

公开(公告)号：US08336205B2

公开(公告)日：2012-12-25

申请号：US13209052

申请日：2011-08-12

申请人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

发明人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

IPC分类号： H01K3/10

CPC分类号： H05K1/185 ,  H01L24/19 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83132 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/036 ,  H05K1/188 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0969 ,  H05K2201/09918 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49165

摘要： A printed wiring board is manufactured by a method in which a base substrate having a first insulation layer, a second insulation layer, and a conductive film is provided. An electronic component is placed on the first insulation layer at a position determined based on an alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark, which is used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

摘要翻译： 通过提供具有第一绝缘层，第二绝缘层和导电膜的基底基板的方法制造印刷线路板。 在基于对准标记确定的位置处将电子部件放置在第一绝缘层上。 在将电子部件封闭在第二绝缘层的开口内之后，在基于对准标记确定的位置处形成暴露电子部件的端子的通孔，该位置用于确定电子部件的位置。 通孔导体形成在通孔中，导电层形成在导电膜上并被图案化以形成连接到通孔导体的导电电路。

公开(公告)号：US20110289773A1

公开(公告)日：2011-12-01

申请号：US13209052

申请日：2011-08-12

申请人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

发明人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

IPC分类号： H05K3/30

CPC分类号： H05K1/185 ,  H01L24/19 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83132 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/036 ,  H05K1/188 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0969 ,  H05K2201/09918 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49165

摘要： A printed wiring board is manufactured by a method in which a base substrate having a first insulation layer, a second insulation layer, and a conductive film is provided. An electronic component is placed on the first insulation layer at a position determined based on an alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark, which is used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

摘要翻译： 通过提供具有第一绝缘层，第二绝缘层和导电膜的基底基板的方法制造印刷线路板。 在基于对准标记确定的位置处将电子部件放置在第一绝缘层上。 在将电子部件封闭在第二绝缘层的开口内之后，在基于对准标记确定的位置处形成暴露电子部件的端子的通孔，该位置用于确定电子部件的位置。 通孔导体形成在通孔中，导电层形成在导电膜上并被图案化以形成连接到通孔导体的导电电路。

公开(公告)号：US08024858B2

公开(公告)日：2011-09-27

申请号：US12351954

申请日：2009-01-12

申请人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

发明人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

IPC分类号： H01K3/10

CPC分类号： H05K1/185 ,  H01L24/19 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83132 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/036 ,  H05K1/188 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0969 ,  H05K2201/09918 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49165

摘要： A printed wiring board is manufactured by a method in which a base substrate having a first insulation layer, a second insulation layer, and a conductive film is provided. An electronic component is placed on the first insulation layer at a position determined based on an alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark, which is used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

摘要翻译： 通过提供具有第一绝缘层，第二绝缘层和导电膜的基底基板的方法制造印刷线路板。 在基于对准标记确定的位置处将电子部件放置在第一绝缘层上。 在将电子部件封闭在第二绝缘层的开口内之后，在基于对准标记确定的位置处形成暴露电子部件的端子的通孔，该位置用于确定电子部件的位置。 通孔导体形成在通孔中，导电层形成在导电膜上并被图案化以形成连接到通孔导体的导电电路。

公开(公告)号：US20110189374A1

公开(公告)日：2011-08-04

申请号：US13120875

申请日：2009-09-24

申请人： Kazuhiro Yoshikawa

发明人： Kazuhiro Yoshikawa

IPC分类号： A23D9/00 ,  C11B1/06

CPC分类号： C11B13/00 ,  A23K20/158 ,  A23L17/40 ,  A61K35/612 ,  C11B1/06 ,  Y02W30/74

摘要： As a method for an efficient concentration of lipid components from food materials, a method for concentrating lipids contained in a crustacean, which comprises heating squeezed liquid prepared by squeezing the whole crustacean or a part thereof and separating the heated squeezed liquid into solids containing lipid components and liquid containing water-soluble components. Those are useful as the method by which lipids abundantly containing the phospholipid are prepared easily and at a low cost. Furthermore, the solids containing the lipids prepared by said method or a dried product thereof, lipids extracted therefrom and a composition abundantly containing the useful lipids derived from crustaceans are useful as materials for pharmaceuticals, ingredients for foods or feed, etc.

摘要翻译： 作为用于从食品材料有效浓缩脂质成分的方法，一种用于浓缩包含在甲壳类动物中的脂质的方法，其包括加热通过挤压整个甲壳类或其一部分制备的挤压液体，并将加热的挤压液体分离成含有脂质组分的固体 和含有水溶性成分的液体。 作为容易且低成本地制备含有大量磷脂的脂质的方法是有用的。 此外，含有通过所述方法制备的脂质或其干燥产物的固体，从其中提取的脂质和大量含有衍生自甲壳类的有用脂质的组合物可用作药物，食品或饲料成分等的材料。

公开(公告)号：US20110139498A1

公开(公告)日：2011-06-16

申请号：US12946993

申请日：2010-11-16

申请人： Masatoshi Kunieda ,  Kazuhiro Yoshikawa ,  Takeshi Furusawa

发明人： Masatoshi Kunieda ,  Kazuhiro Yoshikawa ,  Takeshi Furusawa

IPC分类号： H05K1/09 ,  H05K1/00 ,  H05K3/00

CPC分类号： H01L23/49861 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49866 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/0097 ,  H05K3/205 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A printed wiring board including an insulation layer made of a resin material and having first and second surfaces, the insulation layer having an opening portion opened on the second surface, a conductive circuit having first and second surfaces, the conductive circuit being embedded in the insulation layer such that the first surface of the conductive circuit is formed flush with the first surface of the insulation layer and that the second surface of the conductive circuit is exposed through the opening portion of the insulation layer, a first surface-treatment film formed on the conductive circuit and facing the first surface of the conductive circuit, and a second surface-treatment film formed on the conductive circuit and facing the second surface of the conductive circuit and in the opening portion of the insulation layer.

摘要翻译： 一种印刷电路板，包括由树脂材料制成并具有第一和第二表面的绝缘层，所述绝缘层具有在第二表面上开口的开口部分，具有第一和第二表面的导电电路，所述导电电路嵌入绝缘体中 使得导电电路的第一表面与绝缘层的第一表面齐平并且导电电路的第二表面通过绝缘层的开口部露出，形成在第一表面处理膜上的第一表面处理膜 导电电路并且面对导电电路的第一表面，以及形成在导电电路上并面向导电电路的第二表面和绝缘层的开口部分的第二表面处理膜。

公开(公告)号：US07868072B2

公开(公告)日：2011-01-11

申请号：US11547051

申请日：2005-03-25

申请人： Shuichi Sasahara ,  Takahiko Fujita ,  Kazuhiro Yoshikawa

发明人： Shuichi Sasahara ,  Takahiko Fujita ,  Kazuhiro Yoshikawa

IPC分类号： C08K5/092

CPC分类号： A61L15/585 ,  A61B5/04087 ,  A61B2562/0217 ,  A61F5/443

摘要： A gel adhesive composition of the invention contains a crosslinked water-soluble polymer, water, a moisturizer, an amphipathic polymer, a water-insoluble polymer having adhesiveness, and an electrolytic salt and the composition contains the water-insoluble polymer in an amount of 3 to 20% by weight and the amphipathic polymer in an amount of 0.05 to 7.0% by weight with respect to the total amount of the composition except water.

摘要翻译： 本发明的凝胶粘合剂组合物含有交联的水溶性聚合物，水，保湿剂，两亲性聚合物，具有粘合性的水不溶性聚合物和电解质盐，该组合物含有3个不溶于水的聚合物 至20重量％，相对于组合物除水以外的总量为0.05〜7.0重量％的两亲性聚合物。

公开(公告)号：US20100243299A1

公开(公告)日：2010-09-30

申请号：US12609447

申请日：2009-10-30

申请人： Takashi Kariya ,  Kazuhiro Yoshikawa ,  Daiki Komatsu ,  Ramesh Bhandari

发明人： Takashi Kariya ,  Kazuhiro Yoshikawa ,  Daiki Komatsu ,  Ramesh Bhandari

IPC分类号： H05K1/02 ,  B32B38/10

CPC分类号： H05K3/429 ,  H01L21/486 ,  H01L23/13 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0271 ,  H05K1/183 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4694 ,  H05K2201/0187 ,  H05K2201/068 ,  Y10T29/49165 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.

摘要翻译： 多层印刷布线板包括具有穿透部分的芯基材，容纳在芯基材的穿透部分内的低热膨胀基板，并且具有用于安装半导体元件的第一表面和在相对侧上的第二表面 所述第一通孔导体设置在所述低热膨胀基板内部并且设置用于在所述低热膨胀基板的第一表面和所述第二表面之间的电连接，填充在所述低热膨胀基板之间的间隙中的填料 低热膨胀基板和芯基材的内壁，以及形成在低热膨胀基板的第一表面和第二表面中的至少一个上的布线层，并且具有树脂绝缘层和导电 层。 布线层具有连接第一通孔导体和导电层的通孔导体。