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    SEMICONDUCTOR DIE WITH CONVERSION COATING
    51.
    发明申请
    SEMICONDUCTOR DIE WITH CONVERSION COATING 有权

    公开(公告)号：US20220005760A1

    公开(公告)日：2022-01-06

    申请号：US17475295

    申请日：2021-09-14

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Nazila Dadvand ,  Christopher Daniel Manack

    IPC: H01L23/522 ,  H01L23/31 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

    Abstract: A die includes a semiconductor layer, an electrical contact on a first side of the semiconductor layer, a backside electrical contact layer on second side of the semiconductor layer. The die further includes a zinc layer over at least one of the electrical contact or the backside electrical contact layer of the die, and a conversion coating over the zinc layer. The conversion coating includes at least one of zirconium and vanadium. As part of an embedded die package including the die, at least a portion of the conversion coating may adjacent to an electrically insulating substrate of the embedded die package.

    Contact fabrication to mitigate undercut
    53.
    发明授权
    Contact fabrication to mitigate undercut 有权

    公开(公告)号：US10796956B2

    公开(公告)日：2020-10-06

    申请号：US16022956

    申请日：2018-06-29

    Applicant: Texas Instruments Incorporated

    Inventor： Nazila Dadvand ,  Christopher Daniel Manack ,  Salvatore Frank Pavone

    IPC: H01L21/768 ,  H01L23/00 ,  H01L23/532

    Abstract: Described examples provide microelectronic devices and fabrication methods, including fabricating a contact structure by forming a titanium or titanium tungsten barrier layer on a conductive feature, forming a tin seed layer on the barrier layer, forming a copper structure on the seed layer above the conductive feature of the wafer or die, heating the seed layer and the copper structure to form a bronze material between the barrier layer and the copper structure, removing the seed layer using an etching process that selectively removes an exposed portion of the seed layer, and removing an exposed portion of the barrier layer.

    Semiconductor device with electroplated die attach
    55.
    发明授权
    Semiconductor device with electroplated die attach 有权

    公开(公告)号：US10607931B2

    公开(公告)日：2020-03-31

    申请号：US16026371

    申请日：2018-07-03

    Applicant: Texas Instruments Incorporated

    Inventor： Nazila Dadvand ,  Christopher Daniel Manack

    IPC: H01L23/48 ,  H01L23/498 ,  H01L23/00 ,  H01L23/532

    Abstract: A packaged semiconductor device includes a metal substrate having a center aperture with a plurality of raised traces around the center aperture including a metal layer on a dielectric base layer. A semiconductor die that has a back side metal (BSM) layer is mounted top side up in a top portion of the center aperture. A single metal layer directly between the BSM layer and walls of the metal substrate bounding the center aperture to provide a die attachment that fills a bottom portion of the center aperture. Leads having at least one bend that contact the metal layer are on the plurality of traces and include a distal portion that extends beyond the metal substrate. Bond wires are between the traces and bond pads on the semiconductor die. A mold compound provides encapsulation.

    Zinc Layer For A Semiconductor Die Pillar
    56.
    发明申请
    Zinc Layer For A Semiconductor Die Pillar 审中-公开

    公开(公告)号：US20190109062A1

    公开(公告)日：2019-04-11

    申请号：US15909679

    申请日：2018-03-01

    Applicant: Texas Instruments Incorporated

    Inventor： Nazila Dadvand ,  Keith Edward Johnson ,  Christopher Daniel Manack ,  Salvatore Frank Pavone

    IPC: H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

    Abstract: A method for fabricating a copper pillar. The method includes forming a layer of titanium tungsten (TiW) over a semiconductor wafer, forming a layer of zinc (Zn) over the layer of TiW, and forming a copper pillar over the via. In addition, the method includes performing an anneal to diffuse the layer of Zn into the copper pillar. A semiconductor device that includes a layer of TiW coupled to a via of a semiconductor wafer and a copper pillar coupled to the layer of TiW. The copper pillar has interdiffused Zn within its bottom portion. Another method for fabricating a copper pillar includes forming a layer of TiW over a semiconductor wafer, forming a first patterned photoresist, forming a layer of Zn, and then removing the first patterned photoresist. The method further includes forming a second patterned photoresist and forming a copper pillar.

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