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公开(公告)号：US09520351B2
公开(公告)日：2016-12-13
申请号：US14564145
申请日：2014-12-09
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Chang-Fu Lin , Chin-Tsai Yao , Ming-Chin Chuang , Ko-Cheng Liu , Fu-Tang Huang
IPC: H01L23/00 , H01L23/498 , H05K1/02 , H01L23/31
CPC classification number: H01L23/49822 , H01L23/3121 , H01L23/49838 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15174 , H01L2924/181 , H05K1/0298 , H05K2201/0191 , H05K2201/0195 , H01L2924/00012 , H01L2924/00
Abstract: A packaging substrate and a package structure are provided. The packaging substrate includes a plurality of dielectric layers, two of which have a difference in thickness; and a plurality of circuit layers alternately stacked with the dielectric layers. Therefore, the package warpage encountered in the prior art is avoided.
Abstract translation: 提供了一种封装基板和封装结构。 包装衬底包括多个电介质层，其中两个具有不同的厚度; 以及与电介质层交替层叠的多个电路层。 因此，避免了现有技术中遇到的包装翘曲。
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62.发明申请FLIP-CHIP PACKAGING SUBSTRATE, FLIP-CHIP PACKAGE AND FABRICATION METHODS THEREOF 审中-公开卷芯片包装基板，卷芯片包装及其制造方法公开(公告)号：US20150235914A1
公开(公告)日：2015-08-20
申请号：US14328092
申请日：2014-07-10
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Chang-Fu Lin , Chin-Tsai Yao , Ming-Chin Chuang , Po-Hua Chen , Fu-Tang Huang
CPC classification number: H05K3/4661 , C25D5/02 , C25D5/48 , C25D7/00 , H01L21/4853 , H01L23/49894 , H01L24/16 , H01L24/81 , H01L2224/131 , H01L2224/16237 , H01L2224/81191 , H01L2224/81385 , H01L2224/81444 , H01L2224/81815 , H01L2924/3841 , H05K1/111 , H05K3/244 , H05K3/3436 , H05K2201/09745 , H05K2201/099 , H05K2201/10674 , H01L2924/00014 , H01L2924/014
Abstract: A flip-chip packaging substrate is provided, which includes: a substrate body; a plurality of conductive pads formed on a surface of the substrate body; an insulating layer formed on the surface of the substrate body and having a plurality of openings correspondingly exposing a portion of each of the conductive pads; and a metal layer formed on each of the conductive pads in the openings, wherein the metal layer has a top surface having a lowest point lower than a top surface of the insulating layer, and a thickness ratio of the metal layer to the insulating layer is greater than or equal to 1/4 and less than 1, thereby preventing a solder bridge or short circuit from occurring.
Abstract translation: 提供一种倒装芯片封装基板，其包括：基板主体; 形成在所述基板主体的表面上的多个导电焊盘; 绝缘层，其形成在所述基板主体的表面上并且具有多个开口，对应地暴露所述导电焊盘的每一个的一部分; 以及形成在所述开口中的每个所述导电焊盘上的金属层，其中，所述金属层具有比所述绝缘层的顶表面低的最低点的顶表面，并且所述金属层与所述绝缘层的厚度比为 大于或等于1/4且小于1，从而防止发生焊料桥或短路。
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公开(公告)号：US20150014848A1
公开(公告)日：2015-01-15
申请号：US14258361
申请日：2014-04-22
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Chang-Fu Lin , Chin-Tsai Yao , Ming-Chin Chuang , Fu-Tang Huang
IPC: H01L23/00
CPC classification number: H01L24/81 , H01L21/4846 , H01L23/49811 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L2224/0401 , H01L2224/05572 , H01L2224/131 , H01L2224/13147 , H01L2224/1601 , H01L2224/16057 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/17106 , H01L2224/73204 , H01L2224/81385 , H01L2224/81815 , H01L2924/01029 , H01L2924/35121 , H01L2924/00014 , H01L2924/014 , H01L2924/00012
Abstract: A semiconductor device is disclosed, which includes: a substrate having a substrate body and a plurality of conductive pads formed on the substrate body, wherein each of the conductive pads has at least an opening formed in a first surface thereof; a semiconductor component having a plurality of bonding pads; a plurality of conductive elements formed between the bonding pads and the conductive pads and in the openings of the conductive pads; and an encapsulant formed between the substrate and the semiconductor component for encapsulating the conductive elements, thereby strengthening the bonding between the conductive elements and the conductive pads and consequently increasing the product yield.
Abstract translation: 公开了一种半导体器件，其包括：具有基板主体的基板和形成在基板主体上的多个导电焊盘，其中每个导电焊盘至少形成在其第一表面中的开口; 具有多个接合焊盘的半导体部件; 在所述接合焊盘和所述导电焊盘之间以及所述导电焊盘的所述开口中形成的多个导电元件; 以及形成在衬底和半导体部件之间用于封装导电元件的密封剂，从而加强导电元件和导电焊盘之间的接合，从而提高产品产量。
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公开(公告)号：US12255165B2
公开(公告)日：2025-03-18
申请号：US18602396
申请日：2024-03-12
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor： Chi-Ren Chen , Po-Yung Chang , Pei-Geng Weng , Yuan-Hung Hsu , Chang-Fu Lin , Don-Son Jiang
IPC: H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498
Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.
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公开(公告)号：US11984379B2
公开(公告)日：2024-05-14
申请号：US17370207
申请日：2021-07-08
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor： Yu-Lung Huang , Chih-Ming Huang , Kuo-Hua Yu , Chang-Fu Lin
IPC: H01L23/367 , H01L21/48 , H01L23/373 , H01L23/42 , H01L23/00
CPC classification number: H01L23/3675 , H01L21/4871 , H01L23/3736 , H01L23/42 , H01L24/73 , H01L2224/73204
Abstract: Provided is an electronic package, in which a heat dissipating body is formed on an electronic device and is combined with a heat sink so that the electronic device, the heat dissipating body and the heat sink form a receiving space, and a heat dissipating material is formed in the receiving space and in contact with the heat sink and the electronic device, where a fluid regulating space is formed between the heat dissipating material and the heat dissipating body and is used as a volume regulating space for the heat dissipating material during thermal expansion and contraction.
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Patent Agency Ranking
公开(公告)号：US20230361091A1
公开(公告)日：2023-11-09
申请号：US18220501
申请日：2023-07-11
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor： Wei-Jhen Chen , Chih-Hsun Hsu , Yuan-Hung Hsu , Chih-Nan Lin , Chang-Fu Lin , Don-Son Jiang , Chih-Ming Huang , Yi-Hsin Chen
IPC: H01L25/10 , H01L23/498 , H01L23/00 , H01L21/56
CPC classification number: H01L25/105 , H01L23/49822 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L21/565 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/107 , H01L2224/16227 , H01L2224/16238 , H01L2224/32225 , H01L2224/81801 , H01L2924/182 , H01L2224/73204
Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.
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公开(公告)号：US11792938B2
公开(公告)日：2023-10-17
申请号：US17086888
申请日：2020-11-02
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Yu-Lung Huang , Chee-Key Chung , Chang-Fu Lin , Yuan-Hung Hsu
CPC classification number: H05K1/184 , H05K1/0271 , H05K3/303 , H05K3/4697 , H05K2201/10568
Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.
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公开(公告)号：US11742296B2
公开(公告)日：2023-08-29
申请号：US17134925
申请日：2020-12-28
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor： Wei-Jhen Chen , Chih-Hsun Hsu , Yuan-Hung Hsu , Chih-Nan Lin , Chang-Fu Lin , Don-Son Jiang , Chih-Ming Huang , Yi-Hsin Chen
IPC: H01L23/538 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/31 , H01L23/00 , H01L25/065 , H01L25/00
CPC classification number: H01L23/5386 , H01L21/4853 , H01L21/4857 , H01L21/563 , H01L21/6835 , H01L23/3157 , H01L23/5381 , H01L23/5383 , H01L24/16 , H01L25/0655 , H01L25/50 , H01L2221/68359 , H01L2224/16227 , H01L2924/18161
Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.
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公开(公告)号：US20220399245A1
公开(公告)日：2022-12-15
申请号：US17370207
申请日：2021-07-08
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor： Yu-Lung Huang , Chih-Ming Huang , Kuo-Hua Yu , Chang-Fu Lin
IPC: H01L23/367 , H01L23/373 , H01L23/42 , H01L21/48
Abstract: Provided is an electronic package, in which a heat dissipating body is formed on an electronic device and is combined with a heat sink so that the electronic device, the heat dissipating body and the heat sink form a receiving space, and a heat dissipating material is formed in the receiving space and in contact with the heat sink and the electronic device, where a fluid regulating space is formed between the heat dissipating material and the heat dissipating body and is used as a volume regulating space for the heat dissipating material during thermal expansion and contraction.
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公开(公告)号：US20220336323A1
公开(公告)日：2022-10-20
申请号：US17854241
申请日：2022-06-30
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor： Yu-Lung Huang , Chee-Key Chung , Chang-Fu Lin , Yuan-Hung Hsu
IPC: H01L23/433 , H01L21/48 , H01L23/00
Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.
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