公开(公告)号：US20230059655A1

公开(公告)日：2023-02-23

申请号：US17406104

申请日：2021-08-19

申请人： Tien-I Bao

发明人： Tien-I Bao

IPC分类号： F17C13/04 ,  F16K11/07 ,  F16K24/04 ,  F17C9/00

摘要： A controllable gas-storage-form gas supply tube device includes a three way tube having a first opening, a second opening and a third opening; an electric control valve device installed in the three way tube for controlling connections of the three openings; an input tube, a close form air storage tube and a draining tube are connected to the first, second and third openings, respectively. When the electric control valve device is at a first position, the third opening is closed and the first and second openings are communicated so that gas from the input tube flows to the close form air storage tube and is stored therein. When the electric control valve device is at a second position, the first opening is closed, and the second and third openings are communicated so that gas in the close form air storage tube flow to the draining tube.

公开(公告)号：US10180547B2

公开(公告)日：2019-01-15

申请号：US13403566

申请日：2012-02-23

申请人： Wan-Yu Lee ,  Chun-Hao Tseng ,  Hai-Ching Chen ,  Tien-I Bao

发明人： Wan-Yu Lee ,  Chun-Hao Tseng ,  Hai-Ching Chen ,  Tien-I Bao

IPC分类号： G02B6/42 ,  H01S5/022 ,  H01S5/00

摘要： An optical bench on substrate includes a substrate and a trench formed inside the substrate and having a sloping side. A reflector layer is formed over the sloping side. An optical component is mounted over the substrate. The reflector layer is configured to reflect an electromagnetic wave to or from the optical component.

公开(公告)号：US08835304B2

公开(公告)日：2014-09-16

申请号：US13599764

申请日：2012-08-30

申请人： Chih Wei Lu ,  Chung-Ju Lee ,  Hsiang-Huan Lee ,  Tien-I Bao

发明人： Chih Wei Lu ,  Chung-Ju Lee ,  Hsiang-Huan Lee ,  Tien-I Bao

IPC分类号： H01L21/00

CPC分类号： H01L21/76852 ,  H01L21/7682 ,  H01L21/76885 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate. A sacrifice layer (SL) is formed and patterned on the substrate. The patterned SL has a plurality of openings. The method also includes forming a metal layer in the openings and then removing the patterned SL to laterally expose at least a portion of the metal layer to form a metal feature, which has a substantial same profile as the opening. A dielectric layer is deposited on sides of the metal feature.

摘要翻译： 公开了制造半导体集成电路（IC）的方法。 该方法包括提供基板。 牺牲层（SL）在衬底上形成并图案化。 图案化SL具有多个开口。 该方法还包括在开口中形成金属层，然后移除图案化的SL以横向暴露金属层的至少一部分以形成具有与开口基本相同的轮廓的金属特征。 电介质层沉积在金属特征的侧面上。

公开(公告)号：US20140021614A1

公开(公告)日：2014-01-23

申请号：US13554817

申请日：2012-07-20

申请人： Chen-Hua Yu ,  Tien-I Bao

发明人： Chen-Hua Yu ,  Tien-I Bao

IPC分类号： H01L23/485 ,  H01L21/28

CPC分类号： H01L23/5226 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/53219 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device includes a first low-k dielectric layer, and a copper-containing via in the first low-k dielectric layer. The device further includes a second low-k dielectric layer over the first low-k dielectric layer, and an aluminum-containing metal line over and electrically coupled to the copper-containing via. The aluminum-containing metal line is in the second low-k dielectric layer.

摘要翻译： 器件包括第一低k电介质层和第一低k电介质层中的含铜通孔。 该器件还包括位于第一低k电介质层上的第二低k电介质层和在含铜通孔上电耦合的含铝金属线。 含铝金属线在第二低k电介质层中。

公开(公告)号：US20130334700A1

公开(公告)日：2013-12-19

申请号：US13526640

申请日：2012-06-19

申请人： Sunil Kumar Singh ,  Chung-Ju Lee ,  Tien-I Bao

发明人： Sunil Kumar Singh ,  Chung-Ju Lee ,  Tien-I Bao

IPC分类号： H01L23/48 ,  H01L21/283 ,  H01L21/768

CPC分类号： H01L21/76808 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76835 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76885 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1026 ,  H01L2221/1031 ,  H01L2221/1036 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a dual damascene metal interconnect for a semiconductor device. The method includes forming a layer of low-k dielectric, forming vias through the low-k dielectric layer, depositing a sacrificial layer, forming trenches through the sacrificial layer, filling the vias and trenches with metal, removing the sacrificial layer, then depositing an extremely low-k dielectric layer to fill between the trenches. The method allows the formation of an extremely low-k dielectric layer for the second level of the dual damascene structure while avoiding damage to that layer by such processes as trench etching and trench metal deposition. The method has the additional advantage of avoiding an etch stop layer between the via level dielectric and the trench level dielectric.

摘要翻译： 一种形成用于半导体器件的双镶嵌金属互连的方法。 该方法包括形成低k电介质层，通过低k电介质层形成通孔，沉积牺牲层，通过牺牲层形成沟槽，用金属填充通孔和沟槽，去除牺牲层，然后沉积 极低k电介质层填充沟槽之间。 该方法允许形成用于第二级双镶嵌结构的极低k电介质层，同时通过沟槽蚀刻和沟槽金属沉积等工艺避免对该层的损伤。 该方法具有避免通孔级电介质和沟槽级电介质之间的蚀刻停止层的额外优点。

公开(公告)号：US20120289062A1

公开(公告)日：2012-11-15

申请号：US13562101

申请日：2012-07-30

申请人： Ching-Yu Lo ,  Hung-Jung Tu ,  Hai-Ching Chen ,  Tien-I Bao ,  Wen-Chih Chiou ,  Chen-Hua Yu

发明人： Ching-Yu Lo ,  Hung-Jung Tu ,  Hai-Ching Chen ,  Tien-I Bao ,  Wen-Chih Chiou ,  Chen-Hua Yu

IPC分类号： H01L21/71

CPC分类号： H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/02 ,  H01L2221/68372 ,  H01L2224/0557 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/05552 ,  H01L2924/00

摘要： An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.

摘要翻译： 集成电路结构包括半导体衬底; 贯穿半导体衬底的贯通半导体通孔（TSV）开口; 和TSV开口的TSV衬管。 TSV衬套包括在TSV开口的侧壁上的侧壁部分和TSV开口底部的底部。 TSV衬管的底部部分的底部高度大于TSV衬套的侧壁部分的中间厚度。

公开(公告)号：US08030781B2

公开(公告)日：2011-10-04

申请号：US12233974

申请日：2008-09-19

申请人： Chen-Hua Yu ,  Tien-I Bao

发明人： Chen-Hua Yu ,  Tien-I Bao

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L23/5226 ,  H01L24/06 ,  H01L24/45 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05097 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48666 ,  H01L2224/48684 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48766 ,  H01L2224/48784 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48866 ,  H01L2224/48881 ,  H01L2224/48884 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/48781 ,  H01L2224/48681

摘要： A semiconductor structure is provided. In one embodiment, a bond pad is formed above one or more underlying layers of a substrate. A plurality of dummy plugs are spaced around the bond pad, the plurality of dummy plugs substantially vertically traversing the one or more underlying layers, wherein the plurality of dummy plugs anchor at least two of the underlying layers together to achieve improved mechanical strength.

摘要翻译： 提供半导体结构。 在一个实施例中，在衬底的一个或多个下层上方形成接合焊盘。 多个虚拟插头围绕接合焊盘间隔开，多个虚拟插头基本垂直地穿过一个或多个下层，其中多个虚拟插头将至少两个下面的层固定在一起以实现改进的机械强度。

公开(公告)号：US20110223762A1

公开(公告)日：2011-09-15

申请号：US13115161

申请日：2011-05-25

申请人： Chen-Hua Yu ,  Hai-Ching Chen ,  Tien-I Bao

发明人： Chen-Hua Yu ,  Hai-Ching Chen ,  Tien-I Bao

IPC分类号： H01L21/283

CPC分类号： H01L23/53238 ,  H01L21/322 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-based chemical to form a barrier layer on the conductive wiring. A lining barrier layer is formed in the opening for embedding the conductive wiring. The lining barrier layer may comprise same materials as the barrier layer, and the lining barrier layer may be recessed before forming the barrier layer and may contain a metal that can be silicided.

摘要翻译： 形成半导体结构的方法包括提供基板; 在衬底上形成低k电介质层; 将导电布线嵌入到低k电介质层中; 并且将导电布线热浸在含碳硅烷类化学品中以在导电布线上形成阻挡层。 在用于嵌入导电布线的开口中形成衬里阻挡层。 衬里阻挡层可以包括与阻挡层相同的材料，并且衬里阻挡层可以在形成阻挡层之前被凹入，并且可以包含可以被硅化的金属。

公开(公告)号：US07964496B2

公开(公告)日：2011-06-21

申请号：US11602808

申请日：2006-11-21

申请人： Chen-Hua Yu ,  Hai-Ching Chen ,  Tien-I Bao

发明人： Chen-Hua Yu ,  Hai-Ching Chen ,  Tien-I Bao

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/322 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-based chemical to form a barrier layer on the conductive wiring. A lining barrier layer is formed in the opening for embedding the conductive wiring. The lining barrier layer may comprise same materials as the barrier layer, and the lining barrier layer may be recessed before forming the barrier layer and may contain a metal that can be silicided.

摘要翻译： 形成半导体结构的方法包括提供基板; 在衬底上形成低k电介质层; 将导电布线嵌入到低k电介质层中; 并且将导电布线热浸在含碳硅烷类化学品中以在导电布线上形成阻挡层。 在用于嵌入导电布线的开口中形成衬里阻挡层。 衬里阻挡层可以包括与阻挡层相同的材料，并且衬里阻挡层可以在形成阻挡层之前被凹入，并且可以包含可以被硅化的金属。

公开(公告)号：US20080258303A1

公开(公告)日：2008-10-23

申请号：US11788986

申请日：2007-04-23

申请人： Ming-Shih Yeh ,  Tien-I Bao ,  David Ding-Chung Lu

发明人： Ming-Shih Yeh ,  Tien-I Bao ,  David Ding-Chung Lu

IPC分类号： H01L23/528 ,  H01L21/44

CPC分类号： H01L21/7684 ,  H01L21/288 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76849

摘要： A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a dielectric layer; a chemical mechanical polish (CMP) stop layer on the dielectric layer; a conductive wiring in the dielectric layer; and a metal cap over the conductive wiring.

摘要翻译： 提供半导体结构及其形成方法。 半导体结构包括电介质层; 电介质层上的化学机械抛光（CMP）停止层; 电介质层中的导电布线; 和导电布线上的金属盖。