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公开(公告)号：US20130320567A1
公开(公告)日：2013-12-05
申请号：US13489401
申请日：2012-06-05
IPC分类号： H01L23/488 , H01L21/78
CPC分类号： H01L24/72 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/26 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/94 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/13009 , H01L2224/131 , H01L2224/13116 , H01L2224/13147 , H01L2224/14181 , H01L2224/16145 , H01L2224/26145 , H01L2224/26175 , H01L2224/32145 , H01L2224/72 , H01L2224/73204 , H01L2224/81005 , H01L2224/81203 , H01L2224/81815 , H01L2224/83191 , H01L2224/92125 , H01L2224/94 , H01L2225/06513 , H01L2225/06531 , H01L2225/06534 , H01L2225/06541 , H01L2225/06562 , H01L2924/12042 , H01L2924/37001 , H01L2224/81 , H01L2224/11 , H01L2924/014 , H01L2924/00012 , H01L2224/90 , H01L2924/00
摘要： A chip package is described which includes a first chip having a first surface and first sides having a first side-wall angle, and a second chip having a second surface and second sides having a second side-wall angle, which faces and is mechanically coupled to the first chip. The chip package is fabricated using a batch process, and the chips in the chip package were singulated from their respective wafers after the chip package is assembled. This is accomplished by etching the first and second side-wall angles and thinning the wafer thicknesses prior to assembling the chip package. For example, the first and/or the second side walls can be fabricated using wet etching or dry etching. Therefore, the first and/or the second side-wall angles may be other than vertical or approximately vertical.
摘要翻译： 描述了一种芯片封装，其包括具有第一表面和第一侧面具有第一侧壁角度的第一芯片和具有第二表面和第二侧面的第二侧面的第二芯片，所述第二表面和第二侧面具有第二侧壁角度， 到第一个芯片。 使用间歇工艺制造芯片封装，并且在芯片封装组装之后，芯片封装中的芯片从它们各自的晶片分离。 这通过在组装芯片封装之前蚀刻第一和第二侧壁角度并使晶片厚度变薄来实现。 例如，可以使用湿蚀刻或干蚀刻来制造第一和/或第二侧壁。 因此，第一和/或第二侧壁角度可以不同于垂直或近似垂直。
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公开(公告)号：US08531042B2
公开(公告)日：2013-09-10
申请号：US12495057
申请日：2009-06-30
IPC分类号： H01L29/41
CPC分类号： B81C3/008 , B81C1/0019 , H01L21/4846 , H01L23/36 , H01L23/49811 , H01L24/72 , H01L24/73 , H01L24/81 , H01L24/90 , H01L25/0652 , H01L2224/81192 , H01L2924/14 , H01L2924/351 , Y10T29/49217 , Y10T29/49218 , H01L2924/00
摘要： A processing technique facilitating the fabrication of the integrated circuit with microsprings at different vertical positions relative to a surface of a substrate is described. During the fabrication technique, microsprings are lithographically defined on surfaces of a first substrate and a second substrate. Then, a hole is created through a first substrate. Moreover, the integrated circuit may be created by rigidly mechanically coupling the two substrates to each other such that the microsprings on the surface of the second substrate are within a region defined at least in part by an edge around the hole. Subsequently, photoresist that constrains the microsprings on the surfaces of the two substrates may be removed. In this way, microsprings at the different vertical positions can be fabricated.
摘要翻译： 描述了一种有助于在相对于衬底的表面在不同垂直位置处形成具有微球的集成电路的处理技术。 在制造技术期间，在第一基板和第二基板的表面上光刻地限定微弹簧。 然后，通过第一基板产生孔。 此外，集成电路可以通过将两个基板彼此刚性地机械耦合而形成，使得第二基板的表面上的微弹簧在至少部分地由孔周围的边缘限定的区域内。 随后，可以除去限制两个基板表面上的微球的光致抗蚀剂。 以这种方式，可以制造在不同垂直位置的微球。
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公开(公告)号：US08325773B2
公开(公告)日：2012-12-04
申请号：US13326297
申请日：2011-12-14
IPC分类号： H01S3/04
CPC分类号： H01S5/423 , H01S5/005 , H01S5/02453 , H01S5/02461 , H01S5/0261 , H01S5/0422 , H01S5/0612 , H01S5/18305 , H01S5/18327 , H01S5/4087
摘要： One embodiment of the present invention provides a system that facilitates adjusting the wavelengths of lasers via temperature control. This system includes a chip with an active face upon which active circuitry and signal pads reside. A thermal-control mechanism provides localized thermal control of two lasers mounted upon the active face of the chip. By individually controlling the temperature of the lasers, the thermal-control mechanism controls the wavelengths emitted by each respective laser. By creating a temperature gradient that causes a temperature difference between two or more lasers, the system can cause the lasers to emit different wavelengths.
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公开(公告)号：US08195990B2
公开(公告)日：2012-06-05
申请号：US13212900
申请日：2011-08-18
IPC分类号： G11B5/00
CPC分类号： H04B5/0075 , H01L25/065 , H01L2924/0002 , H04B17/318 , H04L1/0009 , Y10T29/49133 , H01L2924/00
摘要： In a proximity communication system, transmit elements on one chip are aligned with receive elements on a second chip juxtaposed with the first chip. However, if the elements are misaligned, either statically or dynamically, the coupling between chips is degraded. The misalignment may be compensated by controllably degrading performance of the system. For example, the transmit signal strength may be increased. The bit period or the time period for biasing each bit may be increased, thereby decreasing the bandwidth. Multiple coupling elements, such as capacitors, may be ganged together, thereby decreasing the number of channels. The granularity of symbols, such as images, may be increased by decreasing the number of bits per symbol. Multiple coupling elements, such as capacitors, may be ganged together, thereby decreasing the number of channels.
摘要翻译： 在接近通信系统中，一个芯片上的发射元件与与第一芯片并置的第二芯片上的接收元件对齐。 然而，如果元件是静态的或动态的，则芯片之间的耦合会降低。 可以通过可控地降低系统的性能来补偿未对准。 例如，可以增加发射信号强度。 可以增加用于偏置每个位的位周期或时间段，从而降低带宽。 诸如电容器的多个耦合元件可以组合在一起，从而减少通道数量。 可以通过减少每个符号的比特数来增加诸如图像的符号的粒度。 诸如电容器的多个耦合元件可以组合在一起，从而减少通道数量。
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公开(公告)号：US08188581B2
公开(公告)日：2012-05-29
申请号：US12568024
申请日：2009-09-28
IPC分类号： H01L23/495
CPC分类号： H01L23/13 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L2224/16147 , H01L2224/16237 , H01L2224/48091 , H01L2224/48227 , H01L2224/73257 , H01L2224/81141 , H01L2224/81191 , H01L2225/0651 , H01L2225/06517 , H01L2225/06593 , H01L2924/00014 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01051 , H01L2924/01056 , H01L2924/01079 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A multi-chip module (MCM) is described. This MCM includes at least two substrates that are remateably mechanically coupled by positive and negative features on facing surfaces of the substrates. These positive and negative features mate with each other. In particular, a positive feature may mate with a given pair of negative features, which includes negative features on each of the substrates. Furthermore, at least one of the negative features in the given pair may include a hard magnetic material, and the positive feature and the other negative feature in the given pair may include a soft magnetic material that provide a flux-return path to the hard magnetic material. In this way, the hard magnetic material may facilitate the remateable mechanical coupling of the substrates.
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公开(公告)号：US20110281395A1
公开(公告)日：2011-11-17
申请号：US11864369
申请日：2007-09-28
IPC分类号： H01L21/50
CPC分类号： H01L23/48 , H01L25/0657 , H01L25/50 , H01L2224/16 , H01L2225/06513 , H01L2225/06531 , H01L2225/06534 , H01L2225/06593 , H01L2924/01079 , H01L2924/10253 , H01L2924/00
摘要： Embodiments of a method for assembling a multi-chip module (MCM) are described. During this method, a fluid that includes coupling elements is applied to a surface of a base plate in the MCM. Then, at least some of the coupling elements are positioned into negative features on the surface of the base plate using fluidic assembly. Note that a given coupling element selects a given negative feature using chemical-based selection and/or geometry-based selection. Next, the fluid and excess coupling elements (which reside in regions outside of the negative features on the surface) are removed.
摘要翻译： 描述了用于组装多芯片模块（MCM）的方法的实施例。 在该方法中，包括耦合元件的流体被施加到MCM中的基板的表面。 然后，使用流体组件将至少一些联接元件定位在基板的表面上的负特征中。 注意，给定的耦合元件使用基于化学的选择和/或基于几何的选择来选择给定的负特征。 接下来，去除流体和过量的耦合元件（其位于表面上的负特征之外的区域中）。
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公开(公告)号：US20110278718A1
公开(公告)日：2011-11-17
申请号：US12781732
申请日：2010-05-17
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L23/13 , H01L23/48 , H01L23/49811 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/0652 , H01L25/50 , H01L2224/0401 , H01L2224/05557 , H01L2224/05558 , H01L2224/05571 , H01L2224/05655 , H01L2224/05671 , H01L2224/13147 , H01L2224/13155 , H01L2224/1319 , H01L2224/13541 , H01L2224/13561 , H01L2224/1357 , H01L2224/13578 , H01L2224/13611 , H01L2224/14051 , H01L2224/14505 , H01L2224/16147 , H01L2224/16225 , H01L2224/16227 , H01L2224/1703 , H01L2224/17517 , H01L2224/81141 , H01L2224/81211 , H01L2224/81815 , H01L2225/06531 , H01L2225/06593 , H01L2924/0002 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/15787 , H01L2924/00012 , H01L2924/00014 , H01L2924/01082 , H01L2924/01079 , H01L2924/01029 , H01L2924/01049 , H01L2924/206 , H01L2924/01028 , H01L2224/05552 , H01L2924/00
摘要： A multi-chip module (MCM) that includes at least two substrates, having facing surfaces, which are mechanically coupled by a set of coupling elements having a reflow characteristic, is described. One of the two substrates includes another set of coupling elements having another reflow characteristic, which is different than the reflow characteristic. These different reflow characteristics of the sets of coupling elements allow different temperature profiles to be used when bonding the two substrates to each other than when bonding the one of the two substrates to a carrier. For example, the temperature profiles may have different peak temperatures and/or different durations from one another. These reflow characteristics may facilitate low-cost, high-yield assembly and alignment of the substrates in the MCM, and may allow temperature-sensitive components to be included in the MCM.
摘要翻译： 描述了包括具有面对表面的至少两个基板的多芯片模块（MCM），其通过一组具有回流特性的耦合元件机械耦合。 两个基板中的一个包括另一组具有不同于回流特性的另外的回流特性的耦合元件。 耦合元件组的这些不同的回流特性允许在将两个基板彼此接合时使用不同的温度曲线，而不是将两个基板中的一个接合到载体上。 例如，温度分布可以具有不同的峰值温度和/或彼此不同的持续时间。 这些回流特性可以促进MCM中的基板的低成本，高产量组装和对准，并且可以允许将温度敏感组件包括在MCM中。
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公开(公告)号：US08039308B2
公开(公告)日：2011-10-18
申请号：US13006227
申请日：2011-01-13
IPC分类号： H01L21/00
CPC分类号： H01L25/0652 , H01L23/10 , H01L23/48 , H01L24/02 , H01L24/16 , H01L24/72 , H01L24/81 , H01L24/95 , H01L25/50 , H01L2224/0401 , H01L2224/13099 , H01L2224/73251 , H01L2224/81136 , H01L2224/81801 , H01L2224/95136 , H01L2225/06513 , H01L2225/06531 , H01L2225/06534 , H01L2225/06593 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01058 , H01L2924/01067 , H01L2924/01074 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10157 , H01L2924/10158 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/351 , H01L2924/00 , H01L2224/16 , H01L2224/72
摘要： Embodiments of a multi-chip module (MCM) are described. This MCM includes a first semiconductor die and a second semiconductor die, where a given semiconductor die, which can be the first semiconductor die or the second semiconductor die, includes proximity connectors proximate to a surface of the given semiconductor die. Moreover, the given semiconductor die is configured to communicate signals with the other semiconductor die via proximity communication through one or more of the proximity connectors. Furthermore, the MCM includes an alignment plate and a top plate coupled to the alignment plate. This alignment plate includes a first negative feature configured to accommodate the first semiconductor die and a second negative feature configured to accommodate the second semiconductor die, and the top plate includes a positive feature. Note that the positive feature is coupled to the first semiconductor die, and the positive feature facilitates mechanical positioning of the first semiconductor die.
摘要翻译： 描述了多芯片模块（MCM）的实施例。 该MCM包括第一半导体管芯和第二半导体管芯，其中可以是第一半导体管芯或第二半导体管芯的给定半导体管芯包括靠近给定半导体管芯的表面的接近连接器。 此外，给定的半导体管芯被配置为通过一个或多个接近连接器的接近通信与另一个半导体管芯通信信号。 此外，MCM包括对准板和联接到对准板的顶板。 该对准板包括被配置为容纳第一半导体管芯的第一负特性构件和被配置为容纳第二半导体管芯的第二负特征，并且顶板包括正特征。 注意，正特征耦合到第一半导体管芯，并且正特征有利于第一半导体管芯的机械定位。
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公开(公告)号：US20100115349A1
公开(公告)日：2010-05-06
申请号：US12263713
申请日：2008-11-03
CPC分类号： H04B5/0075 , H01L25/065 , H01L2924/0002 , H04B17/318 , H04L1/0009 , Y10T29/49133 , H01L2924/00
摘要： In a proximity communication system, transmit elements on one chip are aligned with receive elements on a second chip juxtaposed with the first chip. However, if the elements are misaligned, either statically or dynamically, the coupling between chips is degraded. The misalignment may be compensated by controllably degrading performance of the system. For example, the transmit signal strength may be increased. The bit period or the time period for biasing each bit may be increased, thereby decreasing the bandwidth. Multiple coupling elements, such as capacitors, may be ganged together, thereby decreasing the number of channels. The granularity of symbols, such as images, may be increased by decreasing the number of bits per symbol. Multiple coupling elements, such as capacitors, may be ganged together, thereby decreasing the number of channels.
摘要翻译： 在接近通信系统中，一个芯片上的发射元件与与第一芯片并置的第二芯片上的接收元件对齐。 然而，如果元件是静态的或动态的，则芯片之间的耦合会降低。 可以通过可控地降低系统的性能来补偿未对准。 例如，可以增加发射信号强度。 可以增加用于偏置每个位的位周期或时间段，从而降低带宽。 诸如电容器的多个耦合元件可以组合在一起，从而减少通道数量。 可以通过减少每个符号的比特数来增加诸如图像的符号的粒度。 诸如电容器的多个耦合元件可以组合在一起，从而减少通道数量。
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公开(公告)号：US07619312B2
公开(公告)日：2009-11-17
申请号：US11243300
申请日：2005-10-03
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/544 , H01L23/02 , H01L31/00 , H01L21/00 , H01L21/66
CPC分类号： H01L25/0657 , H01L23/48 , H01L24/72 , H01L24/90 , H01L2224/13 , H01L2224/2919 , H01L2224/81136 , H01L2224/81138 , H01L2224/81141 , H01L2224/81801 , H01L2224/83136 , H01L2224/83194 , H01L2224/838 , H01L2224/83851 , H01L2225/06527 , H01L2225/06531 , H01L2225/06593 , H01L2924/01027 , H01L2924/01033 , H01L2924/01075 , H01L2924/01079 , H01L2924/0665 , H01L2924/10157 , H01L2924/10253 , H01L2924/14 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00014
摘要： A system that facilitates precise inter-chip alignment. The system includes a first integrated circuit chip, whose surface has etch pit wells. The system also includes a second integrated circuit chip, whose surface has corresponding etch pit wells that mate with the etch pit wells of the first integrated circuit chip. Spherical balls are placed in the etch pit wells of the first integrated circuit chip such that when the corresponding etch pit wells of the second integrated circuit chip are substantially aligned with the spherical balls, the spherical balls mate with the etch well pits of the second integrated circuit chip, thereby precisely aligning the first integrated circuit chip with the second integrated circuit chip.
摘要翻译： 一种便于精确的芯片间对准的系统。 该系统包括第一集成电路芯片，其表面具有蚀刻凹坑。 该系统还包括第二集成电路芯片，其表面具有与第一集成电路芯片的蚀刻凹坑相配合的相应蚀刻凹坑。 球形球被放置在第一集成电路芯片的蚀刻凹坑中，使得当第二集成电路芯片的相应蚀刻凹坑基本上与球形球对准时，球形球与第二集成电路芯片的蚀刻井凹坑配合 从而将第一集成电路芯片与第二集成电路芯片精确对准。
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