公开(公告)号：US08166648B2

公开(公告)日：2012-05-01

申请号：US12395885

申请日：2009-03-02

申请人： Katsuya Fukase

发明人： Katsuya Fukase

IPC分类号： H05K3/02 ,  H05K3/10

CPC分类号： H05K3/3452 ,  H05K3/244 ,  H05K3/28 ,  H05K2201/0989 ,  H05K2203/025 ,  H05K2203/0361 ,  H05K2203/0597 ,  H05K2203/308 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/4916

摘要： There is provided a wiring substrate manufacturing method. The wiring substrate includes: a plurality of conductor patterns formed on a mounting surface on which an electronic component is to be mounted, wherein each of the conductor patterns is covered with a corresponding one of solder layers; and partition walls made of insulating material and formed along the conductor patterns on the mounting surface such that each of the partition walls is provided between the adjacent conductor patterns with a clearance interposed therebetween.

摘要翻译： 提供了布线基板的制造方法。 布线基板包括：形成在其上将要安装电子部件的安装表面上的多个导体图案，其中每个导体图案被相应的一个焊料层覆盖; 以及由绝缘材料制成并且沿着安装表面上的导体图案形成的分隔壁，使得每个分隔壁设置在相邻的导体图案之间并且间隔开。

公开(公告)号：US08066862B2

公开(公告)日：2011-11-29

申请号：US12324916

申请日：2008-11-28

申请人： Tomoo Yamasaki ,  Katsuya Fukase

发明人： Tomoo Yamasaki ,  Katsuya Fukase

IPC分类号： C25D5/02

CPC分类号： H05K3/108 ,  H01L2224/16225 ,  H01L2924/15174 ,  H05K1/112 ,  H05K3/062 ,  H05K3/388 ,  H05K3/4644 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2203/025 ,  H05K2203/054 ,  H05K2203/0597

摘要： A manufacturing method of a wiring board includes a sticking layer forming step; a resist film forming step of forming a resist film on an upper surface of the sticking layer, the resist film having an opening exposing the upper surface of the sticking layer; a metal layer forming step of forming a metal layer, so as to cover an upper surface of the resist film and cover a side surface of the resist film and the upper surface of the sticking layer forming the opening for forming the wiring; a plating film forming step of filling with a plating film the opening for forming the wiring; a metal layer and plating film removing step; a resist film removing step; and a sticking layer removing step of removing the sticking layer of an unnecessary part not covered with the metal layer, after the resist film removing step.

摘要翻译： 布线基板的制造方法包括：粘贴层形成工序; 抗蚀剂膜形成步骤，在所述粘贴层的上表面上形成抗蚀剂膜，所述抗蚀膜具有露出所述粘着层的上表面的开口; 形成金属层的金属层形成步骤，以覆盖抗蚀剂膜的上表面并覆盖抗蚀剂膜的侧表面和形成用于形成布线的开口的粘合层的上表面; 电镀薄膜形成步骤，用于向镀膜填充用于形成布线的开口; 金属层和电镀膜去除步骤; 抗蚀剂膜去除步骤; 以及在抗蚀剂膜去除步骤之后去除不被金属层覆盖的不必要部分的粘着层的粘合层去除步骤。

公开(公告)号：US20090236137A1

公开(公告)日：2009-09-24

申请号：US12227377

申请日：2006-05-17

申请人： Yasuo Kaneda ,  Munetoshi Irisawa ,  Yuji Toyoda ,  Toyokazu Komuro ,  Katsuya Fukase ,  Toyoaki Sakai

发明人： Yasuo Kaneda ,  Munetoshi Irisawa ,  Yuji Toyoda ,  Toyokazu Komuro ,  Katsuya Fukase ,  Toyoaki Sakai

IPC分类号： H05K1/11 ,  G03F7/20

CPC分类号： H05K3/426 ,  H05K1/116 ,  H05K3/002 ,  H05K3/108 ,  H05K2201/09545 ,  H05K2203/0191 ,  H05K2203/0574 ,  H05K2203/1184 ,  H05K2203/1394

摘要： There are provided a method for forming a resist pattern for preparing a circuit board having a landless or small-land-width through-hole(s) to realize a high-density circuit board, a method for producing a circuit board, and a circuit board. A method for forming a resist pattern, comprising the steps of forming a resin layer and a mask layer on a first surface of a substrate having a through-hole(s), and removing the resin layer on the through-hole(s) and on a periphery of the through-hole(s) on the first surface by supplying a resin layer removing solution from a second surface opposite to the first surface of the substrate, and a method for producing a circuit board using the method for forming a resist pattern, and a circuit board.

摘要翻译： 提供了一种形成抗蚀剂图案的方法，该抗蚀剂图案用于制备具有无轨或小地平面宽度的通孔的电路板，以实现高密度电路板，生产电路板的方法和电路 板。 一种形成抗蚀剂图案的方法，包括以下步骤：在具有通孔的基板的第一表面上形成树脂层和掩模层，并且除去通孔上的树脂层和 通过从与基板的第一表面相对的第二表面提供树脂层去除溶液，在第一表面的通孔的周边上，以及使用该抗蚀剂形成方法制造电路板的方法 图案和电路板。

公开(公告)号：US20090218122A1

公开(公告)日：2009-09-03

申请号：US12395885

申请日：2009-03-02

申请人： Katsuya Fukase

发明人： Katsuya Fukase

IPC分类号： H05K1/11 ,  C23F1/00

CPC分类号： H05K3/3452 ,  H05K3/244 ,  H05K3/28 ,  H05K2201/0989 ,  H05K2203/025 ,  H05K2203/0361 ,  H05K2203/0597 ,  H05K2203/308 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/4916

摘要： There is provided a wiring substrate. The wiring substrate includes: a plurality of conductor patterns formed on a mounting surface on which an electronic component is to be mounted, wherein each of the conductor patterns is covered with a corresponding one of solder layers; and partition walls made of insulating material and formed along the conductor patterns on the mounting surface such that each of the partition walls is provided between the adjacent conductor patterns with a clearance interposed therebetween.

摘要翻译： 提供了布线基板。 布线基板包括：形成在其上将要安装电子部件的安装表面上的多个导体图案，其中每个导体图案被相应的一个焊料层覆盖; 以及由绝缘材料制成并且沿着安装表面上的导体图案形成的分隔壁，使得每个分隔壁设置在相邻的导体图案之间并且间隔开。

公开(公告)号：US20050124091A1

公开(公告)日：2005-06-09

申请号：US10978521

申请日：2004-11-02

申请人： Katsuya Fukase ,  Toyoaki Sakai

发明人： Katsuya Fukase ,  Toyoaki Sakai

IPC分类号： H01L21/48 ,  H05K3/06 ,  H05K3/20 ,  H01L21/44 ,  H01L21/425 ,  H01L21/50 ,  H01L21/82

CPC分类号： H05K3/064 ,  H01L21/4821 ,  H01L21/4828 ,  H01L21/4846 ,  H05K3/062 ,  H05K3/202 ,  H05K2203/0369 ,  H05K2203/0508 ,  H05K2203/058 ,  H05K2203/0597 ,  H05K2203/1476

摘要： A process for forming a metal pattern comprising the following steps of: (a) half-etching a metal plate from one or respective sides thereof by means of first masking which is positioned on one or respective surfaces of the metal plate; (b) applying positive liquid resist on the half-etched metal plate from one or respective sides of the first masking; (c) exposing the positive liquid resist with light from one or respective sides of the first masking; (d) developing the positive liquid resist in such a manner that unexposed positive liquid resist located under the first masking is protected and exposed, uncured liquid resist is removed; (e) half-etching again the metal plate from one or respective sides thereof by means of second masking composed of the first masking and the protected positive liquid resist; (f) repeating the steps (b) to (e) until a metal pattern is obtained from the metal plate; and (g) removing the first masking, and the second or subsequent masking of the unexposed positive liquid resist, from the metal plate.

摘要翻译： 一种用于形成金属图案的方法，包括以下步骤：（a）通过位于金属板的一个或相应表面上的第一掩模从其一侧或两侧半蚀刻金属板; （b）从第一掩模的一个或相应的两侧向半蚀刻的金属板施加正的液体抗蚀剂; （c）用来自第一掩模的一个或相应侧面的光曝光正极液体抗蚀剂; （d）以防止位于第一掩模下面的未曝光的正性液体抗蚀剂被保护和暴露的方式显影出正的液体抗蚀剂，去除未固化的液体抗蚀剂; （e）通过由第一掩模和受保护的正性液体抗蚀剂组成的第二掩模，从其一侧或两侧再次对金属板进行蚀刻; （f）重复步骤（b）至（e），直到从金属板获得金属图案; 和（g）从金属板去除未曝光的正性液体抗蚀剂的第一掩蔽和第二次或随后的掩蔽。

公开(公告)号：US5909053A

公开(公告)日：1999-06-01

申请号：US761360

申请日：1996-12-09

申请人： Katsuya Fukase ,  Takahiro Iijima ,  Masao Nakazawa ,  Shinichi Wakabayashi

发明人： Katsuya Fukase ,  Takahiro Iijima ,  Masao Nakazawa ,  Shinichi Wakabayashi

IPC分类号： H01L23/50 ,  H01L21/48 ,  H01L23/495 ,  H05K3/20 ,  H05K3/34

CPC分类号： H01L21/4821 ,  H01L23/49534 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/181 ,  H05K3/20 ,  H05K3/202 ,  H05K3/205 ,  H05K3/3421

摘要： In a method for manufacturing a lead frame, a predetermined pattern is formed on a matrix 10 by a resist, an electro-deposition portion is provided in a cavity formed in the resist patterns 12, and the electrodeposition pattern 13 is separated from the matrix 10. The resist pattern is formed on the matrix 10 so that a cavity portion 17 connecting a plurality of cavity 16 ends for inner lead formation can be included in the resist pattern, and an electro-deposition portion is provided into the cavity portion 17 so that the electro-deposition pattern 13 can be formed into a configuration in which the tip ends of the inner leads 22 are connected by a connecting piece 21, and the electro-deposition pattern 13 is separated from the matrix 10 while the tip ends of the inner leads 22 are connected by the connecting piece 21.

摘要翻译： 在制造引线框架的方法中，通过抗蚀剂在矩阵10上形成预定图案，在形成于抗蚀图案12中的空腔中设置电沉积部分，并将电沉积图案13从矩阵10分离 抗蚀剂图形形成在矩阵10上，使得连接多个腔体16的端部用于内部引线形成的空腔部分17可以包括在抗蚀剂图案中，并且将电沉积部分设置到空腔部分17中，使得 电沉积图案13可以形成为通过连接片21连接内部引线22的前端的结构，并且电沉积图案13与基体10分离，同时内部引线22的顶端 引线22由连接片21连接。

公开(公告)号：US07999193B2

公开(公告)日：2011-08-16

申请号：US12247471

申请日：2008-10-08

申请人： Katsuya Fukase ,  Kishio Yokouchi ,  Hideaki Yoshimura

发明人： Katsuya Fukase ,  Kishio Yokouchi ,  Hideaki Yoshimura

IPC分类号： H05K1/11

CPC分类号： H05K3/445 ,  H05K1/056 ,  H05K3/4046 ,  H05K3/4602 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/09827 ,  H05K2201/10234 ,  H05K2201/10416 ,  Y10T29/49124

摘要： There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.

摘要翻译： 提供了布线基板。 布线基板包括：由导电材料形成并在其中具有通孔的芯基板; 绝缘层，形成在所述芯基板的第一和第二表面上; 通过绝缘层在第一和第二表面上形成的布线图案; 以及形成在通孔中并且电连接到布线图案的通孔。 通孔包括：导体球和导体部分。 导体球具有导电表面和覆盖导电表面的绝缘构件。 导电表面的一部分从绝缘构件露出。 导体部分电连接到暴露的导电表面和布线图案。 绝缘构件和绝缘层中的至少一个介于通路和芯基板之间。

公开(公告)号：US20090188806A1

公开(公告)日：2009-07-30

申请号：US12324916

申请日：2008-11-28

申请人： Tomoo Yamasaki ,  Katsuya Fukase

发明人： Tomoo Yamasaki ,  Katsuya Fukase

IPC分类号： C25D5/02

CPC分类号： H05K3/108 ,  H01L2224/16225 ,  H01L2924/15174 ,  H05K1/112 ,  H05K3/062 ,  H05K3/388 ,  H05K3/4644 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2203/025 ,  H05K2203/054 ,  H05K2203/0597

摘要： A manufacturing method of a wiring board includes a sticking layer forming step; a resist film forming step of forming a resist film on an upper surface of the sticking layer, the resist film having an opening exposing the upper surface of the sticking layer; a metal layer forming step of forming a metal layer, so as to cover an upper surface of the resist film and cover a side surface of the resist film and the upper surface of the sticking layer forming the opening for forming the wiring; a plating film forming step of filling with a plating film the opening for forming the wiring; a metal layer and plating film removing step; a resist film removing step; and a sticking layer removing step of removing the sticking layer of an unnecessary part not covered with the metal layer, after the resist film removing step.

摘要翻译： 布线基板的制造方法包括：粘贴层形成工序; 抗蚀剂膜形成步骤，在所述粘贴层的上表面上形成抗蚀剂膜，所述抗蚀膜具有露出所述粘着层的上表面的开口; 形成金属层的金属层形成步骤，以覆盖抗蚀剂膜的上表面并覆盖抗蚀剂膜的侧表面和形成用于形成布线的开口的粘合层的上表面; 电镀薄膜形成步骤，用于向镀膜填充用于形成布线的开口; 金属层和电镀膜去除步骤; 抗蚀剂膜去除步骤; 以及在抗蚀剂膜去除步骤之后去除不被金属层覆盖的不必要部分的粘着层的粘合层去除步骤。

公开(公告)号：US07454832B2

公开(公告)日：2008-11-25

申请号：US11506589

申请日：2006-08-18

申请人： Toyoaki Sakai ,  Katsuya Fukase

发明人： Toyoaki Sakai ,  Katsuya Fukase

IPC分类号： H05K3/02

CPC分类号： H05K3/062 ,  H01L21/4828 ,  H01L21/4846 ,  H01L23/49548 ,  H01L2924/0002 ,  H05K3/202 ,  H05K2203/0369 ,  H05K2203/0597 ,  H05K2203/1476 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49204 ,  H01L2924/00

摘要： A method of forming a high aspect ratio metal plate pattern or circuit board by multi-stage etching with a metal mask is disclosed. A resist (12) is coated on one or two surfaces of a copper plate (10) and patterned into a resist pattern. A tin plating layer (14) is formed using this resist pattern, and with this tin plating layer as a mask, the copper plate is half etched. By coating, exposing and developing the positive resist (18), the positive resist under the tin plating layer is protected. With the tin plating layer and the protective resist layer as a mask, the half etching is executed again. This process is repeated until the resist and the tin plating layer used as a masking are finally removed to produce a metal pattern (20).

摘要翻译： 公开了一种通过金属掩模的多级蚀刻形成高纵横比金属板图案或电路板的方法。 抗蚀剂（12）涂覆在铜板（10）的一个或两个表面上并且被图案化成抗蚀剂图案。 使用该抗蚀剂图案形成镀锡层（14），以该镀锡层为掩模，对铜板进行半蚀刻。 通过涂覆，曝光和显影正性抗蚀剂（18），镀锡层下的正性抗蚀剂得到保护。 以镀锡层和保护层为掩模，再次进行半蚀刻。 重复该过程，直到最终除去用作掩模的抗蚀剂和锡镀层以产生金属图案（20）。

公开(公告)号：US20070042585A1

公开(公告)日：2007-02-22

申请号：US11506589

申请日：2006-08-18

申请人： Toyoaki Sakai ,  Katsuya Fukase

发明人： Toyoaki Sakai ,  Katsuya Fukase

IPC分类号： H01L21/4763 ,  H01L21/3205

CPC分类号： H05K3/062 ,  H01L21/4828 ,  H01L21/4846 ,  H01L23/49548 ,  H01L2924/0002 ,  H05K3/202 ,  H05K2203/0369 ,  H05K2203/0597 ,  H05K2203/1476 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49204 ,  H01L2924/00

摘要： A method of forming a high aspect ratio metal plate pattern or circuit board by multi-stage etching with a metal mask is disclosed. A resist (12) is coated on one or two surfaces of a copper plate (10) and patterned into a resist pattern. A tin plating layer (14) is formed using this resist pattern, and with this tin plating layer as a mask, the copper plate is half etched. By coating, exposing and developing the positive resist (18), the positive resist under the tin plating layer is protected. With the tin plating layer and the protective resist layer as a mask, the half etching is executed again. This process is repeated until the resist and the tin plating layer used as a masking are finally removed to produce a metal pattern (20).

摘要翻译： 公开了一种通过金属掩模的多级蚀刻形成高纵横比金属板图案或电路板的方法。 抗蚀剂（12）涂覆在铜板（10）的一个或两个表面上并且被图案化成抗蚀剂图案。 使用该抗蚀剂图案形成镀锡层（14），以该镀锡层为掩模，对铜板进行半蚀刻。 通过涂覆，曝光和显影正性抗蚀剂（18），镀锡层下的正性抗蚀剂得到保护。 以镀锡层和保护层为掩模，再次进行半蚀刻。 重复该过程，直到最终除去用作掩模的抗蚀剂和锡镀层以产生金属图案（20）。