公开(公告)号：US20080315387A1

公开(公告)日：2008-12-25

申请号：US12204991

申请日：2008-09-05

Applicant: Mark A. GERBER ,  Kurt P. WACHTLER ,  Abram M. CASTRO

Inventor： Mark A. GERBER ,  Kurt P. WACHTLER ,  Abram M. CASTRO

IPC: H01L23/52 ,  H01L21/00

CPC classification number: H05K1/141 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/162 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10734 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor system (300) has one or more packaged active subsystems (310, 330); each subsystem has a substrate with electrical contact pads and one or more semiconductor chips stacked on top of each other, assembled on the substrate. The system further has a packaged passive subsystem (320) including a substrate with electrical contacts and passive electrical components, such as resistors, capacitors, and indictors. The passive subsystem is stacked with the active subsystems and connected to them by solder bodies.

Abstract translation: 半导体系统（300）具有一个或多个封装的有源子系统（310,330）; 每个子系统具有基板，其具有电接触焊盘和堆叠在彼此之上的一个或多个半导体芯片，组装在基板上。 该系统还具有封装的无源子系统（320），其包括具有电触点的基板和无源电部件，例如电阻器，电容器和指示器。 被动子系统与有源子系统堆叠并通过焊料体与其连接。

公开(公告)号：US20080246138A1

公开(公告)日：2008-10-09

申请号：US12119276

申请日：2008-05-12

Applicant: MARK A. GERBER ,  KURT P. WACHTLER ,  ABRAM M. CASTRO

Inventor： MARK A. GERBER ,  KURT P. WACHTLER ,  ABRAM M. CASTRO

IPC: H01L23/52 ,  H01L23/48

CPC classification number: H01L23/49811 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19011

Abstract: A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components or an integrated circuit. One or more semiconductor chips (202, 203) have a dimension (220, 230) narrower than the interposer dimension, and an active surface with terminals and non-reflow metal studs (224, 234). One chip is flip-attached to the first interposer surface, and another chip to the second interposer surface, so that the interposer dimension projects over the chip dimension. An insulating substrate (204) has terminals and reflow bodies (242) to connect to the studs of the projecting interposer.

Abstract translation: 具有一定尺寸（210）的一个或多个半导体插入件（201）的半导体系统（200），从第一表面延伸到第二表面的导电通孔（212），端子和附接的非回流金属螺柱（215）在 通孔的末端。 半导体插入器表面可以包括分立的电子部件或集成电路。 一个或多个半导体芯片（202,203）具有比插入件尺寸窄的尺寸（220,230）以及具有端子和非回流金属柱（224,234）的活性表面。 一个芯片被翻转连接到第一插入器表面，另一个芯片被翻转连接到第二插入器表面，使得插入器尺寸突出在芯片尺寸上。 绝缘基板（204）具有端子和回流体（242），以连接到突出插入件的螺柱。

公开(公告)号：US07390700B2

公开(公告)日：2008-06-24

申请号：US11400099

申请日：2006-04-07

Applicant: Mark A. Gerber ,  Kurt P. Wachtler ,  Abram M. Castro

Inventor： Mark A. Gerber ,  Kurt P. Wachtler ,  Abram M. Castro

IPC: H01L21/44

CPC classification number: H01L23/49811 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19011

Abstract: A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components or an integrated circuit. One or more semiconductor chips (202, 203) have a dimension (220, 230) narrower than the interposer dimension, and an active surface with terminals and non-reflow metal studs (224, 234). One chip is flip-attached to the first interposer surface, and another chip to the second interposer surface, so that the interposer dimension projects over the chip dimension. An insulating substrate (204) has terminals and reflow bodies (242) to connect to the studs of the projecting interposer.

Abstract translation: 具有一定尺寸（210）的一个或多个半导体插入件（201）的半导体系统（200），从第一表面延伸到第二表面的导电通孔（212），端子和附接的非回流金属螺柱（215）在 通孔的末端。 半导体插入器表面可以包括分立的电子部件或集成电路。 一个或多个半导体芯片（202,203）具有比插入件尺寸窄的尺寸（220,230）以及具有端子和非回流金属柱（224,234）的活性表面。 一个芯片被翻转连接到第一插入器表面，另一个芯片被翻转连接到第二插入器表面，使得插入器尺寸突出在芯片尺寸上。 绝缘基板（204）具有端子和回流体（242），以连接到突出插入件的螺柱。

公开(公告)号：US06707124B2

公开(公告)日：2004-03-16

申请号：US09788075

申请日：2001-02-16

Applicant: Kurt P. Wachtler ,  David N. Walter ,  Larry J. Mowatt

Inventor： Kurt P. Wachtler ,  David N. Walter ,  Larry J. Mowatt

IPC: H01L310203

CPC classification number: H01L23/49816 ,  H01L23/055 ,  H01L23/49822 ,  H01L24/19 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2924/00012

Abstract: A high density interconnect device which creates a thin, electrically and thermally high performance package for semiconductor devices having a mechanically stable and high thermal conductivity substrate. Cavities in the substrate accommodate semiconductor devices attached directly to the substrate. The semiconductor devices include at least one optical receiver and/or transmitter. A thin film overlay having multiple layers interconnects the semiconductor devices to an array of pads on a surface of the thin film overlay facing away from the substrate. Connectors are attached to the pads to provide direct electrical and mechanical attachment to other system hardware. In one embodiment, the optical receiver and/or transmitter receives and/or transmits light signals through the thin film overlay. In another embodiment, the optical receiver and/or transmitter receives and/or transmits light signals through holes formed through the thin film overlay. The holes may be back filled with an optical quality material.

Abstract translation: 一种高密度互连器件，其为具有机械稳定且高导热性的衬底的半导体器件产生薄的，电性和热的高性能封装。 衬底中的腔容纳直接附着在衬底上的半导体器件。 半导体器件包括至少一个光接收器和/或发射器。 具有多个层的薄膜覆盖层将半导体器件与薄膜覆盖物的背离衬底的表面上的焊盘阵列互连。 连接器连接到焊盘，以提供与其他系统硬件的直接电气和机械连接。 在一个实施例中，光接收器和/或发射器通过薄膜覆盖层接收和/或发射光信号。 在另一实施例中，光接收器和/或发射器通过穿过薄膜覆盖层形成的孔接收和/或发射光信号。 孔可以用光学质量材料填充。

公开(公告)号：US06655002B1

公开(公告)日：2003-12-02

申请号：US09607415

申请日：2000-06-28

Applicant: Peter J. Maimone ,  Tsen-Hwang Lin ,  Kurt P. Wachtler

Inventor： Peter J. Maimone ,  Tsen-Hwang Lin ,  Kurt P. Wachtler

IPC: H02K1516

CPC classification number: G11B5/5552 ,  H02K99/00 ,  Y10T29/49009

Abstract: A microactuator, or micromotor, (60) and method for making it are presented such that a symmetrical build up of material is performed on opposite sides of a substrate. This reduces mechanical stresses in the device. In its construction, respective layers of circuit portions (108, 110) are built on each side of the structure, thereby eliminating the need to stack complex patterns. Stacking one complex pattern on top of a similar pattern is difficult because the surface, which is the base for subsequent layers, is not flat. The photolithography process that forms these patterns is not very forgiving to non-flat surfaces. Avoiding the stacked layers also allows thicker conductors to be considered for each circuit. Thicker circuits increase current carrying capacity, which in one of the key variables increase the power of the micromotor.

Abstract translation: 呈现微致动器或微电动机（60）及其制造方法，使得在衬底的相对侧上进行对称的材料堆积。 这降低了设备中的机械应力。 在其结构中，各层电路部分（108,110）被构建在结构的每一侧上，从而不需要堆叠复杂的图案。 在类似图案之上堆叠一个复杂图案是困难的，因为作为后续层的基底的表面不是平坦的。 形成这些图案的光刻工艺不是非平坦的非平坦表面。 避免堆叠层也允许为每个电路考虑更厚的导体。 较大的电路增加了电流承载能力，其中一个关键变量增加了微电机的功率。

公开(公告)号：US08309388B2

公开(公告)日：2012-11-13

申请号：US12337320

申请日：2008-12-17

Applicant: Kurt P. Wachtler ,  Wei-Yan Shih ,  Gregory E. Howard

Inventor： Kurt P. Wachtler ,  Wei-Yan Shih ,  Gregory E. Howard

IPC: H01L23/10

CPC classification number: H01L23/10 ,  B81B7/0077 ,  B81C1/00333 ,  B81C2203/0127 ,  B81C2203/0163 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/00

Abstract: A hermetic MEMS device (100) comprising a carrier (110) having a surface (111) including a device (101) and an attachment stripe (122), the stripe spaced from the device and surrounding the device; a metallic foil (102) having a central bulge portion (103) and a peripheral rim portion (104) meeting the stripe, the bulge cross section parallel to the carrier monotonically decreasing from the rim (104) towards the bulge apex (105); and the foil positioned over the carrier surface so that the bulge arches over the device and the rim forms a seal with the stripe.

Abstract translation: 一种密封MEMS装置（100），包括具有包括装置（101）和附接条（122）的表面（111）的载体（110），所述条与所述装置间隔开并围绕所述装置; 具有中心凸起部分（103）的金属箔（102）和与所述条纹相遇的周边边缘部分（104），所述凸起横截面平行于所述载体从所述边缘（104）向凸起顶点（105）单调递减; 并且所述箔定位在所述载体表面上方，使得所述装置和所述边缘上的凸起拱形物与所述条纹形成密封。

公开(公告)号：US08133761B2

公开(公告)日：2012-03-13

申请号：US12486596

申请日：2009-06-17

Applicant: Mark A Gerber ,  Kurt P Wachtler ,  Abram M. Castro

Inventor： Mark A Gerber ,  Kurt P Wachtler ,  Abram M. Castro

IPC: H01L21/44

CPC classification number: H01L23/49811 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19011

Abstract: A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components or an integrated circuit. One or more semiconductor chips (202, 203) have a dimension (220, 230) narrower than the interposer dimension, and an active surface with terminals and non-reflow metal studs (224, 234). One chip is flip-attached to the first interposer surface, and another chip to the second interposer surface, so that the interposer dimension projects over the chip dimension. An insulating substrate (204) has terminals and reflow bodies (242) to connect to the studs of the projecting interposer.

Abstract translation: 具有一定尺寸（210）的一个或多个半导体插入件（201）的半导体系统（200），从第一表面延伸到第二表面的导电通孔（212），端子和附接的非回流金属螺柱（215）在 通孔的末端。 半导体插入器表面可以包括分立的电子部件或集成电路。 一个或多个半导体芯片（202,203）具有比插入件尺寸窄的尺寸（220,230）以及具有端子和非回流金属柱（224,234）的活性表面。 一个芯片被翻转连接到第一插入器表面，另一个芯片被翻转连接到第二插入器表面，使得插入器尺寸突出在芯片尺寸上。 绝缘基板（204）具有端子和回流体（242），以连接到突出插入件的螺柱。

公开(公告)号：US06274391B1

公开(公告)日：2001-08-14

申请号：US07966645

申请日：1992-10-26

Applicant: Kurt P. Wachtler ,  David N. Walter ,  Larry J. Mowatt

Inventor： Kurt P. Wachtler ,  David N. Walter ,  Larry J. Mowatt

IPC: H01L2100

CPC classification number: H01L23/49816 ,  H01L23/055 ,  H01L23/49822 ,  H01L24/19 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2924/00012

Abstract: A high density interconnect land grid array package device combines various electronic packaging techniques in a unique way to create a very thin, electrically and thermally high performance package for single or multiple semiconductor devices. A thin and mechanically stable substrate or packaging material (12) is selected that also has high thermal conductivity. Cavities (14) in the substrate or packaging material (12) accommodate one or more semiconductor devices that are attached directly to the substrate or packaging material. At least one of said semiconductor devices includes at least one optical receiver and/or transmitter. A thin film overlay (18) having multiple layers interconnects the one or more semiconductor devices to an array of pads (20) on a surface of the thin film overlay facing away from the substrate or packaging material. Solder balls (22), conductive adhesive or elastomeric connectors are attached to the pads to provide direct electrical and mechanical attachment means to other system hardware. In one embodiment of the invention, the optical receiver and/or transmitter receives and/or transmits light signals through the thin film overlay. In another embodiment of the invention, the optical receiver and/or transmitter receives and/or transmits light signals through holes (47) formed through the thin film overlay. The holes may be back filled with an optical quality material.

Abstract translation: 高密度互连焊盘阵列封装器件以独特的方式组合各种电子封装技术，以为单个或多个半导体器件创建非常薄的电气和热性能高的封装。 选择也具有高导热性的薄且机械稳定的基底或包装材料（12）。 衬底或包装材料（12）中的空腔（14）容纳一个或多个直接连接到衬底或包装材料的半导体器件。 所述半导体器件中的至少一个包括至少一个光接收器和/或发射器。 具有多个层的薄膜覆盖层（18）将一个或多个半导体器件与薄膜覆盖物表面上的衬垫阵列（20）相互互连，所述衬垫背面远离衬底或封装材料。 焊球（22），导电粘合剂或弹性连接器附接到焊盘，以向其他系统硬件提供直接的电和机械连接装置。 在本发明的一个实施例中，光接收器和/或发射器通过薄膜覆盖层接收和/或发射光信号。 在本发明的另一实施例中，光接收器和/或发射器通过穿过薄膜覆盖层形成的孔（47）接收和/或发射光信号。 孔可以用光学质量材料填充。

公开(公告)号：US07872841B2

公开(公告)日：2011-01-18

申请号：US12049726

申请日：2008-03-17

Applicant: Yves Leduc ,  Nathalie Messina ,  Charvaka Duvvury ,  Kurt P. Wachtler

Inventor： Yves Leduc ,  Nathalie Messina ,  Charvaka Duvvury ,  Kurt P. Wachtler

IPC: H02H9/00

CPC classification number: H01L23/62 ,  H01L23/60 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/13034 ,  H01L2924/15311 ,  H05K1/0259 ,  H05K2201/0738 ,  Y10T29/49105 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A packaged semiconductor device (200) with a substrate (220) having, sandwiched in an insulator (221), a flat sheet-like sieve member (240) made of a non-linear material switching from insulator to conductor mode at a preset voltage. Both member surfaces are free of indentations; the member is perforated by through-holes, which are grouped into a first set (241) and a second set (242). Metal traces (251) over one member surface are positioned across the first set through-holes (241); each trace is connected to a terminal on the substrate top and, through the hole, to a terminal on the substrate bottom. Analogous for metal traces (252) over the opposite member surface and second set through-holes (242). Traces (252) overlap with a portion of traces (252) to form the locations for the conductivity switches, creating local ultra-low resistance bypasses to ground for discharging overstress events.

Abstract translation: 一种封装半导体器件（200），其具有夹在绝缘体（221）中的基板（220），由预定电压从绝缘体切换到导体模式的非线性材料制成的平板状筛件（240） 。 两个构件表面都没有压痕; 所述构件穿过通孔，所述通孔被分组成第一组（241）和第二组（242）。 一个构件表面上的金属迹线（251）跨过第一组通孔（241）定位; 每个迹线连接到基板顶部上的端子，并且通过孔连接到基板底部上的端子。 类似于相对构件表面上的金属迹线（252）和第二组通孔（242）。 轨迹（252）与轨迹（252）的一部分重叠以形成用于导电开关的位置，从而产生局部超低电阻旁路到地以释放过应力事件。

公开(公告)号：US20090267223A1

公开(公告)日：2009-10-29

申请号：US12337320

申请日：2008-12-17

Applicant: Kurt P. WACHTLER ,  Wei-Yan SHIH ,  Gregory E. HOWARD

Inventor： Kurt P. WACHTLER ,  Wei-Yan SHIH ,  Gregory E. HOWARD

IPC: H01L23/10

CPC classification number: H01L23/10 ,  B81B7/0077 ,  B81C1/00333 ,  B81C2203/0127 ,  B81C2203/0163 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/00

Abstract: A hermetic MEMS device (100) comprising a carrier (110) having a surface (111) including a device (101) and an attachment stripe (122), the stripe spaced from the device and surrounding the device; a metallic foil (102) having a central bulge portion (103) and a peripheral rim portion (104) meeting the stripe, the bulge cross section parallel to the carrier monotonically decreasing from the rim (104) towards the bulge apex (105); and the foil positioned over the carrier surface so that the bulge arches over the device and the rim forms a seal with the stripe.

Abstract translation: 一种密封MEMS装置（100），包括具有包括装置（101）和附接条（122）的表面（111）的载体（110），所述条与所述装置间隔开并围绕所述装置; 具有中心凸起部分（103）的金属箔（102）和与所述条纹相遇的周边边缘部分（104），所述凸起横截面平行于所述载体从所述边缘（104）向凸起顶点（105）单调递减; 并且所述箔定位在所述载体表面上方，使得所述装置和所述边缘上的凸起拱形物与所述条纹形成密封。