公开(公告)号：US07944034B2

公开(公告)日：2011-05-17

申请号：US11767294

申请日：2007-06-22

申请人： Mark A. Gerber ,  David N. Walter

发明人： Mark A. Gerber ,  David N. Walter

IPC分类号： H01L23/48 ,  H01L23/12 ,  B05C13/00 ,  B22D19/08

CPC分类号： H01L23/49833 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/5317 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device with a sheet-like insulating substrate (101) integral with two or more patterned layers of conductive lines and vias, a chip attached to an assembly site, and contact pads (103) in pad locations has an encapsulated region on the top surface of the substrate, extending to the edge of the substrate, enclosing the chip, and having contact apertures (703) at the pad locations for external communication with the pad metal surfaces. The apertures may have not-smooth sidewall surfaces and may be filled with solder material (704) to contact the pads. Metal-filled surface grooves (710) in the encapsulated region, with smooth groove bottom and sidewalls, are selected to serve as customized routing interconnections, or redistribution lines, between selected apertures and thus to facilitate the coupling with another semiconductor device to form a package-on-package assembly.

摘要翻译： 具有与导电线和通孔的两个或多个图案化层成一体的片状绝缘基板（101）的半导体器件，附接到组装位置的芯片和焊盘位置中的接触焊盘（103）在顶部具有封装区域 衬底的表面，延伸到衬底的边缘，封装芯片，并且在焊盘位置处具有用于与衬垫金属表面进行外部连通的接触孔（703）。 孔可以具有不光滑的侧壁表面，并且可以用焊料材料（704）填充以接触焊盘。 选择具有光滑凹槽底部和侧壁的封装区域中的金属填充表面凹槽（710）用作所选择的孔之间的定制路由互连或再分配线，并且因此有助于与另一半导体器件的耦合以形成封装 - 包装组装。

公开(公告)号：US07573137B2

公开(公告)日：2009-08-11

申请号：US11423035

申请日：2006-06-08

申请人： David N. Walter ,  Duy-Loan T. Le ,  Mark A. Gerber

发明人： David N. Walter ,  Duy-Loan T. Le ,  Mark A. Gerber

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4845 ,  H01L2224/48471 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85045 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06579 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A device has a first semiconductor chip (101) with contact pads in an interior first set (102) and a peripheral second set (103). A deformed sphere (104) of non-reflow metal such as gold is placed on each contact pad of the first and second sets. At least one additional deformed sphere (105) is placed on the first set pads, forming column-shaped spacers. The first chip is attached to a substrate (110) with a chip attachment location and a third set of contact pads (112) near the location. Low profile bond wires (130) span between the pads of the third set and the second set. A second semiconductor chip (140) of a size has a fourth set of contact pads (141) at locations matching the first set pads. The second chip is placed over the first chip so that the fourth set pads are aligned with the spacers on the matching first set pads, and at least one edge of the second chip overhangs the sphere on at least one pad of the second set. A reflow metal (142) bonds the spacers to the second chip, while the spacers space the first and second chips by a gap (105a) wide enough for placing the wire spans to the second set pads.

摘要翻译： 器件具有在内部第一组（102）和外围第二组（103）中具有接触垫的第一半导体芯片（101）。 非回流金属（例如金）的变形球体（104）被放置在第一和第二组的每个接触垫上。 至少一个附加的变形球体（105）被放置在第一组垫上，形成柱状间隔件。 第一芯片附接到具有芯片附接位置的基板（110）和位于该位置附近的第三组接触焊盘（112）。 薄型结合线（130）跨越第三组和第二组的焊盘之间。 尺寸的第二半导体芯片（140）在与第一组焊盘匹配的位置处具有第四组接触焊盘（141）。 第二芯片放置在第一芯片上，使得第四组焊盘与匹配的第一组焊盘上的间隔件对准，并且第二芯片的至少一个边缘在第二组的至少一个焊盘上悬垂在球体上。 回流金属（142）将间隔物连接到第二芯片，而间隔物将第一和第二芯片间隔开足够宽的间隙（105a），以将导线跨距放置到第二固定焊盘。

公开(公告)号：US20110183465A1

公开(公告)日：2011-07-28

申请号：US13080435

申请日：2011-04-05

申请人： Mark A. GERBER ,  David N. WALTER

发明人： Mark A. GERBER ,  David N. WALTER

IPC分类号： H01L21/60

CPC分类号： H01L23/49833 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/5317 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device with a sheet-like insulating substrate (101) integral with two or more patterned layers of conductive lines and vias, a chip attached to an assembly site, and contact pads (103) in pad locations has an encapsulated region on the top surface of the substrate, extending to the edge of the substrate, enclosing the chip, and having contact apertures (703) at the pad locations for external communication with the pad metal surfaces. The apertures may have not-smooth sidewall surfaces and may be filled with solder material (704) to contact the pads. Metal-filled surface grooves (710) in the encapsulated region, with smooth groove bottom and sidewalls, are selected to serve as customized routing interconnections, or redistribution lines, between selected apertures and thus to facilitate the coupling with another semiconductor device to form a package-on-package assembly.

摘要翻译： 具有与导电线和通孔的两个或多个图案化层成一体的片状绝缘基板（101）的半导体器件，附接到组装位置的芯片和焊盘位置中的接触焊盘（103）在顶部具有封装区域 衬底的表面，延伸到衬底的边缘，封装芯片，并且在焊盘位置处具有用于与衬垫金属表面进行外部连通的接触孔（703）。 孔可以具有不光滑的侧壁表面，并且可以用焊料材料（704）填充以接触焊盘。 选择具有光滑凹槽底部和侧壁的封装区域中的金属填充表面凹槽（710）用作所选择的孔之间的定制路由互连或再分配线，并且因此有助于与另一半导体器件的耦合以形成封装 - 包装组装。

公开(公告)号：US07776653B2

公开(公告)日：2010-08-17

申请号：US12497170

申请日：2009-07-02

申请人： David N Walter ,  Duy-Loan T Le ,  Mark A Gerber

发明人： David N Walter ,  Duy-Loan T Le ,  Mark A Gerber

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L24/05 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4845 ,  H01L2224/48471 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85045 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06579 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A device has a first semiconductor chip (101) with contact pads in an interior first set (102) and a peripheral second set (103). A deformed sphere (104) of non-reflow metal such as gold is placed on each contact pad of the first and second sets. At least one additional deformed sphere (105) is placed on the first set pads, forming column-shaped spacers. The first chip is attached to a substrate (110) with a chip attachment location and a third set of contact pads (112) near the location. Low profile bond wires (130) span between the pads of the third set and the second set. A second semiconductor chip (140) of a size has a fourth set of contact pads (141) at locations matching the first set pads. The second chip is placed over the first chip so that the fourth set pads are aligned with the spacers on the matching first set pads, and at least one edge of the second chip overhangs the sphere on at least one pad of the second set. A reflow metal (142) bonds the spacers to the second chip, while the spacers space the first and second chips by a gap (105a) wide enough for placing the wire spans to the second set pads.

摘要翻译： 器件具有在内部第一组（102）和外围第二组（103）中具有接触垫的第一半导体芯片（101）。 非回流金属（例如金）的变形球体（104）被放置在第一和第二组的每个接触垫上。 至少一个附加的变形球体（105）被放置在第一组垫上，形成柱状间隔件。 第一芯片附接到具有芯片附接位置的基板（110）和位于该位置附近的第三组接触焊盘（112）。 薄型结合线（130）跨越第三组和第二组的焊盘之间。 尺寸的第二半导体芯片（140）在与第一组焊盘匹配的位置处具有第四组接触焊盘（141）。 第二芯片放置在第一芯片上，使得第四组焊盘与匹配的第一组焊盘上的间隔件对准，并且第二芯片的至少一个边缘在第二组的至少一个焊盘上悬垂在球体上。 回流金属（142）将间隔物连接到第二芯片，而间隔物将第一和第二芯片间隔开足够宽的间隙（105a），以将导线跨距放置到第二固定焊盘。

公开(公告)号：US20080284045A1

公开(公告)日：2008-11-20

申请号：US11750757

申请日：2007-05-18

申请人： Mark A. Gerber ,  David N. Walter

发明人： Mark A. Gerber ,  David N. Walter

IPC分类号： H01L23/48 ,  B05C13/00 ,  H01L21/58

CPC分类号： H01L24/96 ,  H01L21/561 ,  H01L21/565 ,  H01L21/782 ,  H01L23/49805 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05099 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method and apparatus for fabricating a semiconductor device are disclosed. The method attaches semiconductor chips (130) on a sheet-like insulating substrate (101) integral with two or more patterned layers of conductive lines and vias and with contact pads (103) in pad locations. A mold is provided, which has a top portion (210) with metal protrusions (202) at locations matching the pad locations. The protrusions are shaped as truncated cones of a height suitable to approach the pad metal surface in the closed mold cavity. The substrate and the chip are loaded onto the bottom mold portion (310); the mold is closed by clamping the top portion onto the bottom portion so that the protrusions are aligned with the contact pads, approaching the pad surface. After pressuring encapsulation compound into the cavity, the mold is opened; the encapsulated device has apertures to the pad locations. Any residual compound formed on the pads is removed by laser, plasma, or chemical to expose the metal surface.

摘要翻译： 公开了一种用于制造半导体器件的方法和装置。 该方法将半导体芯片（130）连接在与导电线和通孔的两个或多个图案化层一体的片状绝缘基板（101）上，并且在焊盘位置具有接触焊盘（103）。 提供了一种模具，其具有在与焊盘位置匹配的位置处具有金属突起（202）的顶部（210）。 凸起成形为具有适于接近闭合模具腔中的垫金属表面的高度的截头圆锥体。 将基板和芯片装载到底模部分（310）上; 通过将顶部部分夹在底部上使模具闭合，使得突起与接触垫对准，接近衬垫表面。 将封装化合物压入腔体后，打开模具; 封装装置具有到焊盘位置的孔。 通过激光，等离子体或化学物质去除在焊盘上形成的任何残留化合物以暴露金属表面。

公开(公告)号：US20070228543A1

公开(公告)日：2007-10-04

申请号：US11423035

申请日：2006-06-08

申请人： David N. Walter ,  Duy-Loan T. Le ,  Mark A. Gerber

发明人： David N. Walter ,  Duy-Loan T. Le ,  Mark A. Gerber

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L24/05 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4845 ,  H01L2224/48471 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85045 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06579 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A device has a first semiconductor chip (101) with contact pads in an interior first set (102) and a peripheral second set (103). A deformed sphere (104) of non-reflow metal such as gold is placed on each contact pad of the first and second sets. At least one additional deformed sphere (105) is placed on the first set pads, forming column-shaped spacers. The first chip is attached to a substrate (110) with a chip attachment location and a third set of contact pads (112) near the location. Low profile bond wires (130) span between the pads of the third set and the second set. A second semiconductor chip (140) of a size has a fourth set of contact pads (141) at locations matching the first set pads. The second chip is placed over the first chip so that the fourth set pads are aligned with the spacers on the matching first set pads, and at least one edge of the second chip overhangs the sphere on at least one pad of the second set. A reflow metal (142) bonds the spacers to the second chip, while the spacers space the first and second chips by a gap (105a) wide enough for placing the wire spans to the second set pads.

摘要翻译： 器件具有在内部第一组（102）和外围第二组（103）中具有接触垫的第一半导体芯片（101）。 非回流金属（例如金）的变形球体（104）被放置在第一和第二组的每个接触垫上。 至少一个附加的变形球体（105）被放置在第一组垫上，形成柱状间隔件。 第一芯片附接到具有芯片附接位置的基板（110）和位于该位置附近的第三组接触焊盘（112）。 薄型结合线（130）跨越第三组和第二组的焊盘之间。 尺寸的第二半导体芯片（140）在与第一组焊盘匹配的位置处具有第四组接触焊盘（141）。 第二芯片放置在第一芯片上，使得第四组焊盘与匹配的第一组焊盘上的间隔件对准，并且第二芯片的至少一个边缘在第二组的至少一个焊盘上悬垂在球体上。 回流金属（142）将间隔件连接到第二芯片，而间隔物将第一和第二芯片间隔开足够宽的间隙（105a），以将导线跨距放置在第二固定焊盘上。

公开(公告)号：US06707124B2

公开(公告)日：2004-03-16

申请号：US09788075

申请日：2001-02-16

申请人： Kurt P. Wachtler ,  David N. Walter ,  Larry J. Mowatt

发明人： Kurt P. Wachtler ,  David N. Walter ,  Larry J. Mowatt

IPC分类号： H01L310203

CPC分类号： H01L23/49816 ,  H01L23/055 ,  H01L23/49822 ,  H01L24/19 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2924/00012

摘要： A high density interconnect device which creates a thin, electrically and thermally high performance package for semiconductor devices having a mechanically stable and high thermal conductivity substrate. Cavities in the substrate accommodate semiconductor devices attached directly to the substrate. The semiconductor devices include at least one optical receiver and/or transmitter. A thin film overlay having multiple layers interconnects the semiconductor devices to an array of pads on a surface of the thin film overlay facing away from the substrate. Connectors are attached to the pads to provide direct electrical and mechanical attachment to other system hardware. In one embodiment, the optical receiver and/or transmitter receives and/or transmits light signals through the thin film overlay. In another embodiment, the optical receiver and/or transmitter receives and/or transmits light signals through holes formed through the thin film overlay. The holes may be back filled with an optical quality material.

摘要翻译： 一种高密度互连器件，其为具有机械稳定且高导热性的衬底的半导体器件产生薄的，电性和热的高性能封装。 衬底中的腔容纳直接附着在衬底上的半导体器件。 半导体器件包括至少一个光接收器和/或发射器。 具有多个层的薄膜覆盖层将半导体器件与薄膜覆盖物的背离衬底的表面上的焊盘阵列互连。 连接器连接到焊盘，以提供与其他系统硬件的直接电气和机械连接。 在一个实施例中，光接收器和/或发射器通过薄膜覆盖层接收和/或发射光信号。 在另一实施例中，光接收器和/或发射器通过穿过薄膜覆盖层形成的孔接收和/或发射光信号。 孔可以用光学质量材料填充。

公开(公告)号：US08304285B2

公开(公告)日：2012-11-06

申请号：US13080435

申请日：2011-04-05

申请人： Mark A Gerber ,  David N Walter

发明人： Mark A Gerber ,  David N Walter

IPC分类号： H01L21/60

CPC分类号： H01L23/49833 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/5317 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device with a sheet-like insulating substrate (101) integral with two or more patterned layers of conductive lines and vias, a chip attached to an assembly site, and contact pads (103) in pad locations has an encapsulated region on the top surface of the substrate, extending to the edge of the substrate, enclosing the chip, and having contact apertures (703) at the pad locations for external communication with the pad metal surfaces. The apertures may have not-smooth sidewall surfaces and may be filled with solder material (704) to contact the pads. Metal-filled surface grooves (710) in the encapsulated region, with smooth groove bottom and sidewalls, are selected to serve as customized routing interconnections, or redistribution lines, between selected apertures and thus to facilitate the coupling with another semiconductor device to form a package-on-package assembly.

摘要翻译： 具有与导电线和通孔的两个或多个图案化层成一体的片状绝缘基板（101）的半导体器件，附接到组装位置的芯片和焊盘位置中的接触焊盘（103）在顶部具有封装区域 衬底的表面，延伸到衬底的边缘，封装芯片，并且在焊盘位置处具有用于与衬垫金属表面进行外部连通的接触孔（703）。 孔可以具有不光滑的侧壁表面，并且可以用焊料材料（704）填充以接触焊盘。 选择具有光滑凹槽底部和侧壁的封装区域中的金属填充表面凹槽（710）用作所选择的孔之间的定制路由互连或再分配线，并且因此有助于与另一半导体器件的耦合以形成封装 - 包装组装。

公开(公告)号：US20110165731A1

公开(公告)日：2011-07-07

申请号：US13050177

申请日：2011-03-17

申请人： Mark A. GERBER ,  David N. WALTER

发明人： Mark A. GERBER ,  David N. WALTER

IPC分类号： H01L21/82 ,  H01L21/56 ,  H01L21/782

CPC分类号： H01L24/96 ,  H01L21/561 ,  H01L21/565 ,  H01L21/782 ,  H01L23/49805 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05099 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An improved semiconductor device package is manufactured by attaching semiconductor chips (130) on an insulating substrate (101) having contact pads (103). A mold is provided, which has a top portion (210) with metal protrusions (202) at locations matching the pad locations. The protrusions are shaped as truncated cones. The substrate and the chips are loaded onto the bottom mold portion (310); the mold is closed by clamping the top portion onto the bottom portion so that the protrusions approach the contact pads. Encapsulation compound is introduced into the cavity and the protrusions create apertures through the encapsulation compound towards the pad locations.

摘要翻译： 通过将半导体芯片（130）附接在具有接触焊盘（103）的绝缘基板（101）上来制造改进的半导体器件封装。 提供了一种模具，其具有在与焊盘位置匹配的位置处具有金属突起（202）的顶部（210）。 突起形状为截锥体。 将基板和芯片装载到底模部分（310）上; 通过将顶部部分夹紧到底部上使得突起接近接触垫来闭合模具。 将包封化合物引入空腔中，并且突起产生通过封装化合物朝向垫位置的孔。

公开(公告)号：US20080315385A1

公开(公告)日：2008-12-25

申请号：US11767294

申请日：2007-06-22

申请人： Mark A. Gerber ,  David N. Walter

发明人： Mark A. Gerber ,  David N. Walter

IPC分类号： H01L23/12 ,  B22D19/08 ,  H01L21/50

CPC分类号： H01L23/49833 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/5317 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device with a sheet-like insulating substrate (101) integral with two or more patterned layers of conductive lines and vias, a chip attached to an assembly site, and contact pads (103) in pad locations has an encapsulated region on the top surface of the substrate, extending to the edge of the substrate, enclosing the chip, and having contact apertures (703) at the pad locations for external communication with the pad metal surfaces. The apertures may have not-smooth sidewall surfaces and may be filled with solder material (704) to contact the pads. Metal-filled surface grooves (710) in the encapsulated region, with smooth groove bottom and sidewalls, are selected to serve as customized routing interconnections, or redistribution lines, between selected apertures and thus to facilitate the coupling with another semiconductor device to form a package-on-package assembly.

摘要翻译： 具有与导电线和通孔的两个或多个图案化层成一体的片状绝缘基板（101）的半导体器件，附接到组装位置的芯片和焊盘位置中的接触焊盘（103）在顶部具有封装区域 衬底的表面，延伸到衬底的边缘，封装芯片，并且在焊盘位置处具有用于与衬垫金属表面进行外部连通的接触孔（703）。 孔可以具有不光滑的侧壁表面，并且可以用焊料材料（704）填充以接触焊盘。 选择具有光滑凹槽底部和侧壁的封装区域中的金属填充表面凹槽（710）用作所选择的孔之间的定制路由互连或再分配线，并且因此有助于与另一半导体器件的耦合以形成封装 - 包装组装。