公开(公告)号：US5913434A

公开(公告)日：1999-06-22

申请号：US890298

申请日：1997-07-09

申请人： Akio Fukuhara ,  Tsuyoshi Yoshioka ,  Yukihiro Takao

发明人： Akio Fukuhara ,  Tsuyoshi Yoshioka ,  Yukihiro Takao

IPC分类号： B65D35/44 ,  B65D41/04 ,  B65D47/24 ,  B65D47/38 ,  B65D51/22 ,  B65B7/28 ,  B65D41/16

CPC分类号： B65D51/223 ,  B65D41/0428 ,  B65D41/0471 ,  B65D47/242 ,  B65D47/38 ,  B65D2251/0015 ,  B65D2251/0093

摘要： The present invention provides a retortable container which has an engagement ridge (19), of an outer diameter D.sub.1 smaller than an inner diameter D.sub.2 of a thread of a cap (20), formed on the outer circumference of the neck (13) near the top face thereof and an engagement portion (26) having an engaging hook (26a), capable of engaging with the engagement ridge (19) of the neck (13) under the condition that engagement of the neck (13) and the cap (20) is completed, being formed integrally therewith on the bottom surface of the top wall (21) of the cap (20), whereas the engagement portion (26) is formed in a shape of cylinder having a wall thickness smaller than the wall thickness of the circumferential wall (28) of the cap (20), and the engaging hook (26a) protrudes in an annular shape inwardly from the open bottom end of the engagement portion (26). This configuration of the container is capable of preventing the cap (20) from coming off and the screw engagement of the container body and the cap (20) from loosening during sterilization process, and allows it to detach the cap (20) with less force (FIG. 2).

摘要翻译： 本发明提供了一种可蒸煮容器，其具有外径D1小于帽（20）的螺纹的内径D2的接合脊（19），其形成在颈部（13）的外周附近 具有接合钩（26a）的接合部分（26）能够在颈部（13）和盖子（20）的接合的条件下与颈部（13）的接合脊部（19）接合 ）完成，与盖（20）的顶壁（21）的底面一体地形成，而接合部（26）形成为具有比壁厚小的壁厚的圆筒形 盖（20）的圆周壁（28）和接合钩（26a）从接合部分（26）的敞开的底端向内突出成环形。 容器的这种构造能够防止盖（20）脱落，并且容器主体和盖（20）的螺钉接合在灭菌过程中不会松动，并且允许其以较小的力分离盖（20） （图2）。

公开(公告)号：US07101735B2

公开(公告)日：2006-09-05

申请号：US10696581

申请日：2003-10-30

申请人： Takashi Noma ,  Hiroyuki Shinogi ,  Akira Suzuki ,  Yoshinori Seki ,  Koichi Kuhara ,  Yukihiro Takao ,  Hiroshi Yamada

发明人： Takashi Noma ,  Hiroyuki Shinogi ,  Akira Suzuki ,  Yoshinori Seki ,  Koichi Kuhara ,  Yukihiro Takao ,  Hiroshi Yamada

IPC分类号： H01L21/44

CPC分类号： H01L21/6835 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/3185 ,  H01L23/481 ,  H01L24/10 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1305 ,  H01L2924/00 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2224/05124 ,  H01L2224/05147

摘要： A first glass substrate is bonded through a resin to a top surface of a semiconductor wafer on which a first wiring is formed. A second glass substrate is bonded to a back surface of the semiconductor wafer through a resin. A V-shaped groove is formed by notching from a surface of the second glass substrate through a part of the first glass substrate. A second wiring connected with the first wiring and extending to the surface of the second glass substrate is formed. A protection film composed of an organic resin and a photoresist layer to provide the protection film with an opening are formed on the second wiring by spray coating. A conductive terminal is formed by screen printing using the protection film as a solder mask. A cushioning material may be formed on the second glass substrate by spray coating.

摘要翻译： 将第一玻璃基板通过树脂粘合到其上形成有第一布线的半导体晶片的顶表面。 通过树脂将第二玻璃基板结合到半导体晶片的背面。 通过第一玻璃基板的一部分从第二玻璃基板的表面开槽而形成V形槽。 形成与第一布线连接并延伸到第二玻璃基板的表面的第二布线。 通过喷涂在第二布线上形成由有机树脂和光致抗蚀剂层组成的保护膜以提供具有开口的保护膜。 通过使用保护膜作为焊接掩模的丝网印刷形成导电端子。 可以通过喷涂在第二玻璃基板上形成缓冲材料。

公开(公告)号：US20050176235A1

公开(公告)日：2005-08-11

申请号：US11035399

申请日：2005-01-14

申请人： Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao

发明人： Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao

IPC分类号： H01L21/60 ,  H01L21/68 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/485 ,  H01L25/065 ,  H01L21/44

CPC分类号： H01L24/12 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/02 ,  H01L24/11 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/12044

摘要： A manufacturing method of a semiconductor device of this invention includes forming metal pads on a Si substrate through a first oxide film, bonding the Si substrate and a holding substrate which bolsters the Si substrate through a bonding film, forming an opening by etching the Si substrate followed by forming a second oxide film on a back surface of the Si substrate and in the opening, forming a wiring connected to the metal pads after etching the second oxide film, forming a conductive terminal on the wiring, dicing from the back surface of the Si substrate to the bonding film and separating the Si substrate and the holding substrate.

公开(公告)号：US20050006783A1

公开(公告)日：2005-01-13

申请号：US10851638

申请日：2004-05-24

申请人： Yukihiro Takao

发明人： Yukihiro Takao

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L23/12 ,  H01L23/31 ,  H01L23/48 ,  H01L23/485

CPC分类号： H01L23/481 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1148 ,  H01L2224/13 ,  H01L2224/13024 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00

摘要： Disconnection and deterioration in step coverage of wirings are prevented to offer a semiconductor device having higher reliability. A pad electrode is formed on a surface of a silicon die. A via hole penetrating the silicon die is formed from a back surface of the silicon die to the pad electrode. A wiring layer disposed on the back surface of the silicon die runs through the via hole and is electrically connected with the pad electrode. The wiring layer covers a convex portion of silicon on the back surface of the silicon die. A solder ball is formed on the wiring layer on the convex portion of silicon.

摘要翻译： 防止布线的阶梯覆盖的断开和劣化提供具有更高可靠性的半导体器件。 在硅片的表面上形成焊盘电极。 贯穿硅片的通孔由硅片的背面形成到焊盘电极。 设置在硅芯片的背面上的布线层穿过通孔并与焊盘电极电连接。 布线层覆盖硅片的背面的硅的凸部。 在硅的凸部上的布线层上形成焊球。

公开(公告)号：US06326701B1

公开(公告)日：2001-12-04

申请号：US09512481

申请日：2000-02-23

申请人： Hiroyuki Shinogi ,  Nobuyuki Takai ,  Ryoji Tokushige ,  Yukihiro Takao ,  Katsuhiko Kitagawa

发明人： Hiroyuki Shinogi ,  Nobuyuki Takai ,  Ryoji Tokushige ,  Yukihiro Takao ,  Katsuhiko Kitagawa

IPC分类号： H01L2176

CPC分类号： H01L23/3114 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05569 ,  H01L2224/0558 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2224/05552

摘要： A removal area EL is provided as a first dicing line in a dicing area, coat materials 6′ and 7′ are put on the flanks of the removal area, a resin layer R is formed, and a dicing blade narrower than the width of the removal area EL is used to fully cut on a second dicing line, whereby the interface exposed by the first dicing can be coated and protected.

摘要翻译： 在切割区域中设置去除区域EL作为第一切割线，将涂层材料6'和7'放置在去除区域的侧面上，形成树脂层R，并且切割刀片的宽度比 去除区域EL用于在第二切割线上完全切割，由此通过第一切割暴露的界面可被涂覆和保护。

公开(公告)号：US07745931B2

公开(公告)日：2010-06-29

申请号：US10855974

申请日：2004-05-28

申请人： Yukihiro Takao

发明人： Yukihiro Takao

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05569 ,  H01L2224/05644 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1148 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/00014

摘要： A BGA type semiconductor device having high reliability is offered. A pad electrode is formed on a surface of a semiconductor substrate and a glass substrate is bonded to the surface of the semiconductor substrate. A via hole is formed from a back surface of the semiconductor substrate to reach a surface of the pad electrode. An insulation film is formed on an entire back surface of the semiconductor substrate including an inside of the via hole. A cushioning pad is formed on the insulation film. The insulation film is removed from a bottom portion of the via hole by etching. A wiring connected with the pad electrode is formed to extend from the via hole onto the cushioning pad. A conductive terminal is formed on the wiring. Then the semiconductor substrate is separated into a plurality of semiconductor dice.

摘要翻译： 提供了具有高可靠性的BGA型半导体器件。 在半导体衬底的表面上形成焊盘电极，并且将玻璃衬底接合到半导体衬底的表面。 从半导体衬底的背面形成通孔以到达焊盘电极的表面。 在包括通孔内部的半导体衬底的整个后表面上形成绝缘膜。 在绝缘膜上形成缓冲垫。 通过蚀刻从通孔的底部除去绝缘膜。 与焊盘电极连接的布线形成为从通孔延伸到缓冲垫上。 在布线上形成导电端子。 然后将半导体衬底分离成多个半导体管芯。

公开(公告)号：US20080171421A1

公开(公告)日：2008-07-17

申请号：US12051502

申请日：2008-03-19

申请人： Akira SUZUKI ,  Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao ,  Shinzo Ishibe ,  Shigeki Otsuka ,  Keiichi Yamaguchi

发明人： Akira SUZUKI ,  Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao ,  Shinzo Ishibe ,  Shigeki Otsuka ,  Keiichi Yamaguchi

IPC分类号： H01L21/304

CPC分类号： H01L21/78 ,  H01L23/3114 ,  H01L23/482 ,  H01L23/49827 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2224/05599 ,  H01L2224/05099

摘要： Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semiconductor wafer is reduced by back-grinding the semiconductor wafer on a second surface of the semiconductor wafer which is opposite to the first surface of the semiconductor wafer. The semiconductor wafer is wet-etched to remove bumps and dips on the second surface of the semiconductor wafer caused during the back-grinding. Then the second surface of the semiconductor wafer is etched to form a tapered groove. The semiconductor wafer is wet-etched to reduce bumps and dips caused by the etching and round a corner of the groove. The wet-etching improves coverage of insulation film, wiring and protection film and enhances yield and reliability of the semiconductor device.

摘要翻译： CSP型半导体器件降低成本并提高可靠性。 作为支撑板的玻璃基板通过粘合剂粘合到其上形成有第一布线的半导体晶片的第一表面。 半导体晶片的厚度通过在与半导体晶片的第一表面相对的半导体晶片的第二表面上的背面研磨半导体晶片来减少。 湿式蚀刻半导体晶片以去除在后研磨期间引起的半导体晶片的第二表面上的凸起和凹陷。 然后蚀刻半导体晶片的第二表面以形成锥形槽。 湿式蚀刻半导体晶片以减少由蚀刻引起的凸起和凹陷，并且绕着凹槽的一角。 湿蚀刻提高了绝缘膜，布线和保护膜的覆盖率，并提高了半导体器件的产量和可靠性。

公开(公告)号：US07399683B2

公开(公告)日：2008-07-15

申请号：US11035399

申请日：2005-01-14

申请人： Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao

发明人： Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao

IPC分类号： H01L21/00

CPC分类号： H01L24/12 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/02 ,  H01L24/11 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/12044

摘要： A manufacturing method of a semiconductor device of this invention includes forming metal pads on a Si substrate through a first oxide film, bonding the Si substrate and a holding substrate which bolsters the Si substrate through a bonding film, forming an opening by etching the Si substrate followed by forming a second oxide film on a back surface of the Si substrate and in the opening, forming a wiring connected to the metal pads after etching the second oxide film, forming a conductive terminal on the wiring, dicing from the back surface of the Si substrate to the bonding film and separating the Si substrate and the holding substrate.

摘要翻译： 本发明的半导体器件的制造方法包括通过第一氧化膜在Si衬底上形成金属焊盘，将Si衬底和支撑衬底接合，通过接合膜固定Si衬底，通过蚀刻Si衬底形成开口 然后在Si衬底的后表面和开口中形成第二氧化物膜，在蚀刻第二氧化膜之后形成连接到金属焊盘的布线，在布线上形成导电端子，从导电端子的背面切割 Si衬底到所述接合膜并分离所述Si衬底和所述保持衬底。

公开(公告)号：US07371693B2

公开(公告)日：2008-05-13

申请号：US10784888

申请日：2004-02-24

申请人： Akira Suzuki ,  Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao ,  Shinzo Ishibe ,  Shigeki Otsuka ,  Keiichi Yamaguchi

发明人： Akira Suzuki ,  Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao ,  Shinzo Ishibe ,  Shigeki Otsuka ,  Keiichi Yamaguchi

IPC分类号： H01L21/461

CPC分类号： H01L21/78 ,  H01L23/3114 ,  H01L23/482 ,  H01L23/49827 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2224/05599 ,  H01L2224/05099

摘要： Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semiconductor wafer is reduced by back-grinding the semiconductor wafer on a second surface of the semiconductor wafer which is opposite to the first surface of the semiconductor wafer. The semiconductor wafer is wet-etched to remove bumps and dips on the second surface of the semiconductor wafer caused during the back-grinding. Then the second surface of the semiconductor wafer is etched to form a tapered groove. The semiconductor wafer is wet-etched to reduce bumps and dips caused by the etching and round a corner of the groove. The wet-etching improves coverage of insulation film, wiring and protection film and enhances yield and reliability of the semiconductor device.

摘要翻译： CSP型半导体器件降低成本并提高可靠性。 作为支撑板的玻璃基板通过粘合剂粘合到其上形成有第一布线的半导体晶片的第一表面。 半导体晶片的厚度通过在与半导体晶片的第一表面相对的半导体晶片的第二表面上的背面研磨半导体晶片来减少。 湿式蚀刻半导体晶片以去除在后研磨期间引起的半导体晶片的第二表面上的凸起和凹陷。 然后蚀刻半导体晶片的第二表面以形成锥形槽。 湿式蚀刻半导体晶片以减少由蚀刻引起的凸起和凹陷，并且绕着凹槽的一角。 湿蚀刻提高了绝缘膜，布线和保护膜的覆盖率，并提高了半导体器件的产量和可靠性。

公开(公告)号：US06329288B1

公开(公告)日：2001-12-11

申请号：US09489709

申请日：2000-01-24

申请人： Ryoji Tokushige ,  Nobuyuki Takai ,  Hiroyuki Shinogi ,  Yukihiro Takao

发明人： Ryoji Tokushige ,  Nobuyuki Takai ,  Hiroyuki Shinogi ,  Yukihiro Takao

IPC分类号： H01L2144

CPC分类号： H01L24/12 ,  H01L21/56 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

摘要： A process of exposing the head of a metal post used with a chip size package is simplified. A first semiconductor manufacturing method comprising the steps of forming an insulating resin layer R so as to completely cover the top of a metal post 8 and then polishing the resin layer so as to expose the head of the metal post, and a second semiconductor manufacturing method comprising the steps of forming an insulating resin layer R so as to completely cover the top of the metal post 8, then back grinding the wafer rear face, and then polishing the resin layer R so as to expose the head of the metal post are provided.

摘要翻译： 使用与芯片尺寸封装件一起使用的金属柱头的曝光过程被简化。 第一半导体制造方法包括以下步骤：形成绝缘树脂层R，以完全覆盖金属柱8的顶部，然后抛光树脂层以暴露金属柱的头部;以及第二半导体制造方法 包括以下步骤：形成绝缘树脂层R，以完全覆盖金属柱8的顶部，然后对晶片背面进行背面磨削，然后对树脂层R进行抛光以使金属柱的头部露出 。