公开(公告)号：US08390118B2

公开(公告)日：2013-03-05

申请号：US12859635

申请日：2010-08-19

申请人： Pang-Chun Lin ,  Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

发明人： Pang-Chun Lin ,  Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/568 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/85001 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad and the traces therein, and the cavities exposing the die pad and the traces; a solder mask layer formed in the cavities and having a plurality of openings for exposing the trace ends and a portion of the die pad; and solder balls formed in the openings and electrically connected to the trace ends. Engaging the solder mask layer with the encapsulant enhances adhesion strength of the solder mask layer so as to prolong the moisture permeation path and enhance package reliability.

摘要翻译： 具有电连接结构的半导体封装包括：具有管芯焊盘和围绕管芯焊盘的迹线的导电层; 一个芯片 接合线; 具有多个空腔的密封剂，其深度大于管芯焊盘的厚度，以及用于将管芯焊盘和其中的迹线嵌入其中的迹线，以及使裸片焊盘和迹线露出的空腔; 形成在所述空腔中的焊料掩模层，并且具有用于暴露所述迹线端部和所述管芯焊盘的一部分的多个开口; 以及形成在开口中并电连接到迹线端的焊球。 将焊料掩模层与密封剂接合，增强了焊料掩模层的粘合强度，从而延长了水分渗透路径并提高了封装的可靠性。

公开(公告)号：US20110156252A1

公开(公告)日：2011-06-30

申请号：US12859635

申请日：2010-08-19

申请人： Pang-Chun Lin ,  Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

发明人： Pang-Chun Lin ,  Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC分类号： H01L23/49 ,  H01L21/00

CPC分类号： H01L21/568 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/85001 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad and the traces therein, and the cavities exposing the die pad and the traces; a solder mask layer formed in the cavities and having a plurality of openings for exposing the trace ends and a portion of the die pad; and solder balls formed in the openings and electrically connected to the trace ends. Engaging the solder mask layer with the encapsulant enhances adhesion strength of the solder mask layer so as to prolong the moisture permeation path and enhance package reliability.

摘要翻译： 具有电连接结构的半导体封装包括：具有管芯焊盘和围绕管芯焊盘的迹线的导电层; 一个芯片 接合线; 具有多个空腔的密封剂，其深度大于管芯焊盘的厚度，以及用于将管芯焊盘和其中的迹线嵌入其中的迹线，以及暴露管芯焊盘和迹线的空腔; 形成在所述空腔中的焊料掩模层，并且具有用于暴露所述迹线端部和所述管芯焊盘的一部分的多个开口; 以及形成在开口中并电连接到迹线端的焊球。 将焊料掩模层与密封剂接合，增强了焊料掩模层的粘合强度，从而延长了水分渗透路径并提高了封装的可靠性。

公开(公告)号：US20070059863A1

公开(公告)日：2007-03-15

申请号：US11486569

申请日：2006-07-14

申请人： Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang

发明人： Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang

IPC分类号： H01L21/00

CPC分类号： H01L21/4832 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A method of manufacturing a quad flat non-leaded semiconductor package is provided. A metal plate is prepared and is defined with predetermined positions of a plurality of electrically conductive pads. A resist layer is formed on the metal plate, and a plurality of openings are formed in the resist layer and correspond to the predetermined positions of the electrically conductive pads. A solderable metal plated layer is formed in each of the openings of the resist layer. The resist layer on the metal plate is removed. A portion of the metal plate, which is not covered by the metal plated layers, is etched using the metal plated layers as a mask. A chip is mounted on the metal plate and is electrically connected to the electrically conductive pads. A molding process is performed such that the chip and the metal plate are encapsulated by an encapsulant.

摘要翻译： 提供一种制造四边形非铅半导体封装的方法。 制备金属板并且被限定在多个导电焊盘的预定位置。 在金属板上形成抗蚀剂层，并且在抗蚀剂层中形成多个开口并对应于导电焊盘的预定位置。 在抗蚀剂层的每个开口中形成可焊接金属镀层。 去除金属板上的抗蚀剂层。 使用金属镀层作为掩模来蚀刻未被金属镀层覆盖的金属板的一部分。 芯片安装在金属板上并与导电焊盘电连接。 进行成型工艺，使得芯片和金属板被密封剂包封。

公开(公告)号：US20120007234A1

公开(公告)日：2012-01-12

申请号：US12967839

申请日：2010-12-14

申请人： Yueh-Ying Tsai ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

发明人： Yueh-Ying Tsai ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/3142 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/81395 ,  H01L2224/81439 ,  H01L2224/83395 ,  H01L2224/83439 ,  H01L2224/85001 ,  H01L2224/85395 ,  H01L2224/85439 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package without a chip carrier formed thereon and a fabrication method thereof. A metallic carrier is half-etched to form a plurality of grooves and metal studs corresponding to the grooves. The grooves are filled with a first encapsulant and a plurality of bonding pads are formed on the metal studs. The first encapsulant is bonded with the metal studs directly. Each of the bonding pads and one of the metal studs corresponding to the bonding pad form a T-shaped structure. Therefore, bonding force between the metal studs and the first encapsulant is enhanced such that delamination is avoided. Die mounting, wire-bonding and molding processes are performed subsequently. Since the half-etched grooves are filled with the first encapsulant, the drawback of having pliable metallic carrier that makes transportation difficult to carry out as encountered in prior techniques is overcome, and the manufacturing cost is educed by not requiring the use of costly metals as an etching resist layer.

摘要翻译： 其上形成有芯片载体的半导体封装及其制造方法。 金属载体被半蚀刻以形成对应于凹槽的多个凹槽和金属螺柱。 凹槽填充有第一密封剂，并且在金属螺柱上形成多个接合焊盘。 第一密封剂直接与金属螺栓结合。 每个接合焊盘和对应于接合焊盘的一个金属螺柱形成T形结构。 因此，金属螺柱和第一密封剂之间的结合力增强，从而避免分层。 随后进行模具安装，引线接合和成型工艺。 由于半蚀刻槽被第一密封剂填充，因此克服了使现有技术中遇到的导致难以进行运输的柔韧金属载体的缺陷，并且通过不需要使用昂贵的金属来促进制造成本 抗蚀剂层。

公开(公告)号：US20070059865A1

公开(公告)日：2007-03-15

申请号：US11164322

申请日：2005-11-18

申请人： Chien-Ping Huang ,  Fu-Di Tang

发明人： Chien-Ping Huang ,  Fu-Di Tang

IPC分类号： H01L21/00

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package with a support structure and a fabrication method thereof are provided. With a chip being electrically connected to electrical contacts formed on a carrier, a molding process is performed. A plurality of recessed portions formed on the carrier are filled with an encapsulant for encapsulating the chip during the molding process. After the carrier is removed, the part of the encapsulant filling the recessed portions forms outwardly protruded portions on a surface of the encapsulant, such that the semiconductor package can be attached to an external device via the protruded portions.

摘要翻译： 提供了具有支撑结构的半导体封装及其制造方法。 通过将芯片电连接到形成在载体上的电触头，进行成型工艺。 形成在载体上的多个凹部填充有用于在模制过程中封装芯片的密封剂。 在移除载体之后，填充凹部的密封剂的一部分在密封剂的表面上形成向外突出的部分，使得半导体封装可以经由突出部分附接到外部装置。

公开(公告)号：US20070018291A1

公开(公告)日：2007-01-25

申请号：US11488689

申请日：2006-07-19

申请人： Chien-Ping Huang ,  Fu-Di Tang ,  Yuan-Chun Li

发明人： Chien-Ping Huang ,  Fu-Di Tang ,  Yuan-Chun Li

IPC分类号： H01L23/495

CPC分类号： H01L21/6835 ,  H01L21/4821 ,  H01L21/568 ,  H01L23/49503 ,  H01L23/49531 ,  H01L23/49541 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2221/68345 ,  H01L2224/29139 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package without a chip carrier includes an insulating structure having an opening; an electroplated die pad provided in the opening; a chip attached to the electroplated die pad by a thermally conductive adhesive; a plurality of electrical contacts formed around the electroplated die pad, wherein at least one of the electrical contacts is provided on a top surface of the insulating structure, and the chip is electrically connected to the electrical contacts; and an encapsulant for encapsulating the chip, the insulating structure and the electrical contacts, wherein bottom surfaces of the insulating structure, the electroplated die pad and the electrical contacts, except the at least one electrical contact provided on the top surface of the insulating structure, are exposed from the encapsulant and are flush with a bottom surface of the encapsulant. A fabrication method of the semiconductor package is also provided.

摘要翻译： 没有芯片载体的半导体封装包括具有开口的绝缘结构; 设置在开口中的电镀模片垫; 通过导热粘合剂附着到电镀模片垫的芯片; 形成在所述电镀管芯焊盘周围的多个电触点，其中所述电触头中的至少一个设置在所述绝缘结构的顶表面上，并且所述芯片电连接到所述电触头; 以及用于封装所述芯片，所述绝缘结构和所述电触点的密封剂，其中所述绝缘结构的底表面，所述电镀芯片焊盘和所述电触点除了设置在所述绝缘结构的顶表面上的所述至少一个电触点之外， 从密封剂暴露并与密封剂的底表面齐平。 还提供了半导体封装的制造方法。

公开(公告)号：US08241967B2

公开(公告)日：2012-08-14

申请号：US13032284

申请日：2011-02-22

申请人： Chien-Ping Huang ,  Fu-Di Tang

发明人： Chien-Ping Huang ,  Fu-Di Tang

IPC分类号： H01L21/00

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package with a support structure and a fabrication method thereof are provided. With a chip being electrically connected to electrical contacts formed on a carrier, a molding process is performed. A plurality of recessed portions formed on the carrier are filled with an encapsulant for encapsulating the chip during the molding process. After the carrier is removed, the part of the encapsulant filling the recessed portions forms outwardly protruded portions on a surface of the encapsulant, such that the semiconductor package can be attached to an external device via the protruded portions.

摘要翻译： 提供了具有支撑结构的半导体封装及其制造方法。 通过将芯片电连接到形成在载体上的电触头，进行成型工艺。 形成在载体上的多个凹部填充有用于在模制过程中封装芯片的密封剂。 在移除载体之后，填充凹部的密封剂的一部分在密封剂的表面上形成向外突出的部分，使得半导体封装可以经由突出部分附接到外部装置。

公开(公告)号：US20110298126A1

公开(公告)日：2011-12-08

申请号：US12970126

申请日：2010-12-16

申请人： Yueh-Ying Tsai ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

发明人： Yueh-Ying Tsai ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC分类号： H01L23/492 ,  H01L23/488 ,  H01L21/50

CPC分类号： H01L23/49582 ,  H01L21/4832 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49548 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85439 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of metal studs each serving in position as a solder pad or a die pad; filing each of the recess grooves with a first encapsulant; forming on the metal studs an antioxidant layer such as a silver plating layer or an organic solderable protection layer; and performing die-bonding, wire-bonding and molding processes respectively to form a second encapsulant encapsulating the chip. The recess grooves are filled with the first encapsulant to enhance the adhesion between the first encapsulant and the metal carrier, thereby solving the conventional problem of having a weak and pliable copper plate and avoiding transportation difficulty. The invention eliminates the use of costly metals as an etching resist layer to reduce fabrication cost, and further allows conductive traces to be flexibly disposed on the metal carrier to enhance electrical connection quality.

摘要翻译： 制造无载体半导体封装的方法包括：半蚀刻金属载体以形成多个凹槽和多个金属柱，每个金属柱用作焊盘或管芯焊盘的位置; 用第一密封剂填充每个凹槽; 在金属柱上形成诸如镀银层或有机可焊保护层的抗氧化层; 并分别进行芯片接合，引线接合和模制工艺以形成封装芯片的第二密封剂。 凹槽被第一密封剂填充以增强第一密封剂和金属载体之间的粘合性，从而解决了具有弱和柔韧的铜板的传统问题，并避免了运输困难。 本发明消除了使用昂贵的金属作为抗蚀剂层以降低制造成本，并且还允许导电迹线被柔性地布置在金属载体上以增强电连接质量。

公开(公告)号：US20110143498A1

公开(公告)日：2011-06-16

申请号：US13032284

申请日：2011-02-22

申请人： Chien-Ping Huang ,  Fu-Di Tang

发明人： Chien-Ping Huang ,  Fu-Di Tang

IPC分类号： H01L21/50

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package with a support structure and a fabrication method thereof are provided. With a chip being electrically connected to electrical contacts formed on a carrier, a molding process is performed. A plurality of recessed portions formed on the carrier are filled with an encapsulant for encapsulating the chip during the molding process. After the carrier is removed, the part of the encapsulant filling the recessed portions forms outwardly protruded portions on a surface of the encapsulant, such that the semiconductor package can be attached to an external device via the protruded portions.

摘要翻译： 提供了具有支撑结构的半导体封装及其制造方法。 通过将芯片电连接到形成在载体上的电触头，进行成型工艺。 形成在载体上的多个凹部填充有用于在模制过程中封装芯片的密封剂。 在移除载体之后，填充凹部的密封剂的一部分在密封剂的表面上形成向外突出的部分，使得半导体封装可以经由突出部分附接到外部装置。

公开(公告)号：US06696750B1

公开(公告)日：2004-02-24

申请号：US10395561

申请日：2003-03-24

申请人： Cha-Yun Yin ,  Ming-Chun Laio ,  Fu-Di Tang ,  Chien-Ping Huang

发明人： Cha-Yun Yin ,  Ming-Chun Laio ,  Fu-Di Tang ,  Chien-Ping Huang

IPC分类号： H01L23495

CPC分类号： H01L23/4334 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package with a heat dissipating structure is provided, including a lead frame with a die pad for allowing a chip to be mounted on an upper surface of the die pad, and a heat sink abutting against a lower surface of the die pad. A top surface of the heat sink, in contact with the lower surface of the die pad, is formed with at least a recessed portion. During a molding process of using a resin material to form an encapsulant for encapsulating the chip, lead frame and heat sink, the resin material fills into the recessed portion and forms a supporting member between the die pad and heat sink to provide support for a central portion of the die pad, so as to prevent the chip from cracking in a step of building up a packing pressure of the molding process, thereby assuring yield and reliability of fabricated products.

摘要翻译： 提供了一种具有散热结构的半导体封装，包括具有用于允许芯片安装在管芯焊盘的上表面上的管芯焊盘的引线框架和抵靠在管芯焊盘的下表面的散热片。 与散热片的下表面接触的散热器的顶表面至少形成有凹部。 在使用树脂材料形成用于封装芯片，引线框架和散热器的密封剂的模塑过程中，树脂材料填充到凹部中并在芯片焊盘和散热器之间形成支撑构件，以为中心 以便在建立成形工序的包装压力的步骤中防止芯片破裂，从而确保制成品的成品率和可靠性。