公开(公告)号：US06541856B2

公开(公告)日：2003-04-01

申请号：US09874011

申请日：2001-06-06

申请人： David J. Corisis ,  Mike Brooks ,  Mark S. Johnson ,  Larry D. Kinsman

发明人： David J. Corisis ,  Mike Brooks ,  Mark S. Johnson ,  Larry D. Kinsman

IPC分类号： H01L2972

CPC分类号： H01L25/0652 ,  H01L2224/4826

摘要： A high density semiconductor package with thermally enhanced properties is described. The semiconductor package includes a pair of lead frames, each being attached to a respective semiconductor die. The dies are attached to respective lead frames via an adhering material, such as a tape. Further, the dies are each electrically connected to fingers of each lead frame. In one illustrated embodiment, the dies and portions of the fingers are encapsulated in such a way as to leave one surface of each die exposed. In another illustrated embodiment, heat dissipation for the semiconductor package occurs through exposed fingers of the lead frames which adhere semiconductor dies within a cavity located therebetween.

公开(公告)号：US06740546B2

公开(公告)日：2004-05-25

申请号：US10225575

申请日：2002-08-21

申请人： David J. Corisis ,  Mike Brooks

发明人： David J. Corisis ,  Mike Brooks

IPC分类号： H01L2144

CPC分类号： H01L23/4951 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices and methods for assembling microelectronic devices are disclosed herein. In one embodiment, a method of assembling a microelectronic device having a die and an interposer substrate includes depositing a solder ball onto a ball-pad on the interposer substrate and molding a compound to form a casing around at least a portion of the die and the solder ball. The method can further include forming a first cover over a first surface of the interposer substrate with the compound and forming a second cover over a second surface opposite the first surface of the interposer substrate with the compound. The first cover can have a first volume and a first surface area and the second cover can have a second volume and a second surface area. The first and second volumes and the first and second surface areas can be at least approximately equal.

公开(公告)号：US07151013B2

公开(公告)日：2006-12-19

申请号：US10260615

申请日：2002-10-01

申请人： David J. Corisis ,  Mike Brooks ,  Mark S. Johnson ,  Larry D. Kinsman

发明人： David J. Corisis ,  Mike Brooks ,  Mark S. Johnson ,  Larry D. Kinsman

IPC分类号： H01L21/44

CPC分类号： H01L25/0652 ,  H01L2224/4826

摘要： A high density semiconductor package with thermally enhanced properties is described. The semiconductor package includes a pair of lead frames, each being attached to a respective semiconductor die. The dies are attached to respective lead frames via an adhering material, such as a tape. Further, the dies are each electrically connected to fingers of each lead frame. In one illustrated embodiment, the dies and portions of the fingers are encapsulated in such a way as to leave one surface of each die exposed. In another illustrated embodiment, heat dissipation for the semiconductor package occurs through exposed fingers of the lead frames which adhere semiconductor dies within a cavity located therebetween.

摘要翻译： 描述了具有热增强性能的高密度半导体封装。 半导体封装包括一对引线框架，每个引线框架都附接到相应的半导体管芯。 模具通过诸如胶带的粘合材料附接到相应的引线框架。 此外，模具各自电连接到每个引线框架的指状物。 在一个示出的实施例中，模具和手指的部分以这样的方式封装，以使每个裸片的一个表面露出。 在另一示出的实施例中，半导体封装的散热通过引线框架的暴露的指状物发生，该引线框架将半导体管芯粘附在位于其间的空腔内。

公开(公告)号：US06924550B2

公开(公告)日：2005-08-02

申请号：US10818225

申请日：2004-04-05

申请人： David J. Corisis ,  Mike Brooks

发明人： David J. Corisis ,  Mike Brooks

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H01L23/02 ,  H01L23/28 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/4951 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices and methods for assembling microelectronic devices are disclosed herein. In one embodiment, a method of assembling a microelectronic device having a die and an interposer substrate includes depositing a solder ball onto a ball-pad on the interposer substrate and molding a compound to form a casing around at least a portion of the die and the solder ball. The method can further include forming a first cover over a first surface of the interposer substrate with the compound and forming a second cover over a second surface opposite the first surface of the interposer substrate with the compound. The first cover can have a first volume and a first surface area and the second cover can have a second volume and a second surface area. The first and second volumes and the first and second surface areas can be at least approximately equal.

摘要翻译： 本文公开了用于组装微电子器件的封装的微电子器件和方法。 在一个实施例中，组装具有管芯和插入器衬底的微电子器件的方法包括将焊球沉积到插入器衬底上的球垫上并模制化合物以在模具的至少一部分周围形成壳体， 焊球 所述方法还可以包括在所述插入器基板的第一表面上与所述化合物形成第一盖，并在所述化合物的与所述插入物基板的第一表面相对的第二表面上形成第二盖。 第一盖可以具有第一容积和第一表面积，并且第二盖可以具有第二容积和第二表面积。 第一和第二体积以及第一和第二表面区域可以至少近似相等。

公开(公告)号：US08587109B2

公开(公告)日：2013-11-19

申请号：US13305564

申请日：2011-11-28

申请人： David J. Corisis

发明人： David J. Corisis

IPC分类号： H01L23/02 ,  H01L23/34

CPC分类号： H01L25/0657 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/4911 ,  H01L2225/06582 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2201/10689 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00014

摘要： An assembly of microelectronic devices and method for forming an assembly of microelectronic devices. In one embodiment, an assembly comprises a support member having support member circuitry and a first microelectronic die attached to the support member and coupled to the support member circuitry with first conductive members. The assembly further comprises a second microelectronic die positioned at least proximate to the first microelectronic die and coupled directly to the support member circuitry with second conductive members that are not in direct contact with the first conductive members. One of the first or second microelectronic dies is positioned between the support member and the other of the first and second microelectronic dies.

摘要翻译： 微电子器件的组件和用于形成微电子器件的组件的方法。 在一个实施例中，组件包括具有支撑构件电路的支撑构件和附接到支撑构件并且与第一导电构件耦合到支撑构件电路的第一微电子管芯。 组件还包括第二微电子管芯，其定位成至少靠近第一微电子管芯并且与不与第一导电构件直接接触的第二导电构件直接连接到支撑构件电路。 第一或第二微电子管芯中的一个位于支撑构件和第一和第二微电子管芯中的另一个之间。

公开(公告)号：US08202754B2

公开(公告)日：2012-06-19

申请号：US11452750

申请日：2006-06-13

申请人： David J. Corisis ,  Chin Hui Chong ,  Choon Kuan Lee

发明人： David J. Corisis ,  Chin Hui Chong ,  Choon Kuan Lee

IPC分类号： H01L21/00

CPC分类号： H01L23/49827 ,  H01L23/24 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices recessed in support member cavities, and associated methods, are disclosed. Method in accordance with one embodiment includes positioning a microelectronic device in a cavity of a support member, with the cavity having a closed end with a conductive layer, and an opening through which the cavity is assessable. The microelectronic device can have bond sites, a first surface, and a second surface facing opposite from the first surface. The microelectronic device can be positioned in the cavity so that the second surface faces toward and is carried by the conductive layer. The method can further include electrically coupling the bond sites of the microelectronic device to the conductive layer. In particular embodiments, the microelectronic device can be encapsulated in the cavity without the need for a releasable tape layer to temporarily support the microelectronic device.

摘要翻译： 封装在支撑构件空腔中的微电子器件以及相关方法被公开。 根据一个实施例的方法包括将微电子器件定位在支撑构件的空腔中，其中空腔具有带有导电层的封闭端以及空腔可以评估的开口。 微电子器件可以具有接合位置，第一表面和与第一表面相对的第二表面。 微电子器件可以定位在空腔中，使得第二表面面向导电层并由导电层承载。 该方法还可以包括将微电子器件的键合位置电耦合到导电层。 在具体实施例中，微电子器件可以被封装在空腔中，而不需要可释放的带层来临时支撑微电子器件。

公开(公告)号：US20120146239A1

公开(公告)日：2012-06-14

申请号：US13399659

申请日：2012-02-17

申请人： David J. Corisis ,  Chin Hui Chong ,  Choon Kuan Lee

发明人： David J. Corisis ,  Chin Hui Chong ,  Choon Kuan Lee

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  H01L23/24 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices recessed in support member cavities, and associated methods, are disclosed. Method in accordance with one embodiment includes positioning a microelectronic device in a cavity of a support member, with the cavity having a closed end with a conductive layer, and an opening through which the cavity is assessable. The microelectronic device can have bond sites, a first surface, and a second surface facing opposite from the first surface. The microelectronic device can be positioned in the cavity so that the second surface faces toward and is carried by the conductive layer. The method can further include electrically coupling the bond sites of the microelectronic device to the conductive layer. In particular embodiments, the microelectronic device can be encapsulated in the cavity without the need for a releasable tape layer to temporarily support the microelectronic device.

摘要翻译： 封装在支撑构件空腔中的微电子器件以及相关方法被公开。 根据一个实施例的方法包括将微电子器件定位在支撑构件的空腔中，其中空腔具有带有导电层的封闭端以及空腔可以评估的开口。 微电子器件可以具有接合位置，第一表面和与第一表面相对的第二表面。 微电子器件可以定位在空腔中，使得第二表面面向导电层并由导电层承载。 该方法还可以包括将微电子器件的键合位置电耦合到导电层。 在具体实施例中，微电子器件可以被封装在空腔中，而不需要可释放的带层来临时支撑微电子器件。

公开(公告)号：US08138021B2

公开(公告)日：2012-03-20

申请号：US12838642

申请日：2010-07-19

申请人： David J. Corisis ,  J. Michael Brooks ,  Choon Kuan Lee ,  Chin Hui Chong

发明人： David J. Corisis ,  J. Michael Brooks ,  Choon Kuan Lee ,  Chin Hui Chong

IPC分类号： H01L21/50

CPC分类号： H01L23/5389 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1627 ,  H01L2924/181 ,  Y10T29/53183 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged semiconductor components, apparatus for packaging semiconductor devices, methods of packaging semiconductor devices, and methods of manufacturing apparatus for packaging semiconductor devices. One embodiment of an apparatus for packaging semiconductor devices comprises a first board having a front side, a backside, arrays of die contacts, arrays of first backside terminals electrically coupled to the die contacts, arrays of second backside terminals, and a plurality of individual package areas that have an array of the die contacts, an array of the first backside terminals, and an array of the second backside terminals. The apparatus further includes a second board having a first side laminated to the front side of the first board, a second side, openings through the second board aligned with individual package areas that define die cavities, and arrays of front contacts at the second side electrically coupled to the second backside terminals by interconnects extending through the first board and the second board.

摘要翻译： 封装半导体部件，半导体装置的封装装置，半导体装置的封装方法以及半导体装置的封装装置的制造方法。 用于封装半导体器件的装置的一个实施例包括具有正面，背面，芯片触点阵列，电耦合到裸片触点的第一背面端子阵列，第二背面端子阵列和多个单独封装的第一板 具有芯片触点阵列的区域，第一背面端子的阵列和第二背面端子的阵列。 所述设备还包括第二板，其具有层压到所述第一板的前侧的第一侧，第二侧，穿过所述第二板的开口，所述第二板与限定模腔的各个封装区域对准，并且在所述第二侧上的前触点阵列电 通过延伸穿过第一板和第二板的互连件耦合到第二背面端子。

公开(公告)号：US07998792B2

公开(公告)日：2011-08-16

申请号：US12631296

申请日：2009-12-04

申请人： Leonard E. Mess ,  Jerry M. Brooks ,  David J. Corisis

发明人： Leonard E. Mess ,  Jerry M. Brooks ,  David J. Corisis

IPC分类号： H01L21/00

CPC分类号： H01L23/3128 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L29/0657 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/10161 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is formed of two or more dice of similar dimensions and bond pad arrangements, in which bond pads are located in fields along less than three edges of the active surface of each die. A first die is attached to a substrate and subsequent die or dice are attached in a vertical sequence atop the first die, each in an offset configuration from the next lower die to expose the bond pads thereof for conductive bonding to metallization of the substrate. The multiple chip device permits a plurality of dice to be stacked in a high-density low-profile device. A particularly useful application is the formation of stacked mass storage flash memory package.

摘要翻译： 半导体器件由两个或更多个具有类似尺寸和接合焊盘布置的管芯形成，其中焊盘位于沿着每个管芯的有效表面的三个边缘的场内。 将第一裸片连接到基底上，随后的裸片或裸片以垂直顺序连接在第一裸片的顶部，每一个都具有与下一个下裸片的偏移配置，以露出其接合焊盘，用于导电粘合以进行衬底的金属化。 多芯片器件允许多个芯片堆叠在高密度薄型器件中。 特别有用的应用是形成堆叠的大容量存储闪存包。

公开(公告)号：US07915726B2

公开(公告)日：2011-03-29

申请号：US11969300

申请日：2008-01-04

申请人： Chin Hui Chong ,  Choon Kuan Lee ,  David J. Corisis

发明人： Chin Hui Chong ,  Choon Kuan Lee ,  David J. Corisis

IPC分类号： H01L21/311

CPC分类号： H01L23/49816 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： Substrates for mounting microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices are disclosed herein. A method of manufacturing a substrate in accordance with one embodiment of the invention includes forming a conductive trace on a first side of a sheet of non-conductive material, and forming a via through the non-conductive material from a second side of the sheet to the conductive trace. The method further includes removing a section of the non-conductive material to form an edge of the non-conductive material extending across at least a portion of the via. In one embodiment, forming the edge across the via exposes at least a portion of the second conductive trace for subsequent attachment to a terminal on a microelectronic die.

摘要翻译： 用于安装微电子管芯的基板，在这种基板中形成通孔的方法，以及用于封装微电子器件的方法。 根据本发明的一个实施例的制造基板的方法包括在非导电材料片的第一侧上形成导电迹线，并且从片材的第二面通过非导电材料形成通孔， 导电迹线。 该方法还包括去除非导电材料的一部分以形成穿过通孔的至少一部分延伸的非导电材料的边缘。 在一个实施例中，跨过通孔形成边缘暴露出第二导电迹线的至少一部分，以便随后连接到微电子管芯上的端子。