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1.发明申请Semiconductor Device and Method of Embedding TSV Semiconductor Die Within Substrate for Vertical Interconnect in POP 有权半导体器件和嵌入TSV半导体晶片的方法，用于垂直互连在POP中公开(公告)号：US20120273959A1
公开(公告)日：2012-11-01
申请号：US13098438
申请日：2011-04-30
申请人： DongSam Park , YongDuk Lee
发明人： DongSam Park , YongDuk Lee
CPC分类号： H01L24/05 , H01L23/3107 , H01L23/481 , H01L23/528 , H01L24/03 , H01L24/06 , H01L24/16 , H01L24/19 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/92 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/0345 , H01L2224/03452 , H01L2224/03464 , H01L2224/0401 , H01L2224/04042 , H01L2224/05558 , H01L2224/0557 , H01L2224/05571 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/06181 , H01L2224/16145 , H01L2224/16147 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73259 , H01L2224/73265 , H01L2224/81191 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01079 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00012 , H01L2924/00 , H01L2224/19 , H01L2224/05552 , H01L2224/81805 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a substrate with a first conductive layer over a surface of the substrate and a plurality of cavities exposing the first conductive layer. A first semiconductor die having conductive TSV is mounted into the cavities of the substrate. A first insulating layer is formed over the substrate and first semiconductor die and extends into the cavities to embed the first semiconductor die within the substrate. A portion of the first insulating layer is removed to expose the conductive TSV. A second conductive layer is formed over the conductive TSV. A portion of the first conductive layer is removed to form electrically common or electrically isolated conductive segments of the first conductive layer. A second insulating layer is formed over the substrate and conductive segments of the first conductive layer. A second semiconductor die is mounted over the substrate electrically connected to the second conductive layer.
摘要翻译： 半导体器件具有在衬底的表面上具有第一导电层的衬底和暴露第一导电层的多个空腔。 具有导电TSV的第一半导体管芯被安装到基板的空腔中。 第一绝缘层形成在衬底和第一半导体管芯上并延伸到空腔中以将第一半导体管芯嵌入衬底内。 去除第一绝缘层的一部分以暴露导电TSV。 在导电TSV上形成第二导电层。 去除第一导电层的一部分以形成第一导电层的电通常或电隔离的导电段。 第二绝缘层形成在衬底和第一导电层的导电段上。 第二半导体管芯安装在电连接到第二导电层上的衬底上。
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2.发明授权Semiconductor device and method of embedding TSV semiconductor die within substrate for vertical interconnect in POP 有权半导体器件和嵌入TSV半导体管芯在基板内的垂直互连的方法公开(公告)号：US09087701B2
公开(公告)日：2015-07-21
申请号：US13098438
申请日：2011-04-30
申请人： DongSam Park , YongDuk Lee
发明人： DongSam Park , YongDuk Lee
IPC分类号： H01L21/00 , H01L23/00 , H01L25/10 , H01L25/065 , H01L23/48
CPC分类号： H01L24/05 , H01L23/3107 , H01L23/481 , H01L23/528 , H01L24/03 , H01L24/06 , H01L24/16 , H01L24/19 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/92 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/0345 , H01L2224/03452 , H01L2224/03464 , H01L2224/0401 , H01L2224/04042 , H01L2224/05558 , H01L2224/0557 , H01L2224/05571 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/06181 , H01L2224/16145 , H01L2224/16147 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73259 , H01L2224/73265 , H01L2224/81191 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01079 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00012 , H01L2924/00 , H01L2224/19 , H01L2224/05552 , H01L2224/81805 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a substrate with a first conductive layer over a surface of the substrate and a plurality of cavities exposing the first conductive layer. A first semiconductor die having conductive TSV is mounted into the cavities of the substrate. A first insulating layer is formed over the substrate and first semiconductor die and extends into the cavities to embed the first semiconductor die within the substrate. A portion of the first insulating layer is removed to expose the conductive TSV. A second conductive layer is formed over the conductive TSV. A portion of the first conductive layer is removed to form electrically common or electrically isolated conductive segments of the first conductive layer. A second insulating layer is formed over the substrate and conductive segments of the first conductive layer. A second semiconductor die is mounted over the substrate electrically connected to the second conductive layer.
摘要翻译： 半导体器件具有在衬底的表面上具有第一导电层的衬底和暴露第一导电层的多个空腔。 具有导电TSV的第一半导体管芯被安装到基板的空腔中。 第一绝缘层形成在衬底和第一半导体管芯上并延伸到空腔中以将第一半导体管芯嵌入衬底内。 去除第一绝缘层的一部分以暴露导电TSV。 在导电TSV上形成第二导电层。 去除第一导电层的一部分以形成第一导电层的电通常或电隔离的导电段。 第二绝缘层形成在衬底和第一导电层的导电段上。 第二半导体管芯安装在电连接到第二导电层上的衬底上。
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3.发明申请Semiconductor Device and Method of Embedding TSV Semiconductor Die Within Encapsulant with TMV for Vertical Interconnect in POP 有权半导体器件和嵌入TSV封装的TMV半导体芯片的方法，用于在POP中垂直互连的TMV公开(公告)号：US20120273960A1
公开(公告)日：2012-11-01
申请号：US13098440
申请日：2011-04-30
申请人： DongSam Park , YongDuk Lee
发明人： DongSam Park , YongDuk Lee
CPC分类号： H01L23/49827 , H01L21/4846 , H01L21/561 , H01L23/295 , H01L23/481 , H01L23/49816 , H01L23/49822 , H01L23/5389 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/48 , H01L24/73 , H01L25/16 , H01L2221/6835 , H01L2224/0401 , H01L2224/04105 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0603 , H01L2224/06181 , H01L2224/1132 , H01L2224/11334 , H01L2224/1146 , H01L2224/11849 , H01L2224/12105 , H01L2224/13025 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/2518 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73209 , H01L2224/73259 , H01L2224/73265 , H01L2224/94 , H01L2924/00014 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H05K1/185 , H01L2924/00 , H01L2224/11 , H01L2224/03 , H01L2224/19 , H01L2924/00012 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a carrier or first conductive layer with a plurality of TSV semiconductor die mounted over the carrier or first conductive layer. An encapsulant is deposited around the first semiconductor die and over the carrier or first conductive layer to embed the first semiconductor die. A conductive TMV is formed through the encapsulant. A second conductive layer is formed over a first surface of the encapsulant. A first insulating layer is formed over the first surface of the encapsulant while exposing portions of the second conductive layer. A second insulating layer is formed over the second surface of the encapsulant while exposing portions of the first conductive layer. Alternatively, a first interconnect structure is formed over the first surface of the encapsulant. The carrier is removed and a second interconnect structure is formed over a second surface of the encapsulant.
摘要翻译： 半导体器件具有载体或第一导电层，其具有安装在载体或第一导电层上的多个TSV半导体管芯。 围绕第一半导体管芯并在载体或第一导电层上沉积密封剂以嵌入第一半导体管芯。 通过密封剂形成导电TMV。 在密封剂的第一表面上形成第二导电层。 第一绝缘层形成在密封剂的第一表面上，同时暴露第二导电层的部分。 第二绝缘层形成在密封剂的第二表面上，同时暴露第一导电层的部分。 或者，在密封剂的第一表面上形成第一互连结构。 移除载体并且在密封剂的第二表面上形成第二互连结构。
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4.发明授权Integrated circuit packaging system with vertical interconnects and method of manufacture thereof 有权具有垂直互连的集成电路封装系统及其制造方法公开(公告)号：US08970044B2
公开(公告)日：2015-03-03
申请号：US13167631
申请日：2011-06-23
申请人： A Leam Choi , DongSam Park , YongDuk Lee
发明人： A Leam Choi , DongSam Park , YongDuk Lee
IPC分类号： H01L23/48 , H01L21/56 , H01L23/498 , H01L25/10 , H01L25/03 , H01L25/00 , H01L21/48 , H01L23/31 , H01L23/00
CPC分类号： H01L21/565 , H01L21/4853 , H01L21/561 , H01L23/3128 , H01L23/49811 , H01L24/16 , H01L24/73 , H01L24/81 , H01L24/97 , H01L25/03 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/1023 , H01L2225/1058 , H01L2924/01029 , H01L2924/12042 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19107 , H01L2924/3025 , H01L2924/3511 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting an integrated circuit over the substrate; forming an encapsulation over the integrated circuit, the encapsulation having an encapsulation interior sidewall; forming a peripheral non-horizontal conductive plate directly on the encapsulation interior sidewall; and forming a peripheral vertical conductor directly on the peripheral non-horizontal conductive plate and the substrate.
摘要翻译： 一种集成电路封装系统的制造方法，包括：提供基板; 在基板上安装集成电路; 在所述集成电路上形成封装，所述封装具有封装内侧壁; 直接在封装内侧壁上形成周边非水平导电板; 并且在外周非水平导电板和基板上直接形成外围垂直导体。
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5.发明授权Semiconductor device and method of embedding TSV semiconductor die within encapsulant with TMV for vertical interconnect in POP 有权半导体器件及其在TSV半导体管芯封装中嵌入TMV的方法，用于POP中的垂直互连公开(公告)号：US08883561B2
公开(公告)日：2014-11-11
申请号：US13098440
申请日：2011-04-30
申请人： DongSam Park , YongDuk Lee
发明人： DongSam Park , YongDuk Lee
IPC分类号： H01L21/00 , H01L23/00 , H01L23/498 , H01L21/48 , H01L21/56 , H01L25/16 , H01L23/538 , H01L23/48 , H05K1/18 , H01L23/29
CPC分类号： H01L23/49827 , H01L21/4846 , H01L21/561 , H01L23/295 , H01L23/481 , H01L23/49816 , H01L23/49822 , H01L23/5389 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/48 , H01L24/73 , H01L25/16 , H01L2221/6835 , H01L2224/0401 , H01L2224/04105 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0603 , H01L2224/06181 , H01L2224/1132 , H01L2224/11334 , H01L2224/1146 , H01L2224/11849 , H01L2224/12105 , H01L2224/13025 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/2518 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73209 , H01L2224/73259 , H01L2224/73265 , H01L2224/94 , H01L2924/00014 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H05K1/185 , H01L2924/00 , H01L2224/11 , H01L2224/03 , H01L2224/19 , H01L2924/00012 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a carrier or first conductive layer with a plurality of TSV semiconductor die mounted over the carrier or first conductive layer. An encapsulant is deposited around the first semiconductor die and over the carrier or first conductive layer to embed the first semiconductor die. A conductive TMV is formed through the encapsulant. A second conductive layer is formed over a first surface of the encapsulant. A first insulating layer is formed over the first surface of the encapsulant while exposing portions of the second conductive layer. A second insulating layer is formed over the second surface of the encapsulant while exposing portions of the first conductive layer. Alternatively, a first interconnect structure is formed over the first surface of the encapsulant. The carrier is removed and a second interconnect structure is formed over a second surface of the encapsulant.
摘要翻译： 半导体器件具有载体或第一导电层，其具有安装在载体或第一导电层上的多个TSV半导体管芯。 围绕第一半导体管芯并在载体或第一导电层上沉积密封剂以嵌入第一半导体管芯。 通过密封剂形成导电TMV。 在密封剂的第一表面上形成第二导电层。 第一绝缘层形成在密封剂的第一表面上，同时暴露第二导电层的部分。 第二绝缘层形成在密封剂的第二表面上，同时暴露第一导电层的部分。 或者，在密封剂的第一表面上形成第一互连结构。 移除载体并且在密封剂的第二表面上形成第二互连结构。
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6.发明申请INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VERTICAL INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF 有权具有垂直互连的集成电路包装系统及其制造方法公开(公告)号：US20120326325A1
公开(公告)日：2012-12-27
申请号：US13167631
申请日：2011-06-23
申请人： A Leam Choi , DongSam Park , YongDuk Lee
发明人： A Leam Choi , DongSam Park , YongDuk Lee
CPC分类号： H01L21/565 , H01L21/4853 , H01L21/561 , H01L23/3128 , H01L23/49811 , H01L24/16 , H01L24/73 , H01L24/81 , H01L24/97 , H01L25/03 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/1023 , H01L2225/1058 , H01L2924/01029 , H01L2924/12042 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19107 , H01L2924/3025 , H01L2924/3511 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting an integrated circuit over the substrate; forming an encapsulation over the integrated circuit, the encapsulation having an encapsulation interior sidewall; forming a peripheral non-horizontal conductive plate directly on the encapsulation interior sidewall; and forming a peripheral vertical conductor directly on the peripheral non-horizontal conductive plate and the substrate.
摘要翻译： 一种集成电路封装系统的制造方法，包括：提供基板; 在基板上安装集成电路; 在所述集成电路上形成封装，所述封装具有封装内侧壁; 直接在封装内侧壁上形成周边非水平导电板; 并且在外周非水平导电板和基板上直接形成外围垂直导体。
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