Electrode materials with improved hydrogen degradation resistance
    1.
    发明授权
    Electrode materials with improved hydrogen degradation resistance 失效
    具有改善耐氢降解性的电极材料

    公开(公告)号:US06833572B2

    公开(公告)日:2004-12-21

    申请号:US10229603

    申请日:2002-08-27

    IPC分类号: H01L2976

    摘要: An electrode for use in a ferroelectric device includes a bottom electrode; a ferroelectric layer; and a top electrode formed on the ferroelectric layer and formed of a combination of metals, including a first metal take from the group of metals consisting of platinum and iridium, and a second metal taken from the group of metals consisting of aluminum and titanium; wherein the top electrode acts as a passivation layer and wherein the top electrode remains conductive following high temperature annealing in a hydrogen atmosphere. A method of forming a hydrogen-resistant electrode in a ferroelectric device includes forming a bottom electrode; forming a ferroelectric layer on the bottom electrode; depositing a top electrode on the ferroelectric layer; including depositing, simultaneously, a first metal taken from the group of metals consisting of platinum and iridium; and a second metal taken from the group of metals consisting of aluminum and titanium; and forming a passivation layer by annealing the structure in an oxygen atmosphere to form an oxide passivation layer on the top electrode.

    摘要翻译: 用于铁电体器件的电极包括底部电极; 铁电层 以及形成在强电介质层上并由金属组合形成的顶部电极,其包括从由铂和铱组成的金属组中的第一金属取得的金属和从由铝和钛组成的金属组中的第二金属; 其中所述顶部电极用作钝化层,并且其中所述顶部电极在氢气氛中的高温退火之后保持导电。 在铁电体器件中形成耐氢电极的方法包括形成底电极; 在底部电极上形成铁电层; 在铁电层上沉积顶部电极; 包括同时从由铂和铱组成的金属组中取出的第一金属; 和从由铝和钛组成的金属组中获取的第二金属; 以及通过在氧气氛中对所述结构退火以在所述顶部电极上形成氧化物钝化层来形成钝化层。

    Electrode materials with improved hydrogen degradation resistance and fabrication method
    5.
    发明授权
    Electrode materials with improved hydrogen degradation resistance and fabrication method 失效
    具有改善耐氢降解性的电极材料和制造方法

    公开(公告)号:US06440752B1

    公开(公告)日:2002-08-27

    申请号:US09817712

    申请日:2001-03-26

    IPC分类号: H01G706

    摘要: An electrode for use in a ferroelectric device includes a bottom electrode; a ferroelectric layer; and a top electrode formed on the ferroelectric layer and formed of a combination of metals, including a first metal take from the group of metals consisting of platinum and iridium, and a second metal taken from the group of metals consisting of aluminum and titanium; wherein the top electrode acts as a passivation layer and wherein the top electrode remains conductive following high temperature annealing in a hydrogen atmosphere. A method of forming a hydrogen-resistant electrode in a ferroelectric device includes forming a bottom electrode; forming a ferroelectric layer on the bottom electrode; depositing a top electrode on the ferroelectric layer; including depositing, simultaneously, a first metal taken from the group of metals consisting of platinum and iridium; and a second metal taken from the group of metals consisting of aluminum and titanium; and forming a passivation layer by annealing the structure in an oxygen atmosphere to form an oxide passivation layer on the top electrode.

    摘要翻译: 用于铁电体器件的电极包括底部电极; 铁电层; 以及形成在强电介质层上并由金属组合形成的顶部电极,其包括从由铂和铱组成的金属组中的第一金属取得的金属和从由铝和钛组成的金属组中的第二金属; 其中所述顶部电极用作钝化层,并且其中所述顶部电极在氢气氛中的高温退火之后保持导电。 在铁电体器件中形成耐氢电极的方法包括形成底电极; 在底部电极上形成铁电层; 在铁电层上沉积顶部电极; 包括同时从由铂和铱组成的金属组中取出的第一金属; 和从由铝和钛组成的金属组中获取的第二金属; 以及通过在氧气氛中对所述结构退火以在所述顶部电极上形成氧化物钝化层来形成钝化层。

    Method for forming an iridium oxide (IrOx) nanowire neural sensor array
    6.
    发明授权
    Method for forming an iridium oxide (IrOx) nanowire neural sensor array 有权
    形成氧化铱(IrOx)纳米线神经传感器阵列的方法

    公开(公告)号:US07905013B2

    公开(公告)日:2011-03-15

    申请号:US11809959

    申请日:2007-06-04

    IPC分类号: H01K3/10

    摘要: An iridium oxide (IrOx) nanowire neural sensor array and associated fabrication method are provided. The method provides a substrate with a conductive layer overlying the substrate, and a dielectric layer overlying the conductive layer. The substrate can be a material such as Si, SiO2, quartz, glass, or polyimide, and the conductive layer is a material such as ITO, SnO2, ZnO, TiO2, doped ITO, doped SnO2, doped ZnO, doped TiO2, TiN, TaN, Au, Pt, or Ir. The dielectric layer is selectively wet etched, forming contact holes with sloped walls in the dielectric layer and exposing regions of the conductive layer. IrOx nanowire neural interfaces are grown from the exposed regions of the conductive layer. The IrOx nanowire neural interfaces each have a cross-section in a range of 0.5 to 10 micrometers, and may be shaped as a circle, rectangle, or oval.

    摘要翻译: 提供氧化铱(IrOx)纳米线神经传感器阵列及相关制造方法。 该方法提供了具有覆盖在衬底上的导电层的衬底和覆盖导电层的电介质层。 基板可以是诸如Si,SiO 2,石英,玻璃或聚酰亚胺的材料,并且导电层是诸如ITO,SnO 2,ZnO,TiO 2,掺杂的ITO,掺杂的SnO 2,掺杂的ZnO,掺杂的TiO 2,TiN, TaN,Au,Pt或Ir。 电介质层被选择性地湿蚀刻,与电介质层中的倾斜壁形成接触孔并且暴露导电层的区域。 IrOx纳米线神经接口从导电层的暴露区域生长。 IrOx纳米线神经接口各自具有在0.5至10微米的范围内的横截面,并且可以被成形为圆形,矩形或椭圆形。

    IrOx Nanostructure Electrode Neural Interface Optical Device
    7.
    发明申请
    IrOx Nanostructure Electrode Neural Interface Optical Device 有权
    IrOx纳米结构电极神经界面光学器件

    公开(公告)号:US20090024182A1

    公开(公告)日:2009-01-22

    申请号:US12240501

    申请日:2008-09-29

    IPC分类号: A61N1/36

    摘要: An optical device with an iridium oxide (IrOx) electrode neural interface, and a corresponding fabrication method are provided. The method provides a substrate and forms a first conductive electrode overlying the substrate. A photovoltaic device having a first electrical interface is connected to the first electrode. A second electrical interface of the photovoltaic device is connected to a second conductive electrode formed overlying the photovoltaic device. An array of neural interface single-crystal IrOx nanostructures are formed overlying the second electrode, where x≦4. The IrOx nanostructures can be partially coated with an electrical insulator, such as SiO2, SiN, TiO2, or spin on glass (SOG), leaving the IrOx distal ends exposed. In one aspect, a buffer layer is formed overlying the second electrode surface, made from a material such as LiNbO3, LiTaO3, or SA, for the purpose of orienting the growth direction of the IrOx nanostructures.

    摘要翻译: 提供了具有氧化铱(IrOx)电极神经接口的光学器件及相应的制造方法。 该方法提供了一个衬底并且形成了覆盖衬底的第一导电电极。 具有第一电接口的光电器件连接到第一电极。 光电器件的第二电接口连接到形成在光伏器件上的第二导电电极。 形成了覆盖第二电极的神经界面单晶IrOx纳米结构阵列,其中x <= 4。 IrOx纳米结构可以部分地涂覆有电绝缘体,例如SiO 2,SiN,TiO 2或旋转玻璃(SOG),留下IrOx远端暴露。 在一个方面,为了定向IrOx纳米结构的生长方向,形成了由诸如LiNbO 3,LiTaO 3或SA的材料制成的第二电极表面上的缓冲层。

    Nanoelectrochemical cell
    8.
    发明授权

    公开(公告)号:US07446014B2

    公开(公告)日:2008-11-04

    申请号:US11580623

    申请日:2006-10-12

    IPC分类号: H01L21/20

    摘要: A method is provided for forming a NanoElectroChemical (NEC) cell. The method provides a bottom electrode with a top surface. Nanowire shells are formed. Each nanowire shell has a nanowire and a sleeve, with the nanowire connected to the bottom electrode top surface. A top electrode is formed overlying the nanowire shells. A main cavity is formed between the top electrode and bottom electrodes, partially displaced by a first plurality of nanowire shells. Electrolyte cavities are formed between the sleeves and nanowires by etching the first sacrificial layer. In one aspect, electrolyte cavities are formed between the bottom electrode top surface and a shell coating layer joining the sleeve bottom openings. Then, the main and electrolyte cavities are filled with either a liquid or gas phase electrolyte. In a different aspect, the first sacrificial layer is a solid phase electrolyte that is not etched away.

    Memory cell with buffered-layer
    9.
    发明授权
    Memory cell with buffered-layer 有权
    带缓冲层的存储单元

    公开(公告)号:US07256429B2

    公开(公告)日:2007-08-14

    申请号:US11314222

    申请日:2005-12-21

    IPC分类号: H01L21/00

    摘要: A method is provided for forming a buffered-layer memory cell. The method comprises: forming a bottom electrode; forming a colossal magnetoresistance (CMR) memory film overlying the bottom electrode; forming a memory-stable semiconductor buffer layer, typically a metal oxide, overlying the memory film; and, forming a top electrode overlying the semiconductor buffer layer. In some aspects of the method the semiconductor buffer layer is formed from YBa2Cu3O7−X (YBCO), indium oxide (In2O3), or ruthenium oxide (RuO2), having a thickness in the range of 10 to 200 nanometers (nm). The top and bottom electrodes may be TiN/Ti, Pt/TiN/Ti, In/TiN/Ti, PtRhOx compounds, or PtIrOx compounds. The CMR memory film may be a Pr1−XCaXMnO3 (PCMO) memory film, where x is in the region between 0.1 and 0.6, with a thickness in the range of 10 to 200 nm.

    摘要翻译: 提供了一种用于形成缓冲层存储单元的方法。 该方法包括:形成底部电极; 形成覆盖底部电极的巨大磁阻(CMR)记忆膜; 形成存储器稳定的半导体缓冲层,通常为覆盖存储膜的金属氧化物; 并且形成覆盖半导体缓冲层的顶部电极。 在该方法的一些方面,半导体缓冲层由YBa 2 N 3 O 7-X(YBCO),氧化铟(In 2或2 O 3)或氧化钌(RuO 2 N 2),其厚度在10-200纳米(nm)的范围内。 顶部和底部电极可以是TiN / Ti,Pt / TiN / Ti,In / TiN / Ti,PtRhOx化合物或PtIrOx化合物。 CMR存储器膜可以是Pr 1-X C x MnO 3(PCMO)存储膜,其中x在0.1之间的区域 和0.6,厚度在10至200nm的范围内。