公开(公告)号：US20120256322A1

公开(公告)日：2012-10-11

申请号：US13495861

申请日：2012-06-13

申请人： Fumito Itou ,  Hiroshige Hirano ,  Yukitoshi Ota

发明人： Fumito Itou ,  Hiroshige Hirano ,  Yukitoshi Ota

IPC分类号： H01L25/07

CPC分类号： H01L25/18 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/00

摘要： A semiconductor device includes a first semiconductor chip provided with a first semiconductor element including a plurality of element electrodes; and a first substrate having an element mounting surface on which the first semiconductor chip is mounted. The first substrate includes a plurality of first electrodes, each formed on the element mounting surface; a plurality of first interconnects connected to the first electrodes; a plurality of second electrodes formed on a surface opposite to the element mounting surface; a plurality of second interconnects connected to the second electrodes; a plurality of through-hole interconnects penetrating the first substrate and connecting the first interconnects to the second interconnects; and a third semiconductor element. The first side of the first substrate is shorter than the first side of the first semiconductor chip.

摘要翻译： 半导体器件包括：第一半导体芯片，设置有包括多个元件电极的第一半导体元件; 以及具有安装有第一半导体芯片的元件安装面的第一基板。 第一基板包括多个第一电极，每个第一电极形成在元件安装表面上; 连接到所述第一电极的多个第一互连; 多个第二电极，形成在与元件安装表面相对的表面上; 连接到第二电极的多个第二互连; 穿过所述第一基板并将所述第一互连件连接到所述第二互连件的多个通孔互连件; 和第三半导体元件。 第一衬底的第一侧比第一半导体芯片的第一侧短。

公开(公告)号：US08421233B2

公开(公告)日：2013-04-16

申请号：US12753628

申请日：2010-04-02

申请人： Chikako Chida ,  Fumito Itou ,  Hiroshige Hirano

发明人： Chikako Chida ,  Fumito Itou ,  Hiroshige Hirano

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2924/00012

摘要： A semiconductor device includes a lower-layer wire, an upper-layer wire including a wire portion and a first wide portion whose wire width is greater than the wire portion, and a contact formation portion in which a contact portion for connecting the lower-layer wire and the first wide portion with each other is provided. The contact formation portion has a planar shape of which a length L1 in a direction parallel to a wire width direction of the first wide portion is greater than a length L2 in a direction parallel to a wire length direction of the first wide portion.

摘要翻译： 半导体器件包括下层布线，包括导线部分的上层布线和布线宽度大于布线部分的第一宽部分;以及接触形成部分，其中用于连接下层布线的接触部分 并且提供彼此的第一宽的部分。 接触形成部具有与第一宽部的线宽度方向平行的方向的长度L1大于平行于第一宽部的线长度方向的长度L2的平面形状。

公开(公告)号：US20100289151A1

公开(公告)日：2010-11-18

申请号：US12753628

申请日：2010-04-02

申请人： Chikako CHIDA ,  Fumito Itou ,  Hiroshige Hirano

发明人： Chikako CHIDA ,  Fumito Itou ,  Hiroshige Hirano

IPC分类号： H01L23/522

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2924/00012

摘要： A semiconductor device includes a lower-layer wire, an upper-layer wire including a wire portion and a first wide portion whose wire width is greater than the wire portion, and a contact formation portion in which a contact portion for connecting the lower-layer wire and the first wide portion with each other is provided. The contact formation portion has a planar shape of which a length L1 in a direction parallel to a wire width direction of the first wide portion is greater than a length L2 in a direction parallel to a wire length direction of the first wide portion.

摘要翻译： 半导体器件包括下层布线，包括导线部分的上层布线和布线宽度大于布线部分的第一宽部分;以及接触形成部分，其中用于连接下层布线的接触部分 并且提供彼此的第一宽的部分。 接触形成部具有与第一宽部的线宽度方向平行的方向的长度L1大于平行于第一宽部的线长度方向的长度L2的平面形状。

公开(公告)号：US20050003580A1

公开(公告)日：2005-01-06

申请号：US10881044

申请日：2004-06-30

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

IPC分类号： H01L25/18 ,  H01L21/60 ,  H01L23/31 ,  H01L25/065 ,  H01L25/07 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip. Thereby, influences of the fillet made of the adhesive are suppressed, allowing miniaturization of the device and improvement in the mass-productivity.

摘要翻译： 一种堆叠式芯片半导体器件，包括：具有电极焊盘的衬底; 第一半导体芯片，其经由第一粘合剂层倒装芯片封装在所述基板上; 第二半导体芯片，其安装在所述第一半导体芯片的上部并且具有电极焊盘; 用于电连接第二半导体芯片的电极焊盘和基板的电极焊盘的导线; 以及用于封装第一半导体芯片，第二半导体芯片和电线的模制树脂，第一粘合剂层在第一半导体芯片的周围形成圆角。 第一半导体芯片以其中心轴偏离基板的中心轴线的方式设置，偏移被设置成使得第一半导体芯片朝向与圆角的边缘的最大长度相反的一侧偏移 第一个半导体芯片。 由此，抑制了由粘合剂制成的圆角的影响，从而使装置小型化并提高了批量生产率。

公开(公告)号：US07138706B2

公开(公告)日：2006-11-21

申请号：US10608295

申请日：2003-06-24

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Yoshiaki Takeoka ,  Fumito Itou ,  Kouichi Yamauchi ,  Yasutake Yaguchi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Yoshiaki Takeoka ,  Fumito Itou ,  Kouichi Yamauchi ,  Yasutake Yaguchi

IPC分类号： H01L21/44

CPC分类号： H01L21/565 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/731 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2224/0401

摘要： A semiconductor device with excellent heat dissipation characteristics that can achieve a high reliability when mounted in electronic equipment such as a cellular phone or the like and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of semiconductor chips mounted on the substrate by stacking one on top of another, and an encapsulation resin layer made of encapsulation resin. Among the plurality of semiconductor chips, a first semiconductor chip as an uppermost semiconductor chip is mounted with a surface thereof on which a circuit is formed facing toward the substrate, and the encapsulation resin layer is formed so that at least a surface of the first semiconductor chip opposite to the surface on which the circuit is formed and a part of side surfaces of the first semiconductor chip are exposed to the outside of the encapsulation resin layer.

摘要翻译： 提供具有优异的散热特性的半导体器件，其在安装在诸如蜂窝电话等的电子设备中时可以实现高可靠性及其制造方法。 半导体器件包括基板，通过在其上顶层叠一个而安装在基板上的多个半导体芯片以及由密封树脂制成的封装树脂层。 在多个半导体芯片中，作为最上半导体芯片的第一半导体芯片的表面安装有面向基板的电路，并且形成密封树脂层，使得至少第一半导体 芯片与形成电路的表面相对，并且第一半导体芯片的一部分侧表面暴露于封装树脂层的外部。

公开(公告)号：US20060091563A1

公开(公告)日：2006-05-04

申请号：US11282726

申请日：2005-11-21

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Yoshiaki Takeoka ,  Fumito Itou ,  Yasutake Yaguchi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Yoshiaki Takeoka ,  Fumito Itou ,  Yasutake Yaguchi

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L21/563 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/85399 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a substrate having electrode pads, a first semiconductor chip mounted on the substrate with a first adhesion layer interposed therebetween, a second semiconductor chip mounted on the first semiconductor chip with a second adhesion layer interposed therebetween and having electrode pads on the upper surface thereof, wires for bonding the electrode pads of the substrate and the electrode pads of the second semiconductor chip to each other, and a mold resin sealing therein the first and second semiconductor chips and the wires. The peripheral edge portion of the first adhesion layer is protruding outwardly from the first semiconductor chip and the peripheral edge portion of the second semiconductor chip is protruding outwardly beyond the peripheral edge portion of the first semiconductor chip.

公开(公告)号：US07521288B2

公开(公告)日：2009-04-21

申请号：US11717953

申请日：2007-03-14

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip. Thereby, influences of the fillet made of the adhesive are suppressed, allowing miniaturization of the device and improvement in the mass-productivity.

摘要翻译： 一种堆叠式芯片半导体器件，包括：具有电极焊盘的衬底; 第一半导体芯片，其经由第一粘合剂层倒装芯片封装在所述基板上; 第二半导体芯片，其安装在所述第一半导体芯片的上部并且具有电极焊盘; 用于电连接第二半导体芯片的电极焊盘和基板的电极焊盘的导线; 以及用于封装第一半导体芯片，第二半导体芯片和电线的模制树脂，第一粘合剂层在第一半导体芯片的周围形成圆角。 第一半导体芯片以其中心轴偏离基板的中心轴线的方式设置，偏移被设置成使得第一半导体芯片朝向与圆角的边缘的最大长度相反的一侧偏移 第一个半导体芯片。 由此，抑制了由粘合剂制成的圆角的影响，从而使装置小型化并提高了批量生产率。

公开(公告)号：US07298045B2

公开(公告)日：2007-11-20

申请号：US10995140

申请日：2004-11-24

申请人： Hisaki Fujitani ,  Fumito Itou ,  Toshitaka Akahoshi ,  Toshiyuki Fukuda

发明人： Hisaki Fujitani ,  Fumito Itou ,  Toshitaka Akahoshi ,  Toshiyuki Fukuda

IPC分类号： H01L23/34

CPC分类号： H01L24/97 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1515 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/92247 ,  H01L2224/05599

摘要： A first semiconductor element and second semiconductor element are bonded via die-bonding material. A first electrode of the first semiconductor element and a third electrode are joined, by means of flip-chip bonding, to a semiconductor carrier that has the third electrode on the one face of the semiconductor carrier and a fourth electrode on the perimeter of the other face of the semiconductor carrier. The bonding pad of the second semiconductor element and the fourth electrode of the semiconductor carrier are connected via fine metal wire by means of wire bonding. The periphery of the first semiconductor element and the wiring portion of the fine metal wire are filled with insulating sealing resin between the semiconductor carrier and second semiconductor element and the sealing fill region for the sealing resin is formed substantially the same as the external dimensions of the second semiconductor element.

摘要翻译： 第一半导体元件和第二半导体元件通过芯片接合材料接合。 第一半导体元件的第一电极和第三电极通过倒装芯片接合连接到半导体载体，半导体载体在半导体载体的一个面上具有第三电极，在另一个半导体周边的周边连接第四电极 半导体载体的面。 第二半导体元件的焊盘和半导体载体的第四电极通过引线接合通过细金属线连接。 第一半导体元件的周边和细金属线的布线部分在半导体载体和第二半导体元件之间填充有绝缘密封树脂，并且用于密封树脂的密封填充区域形成为基本上与外部尺寸相同 第二半导体元件。

公开(公告)号：US07239021B2

公开(公告)日：2007-07-03

申请号：US10881044

申请日：2004-06-30

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip. Thereby, influences of the fillet made of the adhesive are suppressed, allowing miniaturization of the device and improvement in the mass-productivity.

公开(公告)号：US20070096291A1

公开(公告)日：2007-05-03

申请号：US11475174

申请日：2006-06-27

申请人： Takeshi Kawabata ,  Fumito Itou

发明人： Takeshi Kawabata ,  Fumito Itou

IPC分类号： H01L23/12

CPC分类号： H01L25/105 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： A lower module of a stacked semiconductor device includes a first substrate and a first semiconductor chip held above the first substrate. The top surface of the first substrate is provided with a plurality of first chip connection terminals electrically connected to the first chip terminals, respectively, and a plurality of upper module connection terminals electrically connectable to an upper module provided with a second semiconductor chip. The back surface of the first substrate is provided with a plurality of external substrate connection terminals. Each of the first chip connection terminals is electrically connected to a corresponding one of the external substrate connection terminals, and each of the upper module connection terminals is electrically connected between a corresponding one of the chip connection terminals and a corresponding one of the external substrate connection terminals.

摘要翻译： 叠层半导体器件的下模块包括第一衬底和保持在第一衬底上的第一半导体芯片。 第一基板的顶表面分别设置有电连接到第一芯片端子的多个第一芯片连接端子和多个上模块连接端子，电连接到具有第二半导体芯片的上模块。 第一基板的背面设置有多个外部基板连接端子。 每个第一芯片连接端子电连接到对应的一个外部基板连接端子，并且每个上部模块连接端子电连接在相应的一个芯片连接端子与相应的一个外部基板连接 终端。