Method of preparing a substrate surface for conformal plating
    5.
    发明授权
    Method of preparing a substrate surface for conformal plating 失效
    制备用于保形电镀的基板表面的方法

    公开(公告)号:US5922517A

    公开(公告)日:1999-07-13

    申请号:US662165

    申请日:1996-06-12

    CPC分类号: H05K3/184 G03F7/095

    摘要: Bridging between electrically conductive circuit features during conformal plating is prevented by avoiding the deposition of catalytic seed material onto non-circuit areas of the substrate. Preparatory to forming electrical circuit features on a nonconductive substrate by the full additive process, extraneous seed material is either trapped between two layers of a photoimageable film, whereby it is unavailable during plating, or deposited on the surface of an aqueous photoimageable film, which is removed prior to plating. The method embodying the present invention eliminates the need for seed removal after initial plating and prior to conformal plating of a precious metal over the initial plating.

    摘要翻译: 通过避免催化种子材料沉积到衬底的非电路区域上,防止了在保形电镀过程中导电电路特征之间的桥接。 准备通过完全添加的方法在非导电基材上形成电路特征,外来种子材料被捕获在两层可光成像膜之间,由此在电镀期间不可用,或者沉积在水性可光成像膜的表面上, 在电镀之前移除。 实施本发明的方法消除了在初始镀覆之后以及在初始镀覆之前对贵金属进行适形电镀之前的种子去除的需要。

    Circuitized structures produced by the methods of electroless plating
    8.
    发明授权
    Circuitized structures produced by the methods of electroless plating 失效
    通过无电镀方法生产的电路结构

    公开(公告)号:US06680440B1

    公开(公告)日:2004-01-20

    申请号:US09027856

    申请日:1998-02-23

    IPC分类号: H05K116

    摘要: The present invention provides new methods for electroless plating of metal particularly gold and copper onto substrates, such as circuitized substrates, which reduces processing steps, reduces metal consumption, and reduces the scraping of parts due to contamination. The method employs a permanent plating resist. The method for electrolessly plating metal onto a substrate, including the following steps: providing: an uncured, photoimagable, dielectric permanent plating resist comprising: from about 10 to 80% of phenoxy polyol resin which is the condensation product of epichlorohydrin and bisphenol A, having a molecular weight of from about 40,000 to 130,000; from about 20 to 90% of an epoxidized multifunctional bisphenol A formaldehyde novolac resin having a molecular weight of from about 4,000 to 10,000; from 0 to 50% of a diglycidyl ether of bisphenol A having a molecular weight of from about 600 to 2,500; and from about 0.1 to 15 parts by weight of the total resin weight, a cationic photoinitiator; applying the permanent plating resist on the substrate; photopatterning the permanent plating resist to form apertures therein which expose areas of the substrate; and electrolessly plating metal onto the exposed areas of the substrate. The permanent plating resist is useful to protect the substrate areas including for example metallized features on the substrate, from the electroless deposition of metal during electroless plating; thus selective plating of metal is achieved. The permanent plating resist is not degraded by conventional gold or copper electroless baths. The invention also relates to circuitized structures produced by the methods of electroless plating.

    摘要翻译: 本发明提供了金属特别是金和铜在电路化基板等基板上进行化学镀的新方法,其减少了加工步骤,降低了金属消耗,并减少了由于污染引起的部件刮擦。 该方法采用永久电镀抗蚀剂。 将金属无电镀在基板上的方法,包括以下步骤:提供:未固化的,可光成像的绝缘永久电镀抗蚀剂,其包含:约10至80%的作为表氯醇和双酚A的缩合产物的苯氧基多元醇树脂,其具有 分子量为约40,000至130,000; 约20至90%的分子量为约4,000至10,000的环氧化多官能双酚A甲醛酚醛清漆树脂; 0至50%的分子量为约600至2,500的双酚A的二缩水甘油醚; 和约0.1至15重量份的总树脂重量,阳离子光引发剂; 在基板上施加永久电镀抗蚀剂; 对永久电镀抗蚀剂进行光图案化以在其中形成露出基板的区域的孔; 并将金属化学镀在衬底的暴露区域上。 永久电镀抗蚀剂可用于保护衬底区域,包括例如基板上的金属化特征,在化学镀期间的金属化学沉积; 从而实现了金属的选择性镀覆。 永久电镀抗蚀剂不会被常规的金或铜无电镀浴降解。 本发明还涉及通过化学镀方法制造的电路结构。

    Method of producing fine-line circuit boards using chemical polishing
    10.
    发明授权
    Method of producing fine-line circuit boards using chemical polishing 失效
    使用化学抛光生产细线电路板的方法

    公开(公告)号:US06547974B1

    公开(公告)日:2003-04-15

    申请号:US08495277

    申请日:1995-06-27

    IPC分类号: H01B1300

    摘要: A printed circuit board is produced by patterning a resist layer according to a circuit mask that defines desired circuit paths. The resist pattern layer is formed by removing the resist from the board in the desired circuit paths and a conductive material is plated onto the board in the resist voids defined by the circuit mask so that the height of the conductive material relative to the substrate equals or exceeds the height of the resist layer relative to the substrate. A low-reactive solution is applied over the conductive material and removes a surface portion of the conductive material. As the solution removes the conductive layer, it forms a film barrier and the solution composition changes, both of which substantially inhibits any further removal of the conductive material. Next, the film barrier is removed from the board allowing another film barrier to form stimulating the removal of further conductive material. The removal step is repeated until the conductive material is at a desired height relative to the height of the resist layer. The board is then finished using conventional circuit board fabrication techniques.

    摘要翻译: 通过根据限定所需电路路径的电路掩模图案化抗蚀剂层来制造印刷电路板。 抗蚀剂图案层通过在所需的电路路径中从基板上去除抗蚀剂而形成,并且导电材料被电镀在由电路掩模限定的抗蚀剂空隙中的基板上,使得导电材料相对于基板的高度等于或等于 超过抗蚀剂层相对于基底的高度。 将低反应性溶液施加在导电材料上并除去导电材料的表面部分。 当溶液去除导电层时,其形成膜阻挡层并且溶液组成发生变化,这两者基本上禁止任何进一步去除导电材料。 接下来,从板上去除膜屏障,允许另一个膜屏障形成刺激去除另外的导电材料。 重复去除步骤,直到导电材料相对于抗蚀剂层的高度处于期望的高度。 然后使用常规电路板制造技术完成电路板。