Method of preparing a substrate surface for conformal plating
    2.
    发明授权
    Method of preparing a substrate surface for conformal plating 失效
    制备用于保形电镀的基板表面的方法

    公开(公告)号:US5922517A

    公开(公告)日:1999-07-13

    申请号:US662165

    申请日:1996-06-12

    CPC分类号: H05K3/184 G03F7/095

    摘要: Bridging between electrically conductive circuit features during conformal plating is prevented by avoiding the deposition of catalytic seed material onto non-circuit areas of the substrate. Preparatory to forming electrical circuit features on a nonconductive substrate by the full additive process, extraneous seed material is either trapped between two layers of a photoimageable film, whereby it is unavailable during plating, or deposited on the surface of an aqueous photoimageable film, which is removed prior to plating. The method embodying the present invention eliminates the need for seed removal after initial plating and prior to conformal plating of a precious metal over the initial plating.

    摘要翻译: 通过避免催化种子材料沉积到衬底的非电路区域上,防止了在保形电镀过程中导电电路特征之间的桥接。 准备通过完全添加的方法在非导电基材上形成电路特征,外来种子材料被捕获在两层可光成像膜之间,由此在电镀期间不可用,或者沉积在水性可光成像膜的表面上, 在电镀之前移除。 实施本发明的方法消除了在初始镀覆之后以及在初始镀覆之前对贵金属进行适形电镀之前的种子去除的需要。

    Manufacturing computer systems with fine line circuitized substrates

    公开(公告)号:US06436803B1

    公开(公告)日:2002-08-20

    申请号:US09840432

    申请日:2001-04-23

    IPC分类号: H01L2144

    摘要: Circuit boards are manufactured by forming a substrate with a dielectric surface and laminating a metal foil onto the substrate. The metal foil is patterned to form a first wiring layer. A permanent photoimagable dielectric layer is formed over the wiring layer and via holes are formed through the dielectric layer over pads and conductors of the wiring layer. Holes are formed through the substrate and substrate surfaces including the photoimagable dielectric, walls of the via holes, and walls of the through holes subjected to an electroless copper plating process. The process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactant is regulated by determining the surface tension and metering surfactant addition to the second solution depending on the determination of surface tension. The copper plating on the photoimagable dielectric is patterned to form an exterior wiring layer which is covered by solder resist with windows over lands around the through holes and surface mount connection pads of the exterior wiring layer to form a high density circuitized substrate. Surface mount components and/or pin in hole components are attached to the circuitized substrate with solder joints between terminals of the components and the lands and/or connection pads to form a high density circuit board assembly. One or more of the circuit board assemblies are mounted in an enclosure with a power supply, CPU, RAM, and I/O means to form an information handling system with increased performance due to shorter signal flight times due to the higher device density.