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    Method for reducing coefficient of thermal expansion in chip attach packages
    9.
    发明授权
    Method for reducing coefficient of thermal expansion in chip attach packages 失效
    降低芯片连接封装热膨胀系数的方法

    公开(公告)号：US6136733A

    公开(公告)日：2000-10-24

    申请号：US874902

    申请日：1997-06-13

    申请人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

    发明人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

    IPC分类号： B32B5/28 ,  H05K1/03 ,  B32B5/26 ,  C09J5/02

    CPC分类号： B32B5/28 ,  H05K1/036 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/0293 ,  H05K2201/068 ,  Y10T29/4913

    摘要： A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat. Optionally, the reduced CTE laminate is sandwiched between two layers of metal, preferably copper.

    摘要翻译： 提供了一种简单，便宜，可钻，减少的CTE层压板和包括减小的CTE层压板的电路结构。 减少的CTE层压材料包括：约40％至75％，优选约55％至65％的树脂; 约0.05％至0.3％，优选约0.08％至0.10％的固化剂; 约25％至60％，优选约30％至40％的织布; 约1％至15％，优选约5％至10％体积的无纺石英垫。 本发明还通常涉及一种用于减小电路化结构的CTE的方法，以及用于制造减少的CTE层压体和包括减少的CTE层压体的电路化结构的方法。 制造减薄的CTE层压板和层压结构的方法包括以下步骤：提供无纺石英垫; 提供预浸料，优选B阶固化至不超过完全固化的约40％，优选不超过30％; 将无纺石英垫夹在两层预浸料之间，并将预浸料坯的树脂回流到石英垫中。 任选地，还原的CTE层压体夹在两层金属之间，优选为铜。