公开(公告)号：US09474158B2

公开(公告)日：2016-10-18

申请号：US14329453

申请日：2014-07-11

Applicant: IBIDEN CO., LTD.

Inventor： Toshiki Furutani ,  Takeshi Furusawa ,  Keisuke Shimizu ,  Yuichi Nakamura

IPC: H05K1/18 ,  H05K3/46 ,  H01L23/00 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/34 ,  H01L21/56

CPC classification number: H05K1/185 ,  H01L21/568 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/18162 ,  H01L2924/19105 ,  H05K1/0203 ,  H05K1/113 ,  H05K3/0097 ,  H05K3/3489 ,  H05K3/4602 ,  H05K3/4673 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2203/1536 ,  H05K2203/308 ,  H01L2224/19

Abstract: A wiring board includes a first resin insulation layer, an electronic component positioned on first surface of the first insulation layer, a second resin insulation layer formed on the first surface of the first insulation layer such that the second insulation layer is embedding the electronic component, a conductive layer formed on the second insulation layer, a third resin insulation layer formed on the conductive layer and second insulation layer, and a connection via conductor formed in the second insulation layer such that the connection via conductor is connecting electrode of the electronic component and conductive layer on the second insulation layer. The first insulation layer has a pad structure on second surface side of the first insulation layer on opposite side of the first surface, and the first insulation layer has coefficient of thermal expansion set lower than coefficients of thermal expansion of the second and third insulation layers.

Abstract translation: 布线板包括第一树脂绝缘层，位于第一绝缘层的第一表面上的电子部件，形成在第一绝缘层的第一表面上的第二树脂绝缘层，使得第二绝缘层嵌入电子部件， 形成在第二绝缘层上的导电层，形成在导电层和第二绝缘层上的第三树脂绝缘层和形成在第二绝缘层中的连接通孔导体，使得连接通孔导体是电子部件的连接电极和 第二绝缘层上的导电层。 第一绝缘层在第一绝缘层的与第一表面相对的第二表面侧具有衬垫结构，第一绝缘层的热膨胀系数设定为低于第二绝缘层和第三绝缘层的热膨胀系数。

公开(公告)号：US12169312B2

公开(公告)日：2024-12-17

申请号：US17752936

申请日：2022-05-25

Applicant: IBIDEN CO., LTD.

Inventor： Keisuke Shimizu ,  Tomoyuki Ikeda

IPC: G02B6/42

Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on the printed wiring board, a connector mounted on the printed wiring board, an optical element that is accommodated inside the printed wiring board and converts an optical signal to an electrical signal and/or the electrical signal to the optical signal, an optical waveguide formed between the optical element inside the printed wiring board and the connector on the printed wiring board such that the optical waveguide optically connects the optical element and the connector, and an electrical path formed between the optical element and the logic IC such that the electrical path connects the logic IC and the optical element and that a length of the electrical path is 1 mm or less.

公开(公告)号：US08952507B2

公开(公告)日：2015-02-10

申请号：US13963246

申请日：2013-08-09

Applicant: Ibiden Co., Ltd.

Inventor： Toyotaka Shimabe ,  Keisuke Shimizu ,  Toshiki Furutani

IPC: H01L23/00 ,  H05K1/18 ,  H01L23/495 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC classification number: H05K1/183 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49589 ,  H01L23/49822 ,  H01L24/80 ,  H01L2924/12042 ,  H05K1/18 ,  H05K1/185 ,  H05K3/007 ,  H05K3/4602 ,  H05K2203/0156 ,  H01L2924/00

Abstract: A wiring board includes a substrate having a cavity, and an electronic component accommodated in the cavity of the substrate. The substrate has a thickness which is greater than a thickness of the electronic component such that a ratio of the thickness of the substrate to the thickness of the electronic component is set in a range of 0.3 or greater and 0.7 or less.

Abstract translation: 布线板包括具有空腔的基板和容纳在基板的空腔中的电子部件。 基板的厚度大于电子部件的厚度，使得基板的厚度与电子部件的厚度的比率设定在0.3以上且0.7以下的范围内。

公开(公告)号：US10186486B2

公开(公告)日：2019-01-22

申请号：US15661177

申请日：2017-07-27

Applicant: IBIDEN CO., LTD.

Inventor： Hajime Sakamoto ,  Keisuke Shimizu

IPC: H01L23/52 ,  H01L23/28 ,  H01L23/538 ,  H01L21/48 ,  H01L23/498

Abstract: A wiring board includes conductor layers, core layers including a first core layer and a second core layer formed such that each of the first and second core layers includes a core material, an intermediate insulating layer formed between the first core layer and second core layer such that the intermediate insulating layer does not contain a core material, and an electronic component positioned between the first core layer and second core layer such that the electronic component is embedded in the intermediate insulating layer. At least one of the first and second core layers has a multilayer structure including a resin layer and an adhesive layer laminated on the resin layer such that the resin layer includes the core material and that the adhesive layer does not contain a core material, and the conductor layers include a conductor layer laminated on the adhesive layer of the multilayer structure.

公开(公告)号：US10090238B2

公开(公告)日：2018-10-02

申请号：US15451520

申请日：2017-03-07

Applicant: IBIDEN CO., LTD.

Inventor： Hajime Sakamoto ,  Keisuke Shimizu

IPC: H01L23/522 ,  H01L23/48 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/482 ,  H01L23/485 ,  H01L23/538 ,  H01L21/683

Abstract: A wiring substrate includes insulating layers including a first insulating layer and an outermost insulating layer such that the first insulating layer is positioned at one end of the insulating layers in a lamination direction and that the outermost insulating layer is positioned at the opposite end of the insulating layers in the lamination direction and includes a reinforcing material; conductive layers laminated on the insulating layers such that the conductive layers include an outermost conductive layer formed on the outermost insulating layer and including pads, and a semiconductor element accommodated in an accommodating portion of the first insulating layer. The insulating layers are formed such that the insulating layers do not contain a reinforcing material other than the outermost insulating layer.

公开(公告)号：US09832878B2

公开(公告)日：2017-11-28

申请号：US14819579

申请日：2015-08-06

Applicant: IBIDEN CO., LTD.

Inventor： Keisuke Shimizu ,  Makoto Terui ,  Ryojiro Tominaga ,  Yuichi Nakamura

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/46 ,  H05K1/02 ,  H05K3/42

CPC classification number: H05K1/185 ,  H05K1/0224 ,  H05K3/305 ,  H05K3/429 ,  H05K3/4694 ,  H05K2201/09536 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/2072

Abstract: A wiring board with a cavity for a built-in electronic component includes a conductor layer including a conductor circuit layer and a plane layer, and an insulating layer laminated on the conductor layer and having a cavity such that the cavity is forming an exposed portion of the plane layer and formed to mount a built-in electronic component on the exposed portion of the plane layer. The plane layer has a recess structure formed in an outer peripheral portion in the exposed portion of the plane layer.

公开(公告)号：US09723728B2

公开(公告)日：2017-08-01

申请号：US14817388

申请日：2015-08-04

Applicant: IBIDEN CO., LTD.

Inventor： Keisuke Shimizu ,  Makoto Terui ,  Ryojiro Tominaga ,  Keigo Kamoshita ,  Tsutomu Yamauchi

IPC: H05K3/46 ,  H05K3/40 ,  H05K1/18 ,  H05K3/42

CPC classification number: H05K3/4697 ,  H05K1/186 ,  H05K3/4007 ,  H05K3/429 ,  H05K3/4644 ,  H05K2201/096

Abstract: A wiring board with a built-in electronic component includes a substrate having a cavity, an electronic component accommodated in the cavity, a conductive layer formed on the substrate and extending over the electronic component in the cavity, and a solder-resist layer formed on the conductive layer and having first and second openings such that the first openings are forming first pads including the conductive layer exposed by the first openings and that the second openings are forming second pads including the conductive layer exposed by the second openings. The second pads include portions of the conductive layer formed directly over the electronic component, respectively, and connected to the electronic component, the first pads include portions of the conductive layer formed on outer side with respect to the electronic component, respectively, and each second opening has an opening diameter which is formed smaller than an opening diameter of each first opening.

公开(公告)号：US12189193B2

公开(公告)日：2025-01-07

申请号：US17821534

申请日：2022-08-23

Applicant: IBIDEN CO., LTD.

Inventor： Keisuke Shimizu ,  Tomoyuki Ikeda

IPC: G02B6/42 ,  H01L25/16

Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on a first surface of the board, a connector mounted on a second surface of the board on the opposite side with respect to the first surface, an optical element that converts an optical signal and an electrical signal and positioned on the opposite side with respect to the first surface such that the optical element is at least partially embedded in the board, a path that is formed in the board and electrically connects the logic IC on the first surface and the optical element on the opposite side with respect to the first surface, and an optical waveguide that is embedded on the opposite side with respect to the first surface and optically connects the connector on the second surface and the optical element on the opposite side with respect to the first surface.

公开(公告)号：US20170256478A1

公开(公告)日：2017-09-07

申请号：US15451520

申请日：2017-03-07

Applicant: IBIDEN CO., LTD.

Inventor： Hajime Sakamoto ,  Keisuke Shimizu

IPC: H01L23/482 ,  H01L23/538 ,  H01L21/56 ,  H01L23/485 ,  H01L21/48

CPC classification number: H01L23/522 ,  H01L21/4857 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/48 ,  H01L23/4827 ,  H01L23/485 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/76 ,  H01L24/82 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01L2924/18162

Abstract: A wiring substrate includes insulating layers including a first insulating layer and an outermost insulating layer such that the first insulating layer is positioned at one end of the insulating layers in a lamination direction and that the outermost insulating layer is positioned at the opposite end of the insulating layers in the lamination direction and includes a reinforcing material; conductive layers laminated on the insulating layers such that the conductive layers include an outermost conductive layer formed on the outermost insulating layer and including pads, and a semiconductor element accommodated in an accommodating portion of the first insulating layer. The insulating layers are formed such that the insulating layers do not contain a reinforcing material other than the outermost insulating layer.

公开(公告)号：US09391044B2

公开(公告)日：2016-07-12

申请号：US14446475

申请日：2014-07-30

Applicant: IBIDEN CO., LTD.

Inventor： Keisuke Shimizu ,  Yuichi Nakamura ,  Tsuyoshi Yamaguchi

IPC: H05K1/09 ,  H01L23/00 ,  H05K1/18 ,  H05K3/46 ,  H05K3/00

CPC classification number: H01L24/83 ,  H01L2224/04105 ,  H01L2224/16235 ,  H01L2224/19 ,  H01L2224/27464 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K1/187 ,  H05K3/0097 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2203/0156 ,  H05K2203/1536 ,  Y10T29/302 ,  H01L2924/00 ,  H01L2224/83005

Abstract: A printed wiring board includes a first insulation layer, an electronic component built into the first insulation layer, a second insulation layer having a via conductor and formed on a first surface of the first insulation layer, and a conductive film formed on the first insulation layer on the opposite side with respect to the first surface of the first insulation layer such that the conductive film is positioned to face a back surface of the electronic component. The first insulation layer has a coefficient of thermal expansion which is set higher than a coefficient of thermal expansion of the second insulation layer.

Abstract translation: 印刷布线板包括第一绝缘层，内置在第一绝缘层中的电子部件，具有通孔导体并形成在第一绝缘层的第一表面上的第二绝缘层和形成在第一绝缘层上的导电膜 在相对于第一绝缘层的第一表面的相对侧上，使得导电膜定位成面对电子部件的后表面。 第一绝缘层具有设定为高于第二绝缘层的热膨胀系数的热膨胀系数。