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公开(公告)号:US20220365729A1
公开(公告)日:2022-11-17
申请号:US17874237
申请日:2022-07-26
Applicant: Intel Corporation
Inventor: Gang CAO , Ziye YANG , Xiaodong LIU , Changpeng LIU
Abstract: An apparatus is described. The apparatus includes an accelerator to be coupled to a memory region that the accelerator shares with a virtualization environment comprising a guest OS, a guest VM and an SSD device driver. The accelerator is to forward a submission queue doorbell setting made by the SSD device driver in the shared memory to a corresponding submission queue doorbell in an SSD controller.
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公开(公告)号:US20210232528A1
公开(公告)日:2021-07-29
申请号:US17208744
申请日:2021-03-22
Applicant: Intel Corporation
Inventor: Patrick G. KUTCH , Andrey CHILIKIN , Jin YU , Cunming LIANG , Changpeng LIU , Ziye YANG , Gang CAO , Xiaodong LIU , Zhiguo WEN , Zhihua CHEN
Abstract: Examples described herein relate to an apparatus comprising: a descriptor format translator accessible to a driver. In some examples, the driver and descriptor format translator share access to transmit and receive descriptors. In some examples, based on a format of a descriptor associated with a device differing from a second format of descriptor associated with the driver, the descriptor format translator is to: perform a translation of the descriptor from the format to the second format and store the translated descriptor in the second format for access by the device. In some examples, the device is to access the translated descriptor; the device is to modify content of the translated descriptor to identify at least one work request; and the descriptor format translator is to translate the modified translated descriptor into the format and store the translated modified translated descriptor for access by the driver.
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公开(公告)号:US20190196824A1
公开(公告)日:2019-06-27
申请号:US16311231
申请日:2016-12-31
Applicant: INTEL CORPORATION
Inventor: Xiaodong LIU , Qihua DAI , Weigang LI , Vinodh GOPAL
CPC classification number: H04Q11/0005 , B25J15/0014 , B65G1/0492 , G02B6/3882 , G02B6/3893 , G02B6/3897 , G02B6/4292 , G02B6/4452 , G05D23/1921 , G05D23/2039 , G06F1/183 , G06F3/061 , G06F3/0611 , G06F3/0613 , G06F3/0616 , G06F3/0619 , G06F3/0625 , G06F3/0631 , G06F3/0638 , G06F3/064 , G06F3/0647 , G06F3/0653 , G06F3/0655 , G06F3/0658 , G06F3/0659 , G06F3/0664 , G06F3/0665 , G06F3/067 , G06F3/0673 , G06F3/0679 , G06F3/0683 , G06F3/0688 , G06F3/0689 , G06F8/65 , G06F9/30036 , G06F9/3887 , G06F9/4401 , G06F9/5016 , G06F9/5044 , G06F9/505 , G06F9/5072 , G06F9/5077 , G06F9/544 , G06F11/141 , G06F11/3414 , G06F12/0862 , G06F12/0893 , G06F12/10 , G06F12/109 , G06F12/1408 , G06F13/161 , G06F13/1668 , G06F13/1694 , G06F13/4022 , G06F13/4068 , G06F13/409 , G06F13/42 , G06F13/4282 , G06F15/8061 , G06F16/9014 , G06F2209/5019 , G06F2209/5022 , G06F2212/1008 , G06F2212/1024 , G06F2212/1041 , G06F2212/1044 , G06F2212/152 , G06F2212/202 , G06F2212/401 , G06F2212/402 , G06F2212/7207 , G06Q10/06 , G06Q10/06314 , G06Q10/087 , G06Q10/20 , G06Q50/04 , G07C5/008 , G08C17/02 , G08C2200/00 , G11C5/02 , G11C5/06 , G11C7/1072 , G11C11/56 , G11C14/0009 , H03M7/30 , H03M7/3084 , H03M7/3086 , H03M7/40 , H03M7/4031 , H03M7/4056 , H03M7/4081 , H03M7/6005 , H03M7/6023 , H04B10/25 , H04B10/2504 , H04L9/0643 , H04L9/14 , H04L9/3247 , H04L9/3263 , H04L12/2809 , H04L29/12009 , H04L41/024 , H04L41/046 , H04L41/0813 , H04L41/082 , H04L41/0896 , H04L41/12 , H04L41/145 , H04L41/147 , H04L41/5019 , H04L43/065 , H04L43/08 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L43/16 , H04L45/02 , H04L45/52 , H04L47/24 , H04L47/38 , H04L47/765 , H04L47/782 , H04L47/805 , H04L47/82 , H04L47/823 , H04L49/00 , H04L49/15 , H04L49/25 , H04L49/357 , H04L49/45 , H04L49/555 , H04L67/02 , H04L67/10 , H04L67/1004 , H04L67/1008 , H04L67/1012 , H04L67/1014 , H04L67/1029 , H04L67/1034 , H04L67/1097 , H04L67/12 , H04L67/16 , H04L67/306 , H04L67/34 , H04L69/04 , H04L69/329 , H04Q1/04 , H04Q11/00 , H04Q11/0003 , H04Q11/0062 , H04Q11/0071 , H04Q2011/0037 , H04Q2011/0041 , H04Q2011/0052 , H04Q2011/0073 , H04Q2011/0079 , H04Q2011/0086 , H04Q2213/13523 , H04Q2213/13527 , H04W4/023 , H04W4/80 , H05K1/0203 , H05K1/181 , H05K5/0204 , H05K7/1418 , H05K7/1421 , H05K7/1422 , H05K7/1447 , H05K7/1461 , H05K7/1485 , H05K7/1487 , H05K7/1489 , H05K7/1491 , H05K7/1492 , H05K7/1498 , H05K7/2039 , H05K7/20709 , H05K7/20727 , H05K7/20736 , H05K7/20745 , H05K7/20836 , H05K13/0486 , H05K2201/066 , H05K2201/10121 , H05K2201/10159 , H05K2201/10189 , Y02D10/14 , Y02D10/151 , Y02P90/30 , Y10S901/01
Abstract: Technologies for adaptive processing of multiple buffers is disclosed. A compute device may establish a buffer queue to which applications can submit buffers to be processed, such as by hashing the submitted buffers. The compute device monitors the buffer queue and determines an efficient way of processing the buffer queue based on the number of buffers present. The compute device may process the buffers serially with a single processor core of the compute device or may process the buffers in parallel with single-instruction, multiple data (SIMD) instructions. The compute device may determine which method to use based on a comparison of the throughput of serially processing the buffers as compared to parallel processing the buffers, which may depend on the number of buffers in the buffer queue.
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公开(公告)号:US20210089236A1
公开(公告)日:2021-03-25
申请号:US17112235
申请日:2020-12-04
Applicant: Intel Corporation
Inventor: Ziye YANG , Shaopeng HE , Changpeng LIU , Xiaodong LIU
IPC: G06F3/06
Abstract: Examples described herein relate to receiving memory access requests in a first number of connections from one or more front-end clients destined to a storage system and consolidating the memory access requests to a second number of connections between a network device and the storage system, wherein the second number is less than the first number. In some examples, consolidating the memory access requests includes combining read commands with other read commands destined to the storage system among connections of the first number of connections and combining write commands with other write commands destined to a same storage system among connections of the first number of connections. In some examples, consolidating the memory access requests includes performing protocol conversion to a format accepted by the storage system. In some examples, read or write commands are identified based on content of a header of a received packet, wherein the received packet includes a read or write command.
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公开(公告)号:US20210271426A1
公开(公告)日:2021-09-02
申请号:US17253578
申请日:2019-01-31
Applicant: Intel Corporation
Inventor: Gang CAO , Ziye YANG , Xiaodong LIU , Changpeng LIU
Abstract: An apparatus is described. The apparatus includes an accelerator to be coupled to a memory region that the accelerator shares with a virtualization environment comprising a guest OS, a guest VM and an SSD device driver. The accelerator is to forward a submission queue doorbell setting made by the SSD device driver in the shared memory to a corresponding submission queue doorbell in an SSD controller.
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6.
公开(公告)号:US20230130859A1
公开(公告)日:2023-04-27
申请号:US17894041
申请日:2022-08-23
Applicant: Intel Corporation
Inventor: Xiaodong LIU , Ziye YANG , James R. HARRIS , Changpeng LIU , Gang CAO
IPC: G06F12/0811 , G06F12/0873
Abstract: An apparatus is described. The apparatus includes a network interface having a system interface, a media access interface and circuitry to construct a block of null values for a logical block address (LBA) in response to a remote storage system having informed the network interface that the LBA was un-mappable.
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