公开(公告)号：US07205030B2

公开(公告)日：2007-04-17

申请号：US10812420

申请日：2004-03-30

申请人： Kaori Misawa ,  Isao Matsumoto ,  Naofumi Ohashi ,  Koichi Abe ,  Haruaki Sakurai

发明人： Kaori Misawa ,  Isao Matsumoto ,  Naofumi Ohashi ,  Koichi Abe ,  Haruaki Sakurai

IPC分类号： C05D3/02

CPC分类号： H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/3122 ,  H01L21/31695

摘要： After applying a film-forming composition containing a polysiloxane, a pore-forming agent, an onium salt, and a solvent onto a semiconductor substrate, the solvent is evaporated from the film-forming composition in a first heat treatment. Then, a second heat treatment is carried out in an inert-gas atmosphere to promote the polymerization of the polysiloxane and thus form a polysiloxane resin film. Thereafter, a third heat treatment is carried out in an oxidizing-gas ambient to form pores in the polysiloxane resin film.

摘要翻译： 在半导体基板上涂布含有聚硅氧烷，成孔剂，鎓盐和溶剂的成膜组合物之后，在第一次热处理中从成膜组合物中蒸发掉溶剂。 然后，在惰性气体气氛中进行第二次热处理，促进聚硅氧烷的聚合，从而形成聚硅氧烷树脂膜。 此后，在氧化气体环境中进行第三次热处理，以在聚硅氧烷树脂膜中形成孔。

公开(公告)号：US07538038B2

公开(公告)日：2009-05-26

申请号：US11052987

申请日：2005-02-09

申请人： Atsushi Matsushita ,  Isao Matsumoto ,  Kazuaki Inukai ,  Hong Jae Shin ,  Naofumi Ohashi ,  Shuji Sone ,  Kaori Misawa

发明人： Atsushi Matsushita ,  Isao Matsumoto ,  Kazuaki Inukai ,  Hong Jae Shin ,  Naofumi Ohashi ,  Shuji Sone ,  Kaori Misawa

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/461 ,  H01L21/47

CPC分类号： G03F7/427 ,  H01L21/0274 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/7681

摘要： Disclosed is a method of removing resist preventing increase of dielectric constant of low permittivity insulating films and preventing remains of resist. Using a resist mask, a protection insulating film, a MSQ film, and a silicon oxide film composing an ILD are RIE dry etched sequentially, and a via is formed on the surface of a substrate for processing reaching the diffusion layer on the substrate for processing. Subsequent process consists of; removing a modified layer formed on the substrate for processing surface because of prior etching using plasma gas by plasma excitation of NH3 gas, and another etching for complete removal of the resist mask by irradiation of hydrogen active species created by hydrogen gas and inert gas, of which example is helium gas or argon gas.

摘要翻译： 公开了一种去除抗蚀剂的方法，该方法防止低介电常数绝缘膜的介电常数增加并防止抗蚀剂残留。 使用抗蚀剂掩模，保护绝缘膜，MSQ膜和构成ILD的氧化硅膜，依次进行RIE干式蚀刻，并且在用于处理的基板的表面上形成通孔以到达用于处理的基板上的扩散层 。 随后的过程包括 由于使用等离子体气体等离子体激发NH 3气体进行的先前的蚀刻，除去形成在基板上用于处理表面的改性层，以及通过氢气和惰性气体产生的氢活性物质的照射完全除去抗蚀剂掩模的另一种蚀刻 例如氦气或氩气。

公开(公告)号：US20050199586A1

公开(公告)日：2005-09-15

申请号：US11052911

申请日：2005-02-09

申请人： Atsushi Matsushita ,  Isao Matsumoto ,  Kazuaki Inukai ,  Hong Shin ,  Naofumi Ohashi ,  Shuji Sone ,  Kaori Misawa

发明人： Atsushi Matsushita ,  Isao Matsumoto ,  Kazuaki Inukai ,  Hong Shin ,  Naofumi Ohashi ,  Shuji Sone ,  Kaori Misawa

IPC分类号： H01L21/3065 ,  B44C1/22 ,  H01L21/311 ,  H01L21/3213

CPC分类号： H01L21/31138 ,  G03F7/427 ,  H01J37/32192 ,  H01J37/32357 ,  H01J37/32477 ,  H01J2237/3342

摘要： In resist removal using hydrogen gas, the specific dielectric constant of an insulating film of a low dielectric constant can be reduced and the resist removal speed can be increased. A wafer is loaded on a rotary table in a chamber, and hydrogen mixed gas is introduced into a discharge tube from a gas introduction port, and a μ wave is supplied into the discharge tube via a waveguide, and the mixed gas is excited by plasma, and a hydrogen active species is generated. And, a neutral radical (hydrogen radical) of hydrogen atoms or hydrogen molecules is introduced into the chamber from a gas transport pipe and a resist mask on the surface of the wafer is removed. Here, by a substrate heating system for heating the rotary table and controlling the temperature, the temperature of the wafer is set within the range from 200° C. to 400° C. The processed gas after resist removal is ejected from the chamber through a gas ejection port by an exhaust system.

摘要翻译： 在使用氢气的抗蚀剂去除中，可以降低介电常数低的绝缘膜的比介电常数，并且可以提高抗蚀剂去除速度。 将晶片装载在室内的旋转台上，将氢气混合气体从气体导入口引入放电管，经由波导将mu波供给到放电管内，混合气体被等离子体激发 ，生成氢活性物质。 并且，从气体输送管将氢原子或氢分子的中性自由基（氢基团）引入到室中，并且去除晶片表面上的抗蚀剂掩模。 这里，通过用于加热旋转台并控制温度的基板加热系统，将晶片的温度设定在200℃至400℃的范围内。抗蚀剂除去后的处理气体通过一个 气体排出口由排气系统。

公开(公告)号：US20050208756A1

公开(公告)日：2005-09-22

申请号：US11052987

申请日：2005-02-09

申请人： Atsushi Matsushita ,  Isao Matsumoto ,  Kazuaki Inukai ,  Hong Shin ,  Naofumi Ohashi ,  Shuji Sone ,  Kaori Misawa

发明人： Atsushi Matsushita ,  Isao Matsumoto ,  Kazuaki Inukai ,  Hong Shin ,  Naofumi Ohashi ,  Shuji Sone ,  Kaori Misawa

IPC分类号： H01L21/3065 ,  G03F7/42 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/461 ,  H01L21/4763 ,  H01L21/768

CPC分类号： G03F7/427 ,  H01L21/0274 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/7681

摘要： Disclosed is a method of removing resist preventing increase of dielectric constant of low permittivity insulating films and preventing remains of resist. Using a resist mask, a protection insulating film, a MSQ film, and a silicon oxide film composing an ILD are RIE dry etched sequentially, and a via is formed on the surface of a substrate for processing reaching the diffusion layer on the substrate for processing. Subsequent process consists of; removing a modified layer formed on the substrate for processing surface because of prior etching using plasma gas by plasma excitation of NH3 gas, and another etching for complete removal of the resist mask by irradiation of hydrogen active species created by hydrogen gas and inert gas, of which example is helium gas or argon gas.

摘要翻译： 公开了一种去除抗蚀剂的方法，该方法防止低介电常数绝缘膜的介电常数增加并防止抗蚀剂残留。 使用抗蚀剂掩模，保护绝缘膜，MSQ膜和构成ILD的氧化硅膜，依次进行RIE干式蚀刻，并且在用于处理的基板的表面上形成通孔以到达用于处理的基板上的扩散层 。 随后的过程包括 由于通过等离子体激发NH 3气体的等离子体气体的先前蚀刻，除去形成在用于处理表面的基板上的改性层，以及通过产生氢活性物质的照射完全除去抗蚀剂掩模的另一蚀刻 通过氢气和惰性气体，例如氦气或氩气。

公开(公告)号：US20050170102A1

公开(公告)日：2005-08-04

申请号：US11036138

申请日：2005-01-18

申请人： Isao Matsumoto ,  Naofumi Ohashi ,  Kaori Misawa ,  Shuji Sone

发明人： Isao Matsumoto ,  Naofumi Ohashi ,  Kaori Misawa ,  Shuji Sone

IPC分类号： H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H05H1/00

CPC分类号： H01L21/02137 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/31633 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835

摘要： A method for manufacturing a semiconductor device comprises: exposing a surface of a substrate to plasma; and forming an insulating film containing a low dielectric constant material on the surface of the substrate. A method for manufacturing a semiconductor device comprises: forming a modified layer by exposing a surface of a substrate to plasma; and forming an insulating film containing a low dielectric constant material on the modified layer. A method for manufacturing a semiconductor device comprises: forming an adhesion enhancement layer on a substrate; exposing a surface of the adhesion enhancement layer to plasma; and forming a first insulating film on the adhesion enhancement layer.

摘要翻译： 一种制造半导体器件的方法包括：将衬底的表面暴露于等离子体; 以及在所述基板的表面上形成含有低介电常数材料的绝缘膜。 一种制造半导体器件的方法包括：通过将衬底的表面暴露于等离子体来形成改性层; 以及在所述改性层上形成含有低介电常数材料的绝缘膜。 一种制造半导体器件的方法包括：在衬底上形成粘合增强层; 将粘附增强层的表面暴露于等离子体; 以及在所述粘合增强层上形成第一绝缘膜。

公开(公告)号：US07064060B2

公开(公告)日：2006-06-20

申请号：US11010344

申请日：2004-12-14

申请人： Kaori Misawa ,  Naofumi Ohashi

发明人： Kaori Misawa ,  Naofumi Ohashi

IPC分类号： H01L21/4763

CPC分类号： H01L21/02063 ,  H01L21/02107 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/02362 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76841 ,  H01L2221/1047

摘要： A heat treatment is performed to an insulating film composition, formed on a semiconductor substrate, at a temperature of 350° C. in an inert gas ambient to form a non-porous insulating film. Next, dry etching is performed using a resist pattern as a mask to form a trench in the non-porous insulating film, ashing is performed to remove the resist pattern, and the surface of the semiconductor substrate is cleaned. Thereafter, a second heat treatment is performed for the non-porous insulating film to form a porous insulating film. Since the second heat treatment is performed in an oxidizing-gas atmosphere, the pore-generating material can be removed at a temperature lower than the temperature of conventional methods to form an insulating film having a low dielectric constant.

摘要翻译： 对形成在半导体基板上的绝缘膜组合物在惰性气体环境中在350℃的温度下进行热处理，以形成无孔绝缘膜。 接下来，使用抗蚀剂图案作为掩模进行干蚀刻，以在无孔绝缘膜中形成沟槽，进行灰化以除去抗蚀剂图案，并且清洁半导体衬底的表面。 此后，对无孔绝缘膜进行第二次热处理以形成多孔绝缘膜。 由于在氧化气体气氛中进行第二热处理，所以可以在低于常规方法的温度的温度下除去孔产生材料，以形成具有低介电常数的绝缘膜。

公开(公告)号：US20050191847A1

公开(公告)日：2005-09-01

申请号：US11010344

申请日：2004-12-14

申请人： Kaori Misawa ,  Naofumi Ohashi

发明人： Kaori Misawa ,  Naofumi Ohashi

IPC分类号： H01L21/3205 ,  H01L21/00 ,  H01L21/02 ,  H01L21/311 ,  H01L21/314 ,  H01L21/316 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/52

CPC分类号： H01L21/02063 ,  H01L21/02107 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/02362 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76841 ,  H01L2221/1047

摘要： A heat treatment is performed to an insulating film composition, formed on a semiconductor substrates at a temperature of 350° C. in an inert gas ambient to form a non-porous insulating film. Next, dry etching is performed using a resist pattern as a mask to form a trench in the non-porous insulating film, ashing is performed to remove the resist pattern, and the surface of the semiconductor substrate is cleaned. Thereafter, a second heat treatment is performed for the non-porous insulating film to form a porous insulating film. Since the second heat treatment is performed in an oxidizing-gas atmosphere, the pore-generating material can be removed at a temperature lower than the temperature of conventional methods to form an insulating film having a low dielectric constant.

摘要翻译： 对绝缘膜组合物进行热处理，在惰性气体环境中在350℃的温度下在半导体基板上形成绝缘膜组合物，以形成无孔绝缘膜。 接下来，使用抗蚀剂图案作为掩模进行干蚀刻，以在无孔绝缘膜中形成沟槽，进行灰化以除去抗蚀剂图案，并且清洁半导体衬底的表面。 此后，对无孔绝缘膜进行第二次热处理以形成多孔绝缘膜。 由于在氧化气体气氛中进行第二热处理，所以可以在低于常规方法的温度的温度下除去孔产生材料，以形成具有低介电常数的绝缘膜。

公开(公告)号：US20080233736A1

公开(公告)日：2008-09-25

申请号：US12127564

申请日：2008-05-27

申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

IPC分类号： H01L21/4763

CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

摘要翻译： 为了提供通过化学机械抛光（CMP）方法形成的金属配线的防腐蚀技术，根据本发明的半导体集成电路器件的制造方法包括以下步骤：形成Cu（或Cu合金）的金属层 含有Cu作为主要成分），然后通过化学机械抛光（CMP）方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。

公开(公告)号：US20060141792A1

公开(公告)日：2006-06-29

申请号：US11357181

申请日：2006-02-21

申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

IPC分类号： H01L21/44

CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP). method, a process for manufacturing. a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

摘要翻译： 为了提供通过化学机械抛光（CMP）形成的金属配线的防腐蚀技术。 方法，制造方法。 根据本发明的半导体集成电路器件包括以下步骤：在晶片的主面上形成Cu（或含有Cu作为主要成分的Cu合金）的金属层，然后通过化学机械抛光使金属层平坦化 （CMP）方法形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。

公开(公告)号：US06864169B2

公开(公告)日：2005-03-08

申请号：US10233475

申请日：2002-09-04

申请人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchii ,  Nobuo Owada

发明人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchii ,  Nobuo Owada

IPC分类号： H01L21/3205 ,  H01L21/02 ,  H01L21/28 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/70 ,  H01L21/768 ,  H01L23/532 ,  H01L21/4763

CPC分类号： H01L21/0217 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/3185 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/67115 ,  H01L21/68792 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/7684 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.

摘要翻译： 在形成通过CMP将氧化硅膜39的互连槽40中的Cu互连46a至46e形成之后，然后进行清洗，每个氧化硅膜39和Cu互连46a至46e的表面被还原 等离子体（氨等离子体）。 然后，没有真空断裂，连续形成盖膜（氮化硅膜）。 该方法使得可以提高通过镶嵌方法形成的铜互连的绝缘击穿电阻（可靠性）。