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1.
公开(公告)号:US20190139778A1
公开(公告)日:2019-05-09
申请号:US16220583
申请日:2018-12-14
Applicant: Lam Research Corporation
Inventor: Keren Jacobs Kanarik , Jeffrey Marks , Harmeet Singh , Samantha SiamHwa Tan , Alexander Kabansky , Wenbing Yang , Taeseung Kim , Dennis M. Hausmann , Thorsten Lill
IPC: H01L21/3065 , C23C16/455 , H01L21/67 , H01J37/32 , H01L21/02 , H01L21/683 , H01L21/311
CPC classification number: H01L21/30655 , C23C16/402 , C23C16/45527 , C23C16/45536 , C23C16/45544 , C23C16/56 , H01J37/32009 , H01J37/32449 , H01J2237/334 , H01L21/02164 , H01L21/02274 , H01L21/0228 , H01L21/31116 , H01L21/32137 , H01L21/67069 , H01L21/67207 , H01L21/6831 , H01L43/12
Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
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2.
公开(公告)号:US20180033635A1
公开(公告)日:2018-02-01
申请号:US15719484
申请日:2017-09-28
Applicant: Lam Research Corporation
Inventor: Keren Jacobs Kanarik , Jeffrey Marks , Harmeet Singh , Samantha Tan , Alexander Kabansky , Wenbing Yang , Taeseung Kim , Dennis M. Hausmann , Thorsten Lill
IPC: H01L21/3065 , C23C16/455 , H01J37/32 , H01L21/67 , H01L21/311 , H01L21/02 , H01L21/683 , H01L43/12 , H01L21/3213
CPC classification number: H01L21/30655 , C23C16/402 , C23C16/45527 , C23C16/45536 , C23C16/45544 , C23C16/56 , H01J37/32009 , H01J37/32449 , H01J2237/334 , H01L21/02164 , H01L21/02274 , H01L21/0228 , H01L21/31116 , H01L21/32137 , H01L21/67069 , H01L21/67207 , H01L21/6831 , H01L43/12
Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
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公开(公告)号:US20220244645A1
公开(公告)日:2022-08-04
申请号:US17596648
申请日:2020-06-25
Applicant: Lam Research Corporation
Inventor: Samantha SiamHwa Tan , Jengyi Yu , Da Li , Yiwen Fan , Yang Pan , Jeffrey Marks , Richard A. Gottscho , Daniel Peter , Timothy William Weidman , Boris Volosskiy , Wenbing Yang
Abstract: Development of resists are useful, for example, to form a patterning mask in the context of high-resolution patterning. Development can be accomplished using a halide-containing chemistry such as a hydrogen halide. A metal-containing resist film may be deposited on a semiconductor substrate using a dry or wet deposition technique. The resist film may be an EUV-sensitive organo-metal oxide or organo-metal-containing thin film resist. After exposure, the photopatterned metal-containing resist is developed using wet or dry development.
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公开(公告)号:US10749103B2
公开(公告)日:2020-08-18
申请号:US16449141
申请日:2019-06-21
Applicant: Lam Research Corporation
Inventor: Samantha Tan , Taeseung Kim , Wenbing Yang , Jeffrey Marks , Thorsten Lill
Abstract: Apparatuses for etching metal by depositing a material reactive with a metal to be etched and a halogen to form a volatile species and exposing the substrate to a halogen-containing gas and activation gas to etch the substrate are provided. Deposited materials may include silicon, germanium, titanium, carbon, tin, and combinations thereof. Apparatuses are suitable for fabricating MRAM structures and may be used to integrate ALD and ALE processes without breaking vacuum.
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公开(公告)号:US10514598B2
公开(公告)日:2019-12-24
申请号:US15691659
申请日:2017-08-30
Applicant: Lam Research Corporation
Inventor: Jeffrey Marks , George Andrew Antonelli , Richard A. Gottscho , Dennis M. Hausmann , Adrien LaVoie , Thomas Joseph Knisley , Sirish K. Reddy , Bhadri N. Varadarajan , Artur Kolics
IPC: G03F7/16 , C23C14/56 , H01L21/67 , G03F1/76 , C23C18/14 , C23C18/16 , C23C18/18 , G03F7/004 , H01L21/033 , H01L21/3213 , G03F7/20 , G03F7/26 , G03F7/36 , C23C16/44
Abstract: Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.
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公开(公告)号:US20190312194A1
公开(公告)日:2019-10-10
申请号:US16449141
申请日:2019-06-21
Applicant: Lam Research Corporation
Inventor: Samantha Tan , Taeseung Kim , Wenbing Yang , Jeffrey Marks , Thorsten Lill
Abstract: Methods of etching metal by depositing a material reactive with a metal to be etched and a halogen to form a volatile species and exposing the substrate to a halogen-containing gas and activation gas to etch the substrate are provided. Deposited materials may include silicon, germanium, titanium, carbon, tin, and combinations thereof. Methods are suitable for fabricating MRAM structures and may involve integrating ALD and ALE processes without breaking vacuum.
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7.
公开(公告)号:US10186426B2
公开(公告)日:2019-01-22
申请号:US15719484
申请日:2017-09-28
Applicant: Lam Research Corporation
Inventor: Keren Jacobs Kanarik , Jeffrey Marks , Harmeet Singh , Samantha Tan , Alexander Kabansky , Wenbing Yang , Taeseung Kim , Dennis M. Hausmann , Thorsten Lill
IPC: H01L21/3065 , H01L21/67 , H01L21/311 , H01L21/02 , H01L21/683 , H01L21/3213 , H01L43/12 , H01J37/32 , C23C16/455
Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
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公开(公告)号:US20180233325A1
公开(公告)日:2018-08-16
申请号:US15952834
申请日:2018-04-13
Applicant: Lam Research Corporation
Inventor: Keren Jacobs Kanarik , Samantha Tan , Thorsten Lill , Meihua Shen , Yang Pan , Jeffrey Marks , Richard Wise
IPC: H01J37/32 , H01L21/306 , H01L21/321 , H01L21/3105 , G03F1/60 , H01L21/3213 , H01L21/302 , H01L21/3065 , C23F4/00 , H01L21/311 , G03F1/22
CPC classification number: H01J37/321 , C23F4/00 , G03F1/22 , G03F1/60 , H01J2237/334 , H01L21/302 , H01L21/30621 , H01L21/3065 , H01L21/3105 , H01L21/31122 , H01L21/321 , H01L21/32136
Abstract: Methods of etching and smoothening films by exposing to a halogen-containing plasma and an inert plasma within a bias window in cycles are provided. Methods are suitable for etching and smoothening films of various materials in the semiconductor industry and are also applicable to applications in optics and other industries.
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公开(公告)号:US09778561B2
公开(公告)日:2017-10-03
申请号:US14610038
申请日:2015-01-30
Applicant: Lam Research Corporation
Inventor: Jeffrey Marks , George Andrew Antonelli , Richard A. Gottscho , Dennis M. Hausmann , Adrien LaVoie , Thomas Joseph Knisley , Sirish K. Reddy , Bhadri N. Varadarajan , Artur Kolics
IPC: B05D3/06 , G03F1/76 , C23C18/14 , C23C18/16 , C23C18/18 , H01L21/033 , H01L21/3213 , G03F7/004 , G03F7/16
CPC classification number: G03F1/76 , C23C18/14 , C23C18/1612 , C23C18/165 , C23C18/182 , G03F7/0043 , G03F7/16 , G03F7/167 , H01L21/0332 , H01L21/0337 , H01L21/3213
Abstract: Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.
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10.
公开(公告)号:US20170117159A1
公开(公告)日:2017-04-27
申请号:US15400368
申请日:2017-01-06
Applicant: Lam Research Corporation
Inventor: Keren Jacobs Kanarik , Jeffrey Marks , Harmeet Singh , Samantha Tan , Alexander Kabansky , Wenbing Yang , Taeseung Kim , Dennis M. Hausmann , Thorsten Lill
IPC: H01L21/3065 , H01J37/32 , H01L21/683 , C23C16/455 , H01L21/02 , H01L21/67
CPC classification number: H01L21/30655 , C23C16/45527 , C23C16/45544 , H01J37/32009 , H01J37/32449 , H01J2237/334 , H01L21/02164 , H01L21/02274 , H01L21/0228 , H01L21/31116 , H01L21/32137 , H01L21/67069 , H01L21/67207 , H01L21/6831 , H01L43/12
Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
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