公开(公告)号：US06319810B1

公开(公告)日：2001-11-20

申请号：US08659356

申请日：1996-06-06

申请人： Masayuki Ochiai ,  Yasuo Yamagishi ,  Ichiro Yamaguchi ,  Masahiro Yoshikawa ,  Koki Otake ,  Masataka Mizukoshi ,  Yuuji Watanabe

发明人： Masayuki Ochiai ,  Yasuo Yamagishi ,  Ichiro Yamaguchi ,  Masahiro Yoshikawa ,  Koki Otake ,  Masataka Mizukoshi ,  Yuuji Watanabe

IPC分类号： H01L2144

CPC分类号： H01L24/12 ,  B23K3/0623 ,  H01L21/4853 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H05K3/3463 ,  H05K3/3478 ,  H05K3/3484 ,  H05K3/3489 ,  H05K2201/10992 ,  H05K2203/0113 ,  H05K2203/016 ,  H05K2203/0278 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K2203/087 ,  H05K2203/1105 ,  H05K2203/1157 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2224/48

摘要： Method for forming solder bumps on a first member such as a semiconductor chip having electrode pads formed thereon. A flat plate having holes is prepared and the holes are filled with solder paste by squeezing. The flat plate is then overlapped with the first member with the flat plate above the first plate. The flat plate and the first member are heated to a temperature higher than the melting point of the solder alloy in the solder paste. Therefore, solder bumps having identical sizes and uniform structures can be obtained.

摘要翻译： 在诸如其上形成有电极焊盘的半导体芯片的第一部件上形成焊料凸块的方法。 准备具有孔的平板，并通过挤压填充焊膏。 然后平板与第一构件重叠，平板在第一板上。 平板和第一构件被加热到高于焊膏中的焊料合金的熔点的温度。 因此，可以获得具有相同尺寸和均匀结构的焊料凸块。

公开(公告)号：US6090301A

公开(公告)日：2000-07-18

申请号：US848717

申请日：1997-05-19

申请人： Masataka Mizukoshi ,  Ichiro Yamaguchi ,  Masahiro Yoshikawa ,  Koki Otake ,  Junichi Kasai

发明人： Masataka Mizukoshi ,  Ichiro Yamaguchi ,  Masahiro Yoshikawa ,  Koki Otake ,  Junichi Kasai

IPC分类号： H01L21/48 ,  H01L21/60 ,  H01L21/68 ,  H05K3/34 ,  H01L21/302

CPC分类号： H05K3/3484 ,  H01L21/4853 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H05K2201/10734 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/043 ,  H05K3/3478

摘要： A method for fabricating a bump forming plate member by which bumps can be formed on an electronic component. A mask is formed on a surface of a crystalline plate, and the crystalline plate is subjected to anisotropic etching to form a plurality of grooves. The crystalline plate is also subjected to isotropic etching to deepen the grooves. The method can further includes additional anisotropic and isotropic etchings. Also, a method for fabricating a metallic bump forming plate member is disclosed. This method uses the above described crystalline plate having the grooves, and includes fabrication of a replica using the crystalline plate as an original, and fabrication of a metallic bump forming plate member using the replica as an original.

摘要翻译： 一种用于制造凸块形成板构件的方法，通过该凸块形成板构件可以在电子部件上形成凸块。 在结晶板的表面上形成掩模，对各结晶板进行各向异性蚀刻，形成多个槽。 晶片也进行各向同性蚀刻以加深槽。 该方法还可以包括额外的各向异性和各向同性蚀刻。 此外，公开了一种用于制造金属凸块形成板构件的方法。 该方法使用上述具有凹槽的晶片，并且包括使用原版的晶体板制造复制品，以及使用该复制品作为原件制造金属凸块形成板构件。

公开(公告)号：US06271110B1

公开(公告)日：2001-08-07

申请号：US09118064

申请日：1998-07-17

申请人： Ichiro Yamaguchi ,  Koki Otake ,  Masahiro Yoshikawa

发明人： Ichiro Yamaguchi ,  Koki Otake ,  Masahiro Yoshikawa

IPC分类号： H01L2144

CPC分类号： B23K3/0623 ,  H01L21/4853 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/3463 ,  H05K3/3478 ,  H05K3/3484 ,  H05K3/3489 ,  H05K2201/10992 ,  H05K2203/0113 ,  H05K2203/016 ,  H05K2203/0278 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K2203/087 ,  H05K2203/1105 ,  H05K2203/1157 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00014

摘要： First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.

摘要翻译： 制备第一和第二球形成板。 第一板的空腔和第二板20的空腔分别用焊膏填充。 第一板和第二板相互放置成面对的关系，并加热形成金属球，每个金属球对应于第一板的一个空腔中的焊膏的总金属成分和第二板中的一个空腔。 金属球形成在下板10的空腔中。金属球从第一板的空腔传送到要在其上形成凸块的装置。

公开(公告)号：US08323828B2

公开(公告)日：2012-12-04

申请号：US10638326

申请日：2003-08-12

申请人： Takuya Yamazaki ,  Kiyoshi Oguchi ,  Koji Shimizu ,  Kenichiro Suto ,  Tsutomu Yoshinaka ,  Hideki Kurokawa ,  Hitoshi Sekino ,  Masahiro Yoshikawa ,  Hiroshi Miyama ,  Katsuhiko Hayashi ,  Jun Fukuda

发明人： Takuya Yamazaki ,  Kiyoshi Oguchi ,  Koji Shimizu ,  Kenichiro Suto ,  Tsutomu Yoshinaka ,  Hideki Kurokawa ,  Hitoshi Sekino ,  Masahiro Yoshikawa ,  Hiroshi Miyama ,  Katsuhiko Hayashi ,  Jun Fukuda

IPC分类号： H01M2/02

CPC分类号： H01M2/0275 ,  H01M2/021 ,  H01M2/0277 ,  H01M2/0287 ,  H01M2/06 ,  H01M10/0525 ,  H01M2300/0085 ,  Y10S428/91 ,  Y10T428/2495 ,  Y10T428/24967 ,  Y10T428/2804 ,  Y10T428/2817 ,  Y10T428/31681 ,  Y10T428/31692 ,  Y10T428/31913 ,  Y10T428/31938

摘要： A battery packet (50) comprises a battery case (51) formed by processing a battery case forming laminated sheet (10), a battery 50a contained in the battery case (51), and tabs (59, 60) extending outside from the battery case (51). The battery case forming laminated sheet (10) is formed by laminating a first base film layer (1a), i.e., an outermost layer, a metal foil layer (2), and a heat-adhesive resin layer (3) in that order. The first base film layer (1a) is a biaxially oriented polyethylene terephthalate resin film or a biaxially oriented nylon resin film. The metal foil layer (2) is an aluminum or copper foil. The heat-adhesive resin layer (3) is formed of a polyolefin resin, more preferably, of an acid-denatured polyolefin resin.

摘要翻译： 电池组件（50）包括通过处理电池盒形成层压片（10）形成的电池壳体（51），容纳在电池壳体（51）中的电池50a以及从电池外部延伸的突片（59,60） 情况（51）。 电池盒形成叠层片（10）通过依次层叠第一基膜层（1a）即最外层，金属箔层（2）和热粘树脂层（3）而形成。 第一基膜层（1a）是双轴取向聚对苯二甲酸乙二醇酯树脂膜或双轴取向尼龙树脂膜。 金属箔层（2）是铝箔或铜箔。 热粘树脂层（3）由聚烯烃树脂形成，更优选由酸改性的聚烯烃树脂形成。

公开(公告)号：US20110135318A1

公开(公告)日：2011-06-09

申请号：US12781175

申请日：2010-05-17

申请人： Kazutaka Takeda ,  Masahiro Yoshikawa ,  Kazuyuki Matsushita

发明人： Kazutaka Takeda ,  Masahiro Yoshikawa ,  Kazuyuki Matsushita

IPC分类号： H04B10/04 ,  H01S5/183 ,  H01L33/00 ,  G11B7/00

CPC分类号： H01S5/18311 ,  H01S5/005 ,  H01S5/02212 ,  H01S5/0425 ,  H01S5/18391 ,  H01S2301/166 ,  H01S2301/176

摘要： A vertical cavity surface emitting laser that includes: a substrate; a first semiconductor multilayer reflector; an active region; a second semiconductor multilayer reflector; a columnar structure formed from the second semiconductor multilayer reflector to the first semiconductor multilayer reflector; a current narrowing layer formed inside of the columnar structure and having a conductive region surrounded by an oxidization region; a first electrode formed at a top of the columnar structure, electrically connected to the second semiconductor multilayer reflector and defining a beam window; a first insulating film comprised of a material with a first refractive index and formed on the first electrode to cover the beam window; and a second insulating film comprised of a material with a second refractive index and formed on the first insulating film, of which a radius is smaller than a radius of the conductive region.

摘要翻译： 一种垂直腔表面发射激光器，包括：衬底; 第一半导体多层反射器; 活跃区域 第二半导体多层反射器; 由所述第二半导体多层反射器形成到所述第一半导体多层反射器的柱状结构; 形成在柱状结构内部并具有由氧化区域包围的导电区域的电流变窄层; 形成在所述柱状结构的顶部的第一电极，电连接到所述第二半导体多层反射器并限定光束窗; 第一绝缘膜，由具有第一折射率的材料构成，并形成在第一电极上以覆盖光束窗; 以及第二绝缘膜，其由具有第二折射率的材料构成，并形成在第一绝缘膜上，半导体的半径小于导电区域的半径。

公开(公告)号：US07724799B2

公开(公告)日：2010-05-25

申请号：US12110448

申请日：2008-04-28

申请人： Masateru Yamamoto ,  Masahiro Yoshikawa ,  Takashi Kondo

发明人： Masateru Yamamoto ,  Masahiro Yoshikawa ,  Takashi Kondo

IPC分类号： H01S5/00

CPC分类号： H01S5/18308 ,  B41J2/45 ,  H01S5/02284 ,  H01S5/02288 ,  H01S5/06804 ,  H01S5/0683 ,  H01S5/18311 ,  H01S5/1833 ,  H01S5/18336

摘要： A VCSEL includes a first distributed Bragg reflector (DBR) of a first conductivity type formed on a substrate and including at least one semiconductor layer to be oxidized, an active region having a column shaped structure and formed on the first DBR, and a second DBR of a second conductivity type. At least one hole starting from a surface of the first DBR and reaching the at least one semiconductor layer to be oxidized is formed in the first DBR outside of a column shaped structure of the second DBR. An oxidized region is formed in the semiconductor layer to be oxidized by selectively oxidizing from a side surface of the hole. In the first DBR, a first current path is formed by a conductive region surrounded by the oxidized region, and a second current path is formed by a conductive region not surrounded by the oxidized region.

摘要翻译： VCSEL包括第一导电类型的第一分布布拉格反射器（DBR），其形成在衬底上并且包括至少一个要被氧化的半导体层，形成在第一DBR上的具有柱状结构的有源区和第二DBR 的第二导电类型。 从第一DBR的表面开始并到达要被氧化的至少一个半导体层的至少一个孔形成在第二DBR的列形结构外侧的第一DBR中。 通过从孔的侧面选择性氧化，在半导体层中形成被氧化的氧化区域。 在第一DBR中，第一电流路径由被氧化区域包围的导电区域形成，并且第二电流路径由未被氧化区域包围的导电区域形成。

公开(公告)号：US08659020B2

公开(公告)日：2014-02-25

申请号：US13378562

申请日：2010-05-28

申请人： Tadashi Kawashima ,  Masahiro Yoshikawa ,  Akira Inoue ,  Yoshiya Yoshida

发明人： Tadashi Kawashima ,  Masahiro Yoshikawa ,  Akira Inoue ,  Yoshiya Yoshida

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/3221

摘要： It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A silicon epitaxial layer is grown by a CVD method on the surface of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration. After that, a PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.

摘要翻译： 本发明的目的是提供一种在掺杂有磷（P）和锗（Ge）的硅晶体衬底的背面侧上形成多晶硅层的优异的吸气能力的外延硅晶片。 通过CVD法在硅晶体衬底的表面上以高浓度掺杂有磷和锗的方式生长硅外延层。 之后，在硅晶体基板的背面进行用于生长多晶硅层的PBS形成工序。 通过上述步骤，可以大大减少由于SF而在外延硅晶片的表面上发生的LPD（由SF引起）的数量。

公开(公告)号：US20130186993A1

公开(公告)日：2013-07-25

申请号：US13812638

申请日：2011-07-28

申请人： Masahiro Yoshikawa ,  Tomoyuki Chiba ,  Takashi Shibata

发明人： Masahiro Yoshikawa ,  Tomoyuki Chiba ,  Takashi Shibata

IPC分类号： B02C19/06

CPC分类号： B02C19/06 ,  B02C19/066 ,  B02C19/068 ,  B02C23/12 ,  B07B7/083 ,  B07B7/086

摘要： Disposed is a jet mill that has a cylindrical pulverization chamber (10) and a classification chamber (6) that connects to the pulverization chamber (10). A fine-powder discharge port (4a) and a classification rotor (7) are provided in the classification chamber (6). A feedstock supply port (5) and at least one gas emission nozzle (11) are provided in the pulverization chamber (10). The shape of the classification chamber (6) is a cone that starts on the inner wall of the pulverization chamber (10), and is angled towards the classification rotor (7). This configuration gives the jet mill high efficiency of pulverization and reduces the amount of powders left in the chamber when the jet mill has finished running.

摘要翻译： 设置有具有连接到粉碎室（10）的圆柱形粉碎室（10）和分级室（6）的喷射式粉碎机。 在分级室（6）中设置有细粉末排出口（4a）和分级转子（7）。 原料供给口（5）和至少一个排气喷嘴（11）设置在粉碎室（10）中。 分级室（6）的形状是从粉碎室（10）的内壁开始朝向分级转子（7）倾斜的锥体。 这种配置给喷射磨机提供了高效率的粉碎，并且当喷射磨机运行完毕时，减少了腔室中留下的粉末的量。

公开(公告)号：US20100226656A1

公开(公告)日：2010-09-09

申请号：US12540572

申请日：2009-08-13

申请人： Takehiro Niitsu ,  Akira Sakamoto ,  Masahiro Yoshikawa

发明人： Takehiro Niitsu ,  Akira Sakamoto ,  Masahiro Yoshikawa

IPC分类号： H04B10/12 ,  G02B6/26 ,  H04B10/00

CPC分类号： G02B6/4214 ,  G02B6/43 ,  G02B2006/12195

摘要： An optical waveguide includes a first waveguide region and a second waveguide region. The first waveguide region includes a first core, a first clad provided around the first core, and a light reflecting surface. The light reflecting surface has at least one function of (i) reflecting light from a longitudinal direction of the first core toward a direction crossing the longitudinal direction and (ii) reflecting light from the crossing direction toward the longitudinal direction of the first core. The second waveguide region continues from the first waveguide region. The second waveguide region that includes a second core, and a second clad provided around the second core. The second core of the second waveguide region is thinner than the first core of the first waveguide region. A total thickness of the second core and the second clad is smaller than that of the first core and the first clad.

摘要翻译： 光波导包括第一波导区域和第二波导区域。 第一波导区域包括第一芯，围绕第一芯设置的第一包层和光反射表面。 光反射面至少具有以下功能：（i）将反射来自第一芯的纵向的光朝向与长度方向交叉的方向反射，以及（ii）将来自交叉方向的光朝向第一芯的长度方向反射。 第二波导区域从第一波导区域继续。 包括第二芯的第二波导区域和围绕第二核心设置的第二覆层。 第二波导区域的第二核心比第一波导区域的第一核心薄。 第二芯和第二包层的总厚度小于第一芯和第一包层的总厚度。

公开(公告)号：US07751459B2

公开(公告)日：2010-07-06

申请号：US12330118

申请日：2008-12-08

申请人： Masahiro Yoshikawa ,  Masateru Yamamoto ,  Takashi Kondo

发明人： Masahiro Yoshikawa ,  Masateru Yamamoto ,  Takashi Kondo

IPC分类号： H01S5/00

CPC分类号： H01S5/18311 ,  B82Y20/00 ,  H01S5/005 ,  H01S5/02284 ,  H01S5/02288 ,  H01S5/0425 ,  H01S5/06226 ,  H01S5/18361 ,  H01S5/305 ,  H01S5/3054 ,  H01S5/3077 ,  H01S5/3432

摘要： Provided is a VCSEL that includes: a first semiconductor multilayer film reflective mirror of a first conductivity type formed on a substrate; an active region formed thereon; a current confining layer of a second conductivity type formed thereon; a second semiconductor multilayer film reflective mirror of the second conductivity type formed thereon; and a third semiconductor multilayer film reflective mirror of the second conductivity type formed thereon. The reflective mirrors include a pair of a high refractive index layer and a low refractive index layer. The impurity concentration of the second reflective mirror is higher than that of the third reflective mirror. The band gap energy of the high refractive index layer in the second reflective mirror is greater than the energy of the wavelength of a resonator formed of the first reflective mirror, the active region, the current confining layer, the second reflective mirror, and the third reflective mirror.

摘要翻译： 提供一种VCSEL，其包括：形成在基板上的第一导电类型的第一半导体多层膜反射镜; 形成在其上的有源区; 形成在其上的第二导电类型的电流限制层; 在其上形成第二导电类型的第二半导体多层膜反射镜; 以及形成在其上的第二导电类型的第三半导体多层膜反射镜。 反射镜包括一对高折射率层和低折射率层。 第二反射镜的杂质浓度高于第三反射镜的杂质浓度。 第二反射镜中的高折射率层的带隙能量大于由第一反射镜，有源区，电流限制层，第二反射镜和第三反射镜形成的谐振器的波长的能量 反光镜。