MODULE
    1.
    发明公开
    MODULE 审中-公开

    公开(公告)号:US20240297152A1

    公开(公告)日:2024-09-05

    申请号:US18663782

    申请日:2024-05-14

    发明人: Yoshihito OTSUBO

    摘要: A module comprises: a first electronic component having a first component surface and a second component surface; a second electronic component having a third component surface and a fourth component surface; a first substrate having a first substrate surface and a second substrate surface; and a second substrate having a third substrate surface and a fourth substrate surface, the second substrate being disposed so as to overlap the first substrate while being spaced from the first substrate, the first electronic component and the second electronic component being disposed such that the second component surface and the third component surface face each other, at least a portion of the second electronic component being disposed inside an opening, the first electronic component being mounted on the second substrate surface by face bonding, the second electronic component being wire-bonded to the fourth substrate surface using a second connection terminal.

    CIRCUIT MODULE
    2.
    发明公开
    CIRCUIT MODULE 审中-公开

    公开(公告)号:US20240237211A9

    公开(公告)日:2024-07-11

    申请号:US18483929

    申请日:2023-10-10

    IPC分类号: H05K1/14 H05K1/02

    摘要: An upper circuit board body has a first upper main surface and a first lower main surface. A lower circuit board body has a second upper main surface and a second lower main surface. A lower circuit board first mounting electrode and one or more lower circuit board second mounting electrodes are disposed on the second upper main surface. A first component is mounted on the one or more lower circuit board second mounting electrodes. A first conductor member is mounted on the lower circuit board first mounting electrode and is disposed on the left of the first component. A second conductor member is disposed on the first lower main surface, is connected to the upper end of the first conductor member, and overlaps at least a part of the first component as viewed in the downward direction.

    MODULE
    4.
    发明申请
    MODULE 有权

    公开(公告)号:US20230103130A1

    公开(公告)日:2023-03-30

    申请号:US18062176

    申请日:2022-12-06

    IPC分类号: H05K1/18 H05K1/11

    摘要: A module includes: a substrate having a first surface; a first component mounted on the first surface; a resin film covering the first component along a shape of the first component and covering a part of the first surface; and one or more wires disposed to extend over the first component on a side of the resin film farther from the substrate.

    MODULE
    5.
    发明申请
    MODULE 有权

    公开(公告)号:US20220199485A1

    公开(公告)日:2022-06-23

    申请号:US17654271

    申请日:2022-03-10

    IPC分类号: H01L23/367 H01L23/552

    摘要: A module includes a substrate including a first main surface, a first component mounted on the first main surface, a first sealing resin that covers the first main surface and a portion of connection of the first component to at least the first main surface, a first conductor pattern arranged on a surface of the first sealing resin on a side distant from the first main surface, and a columnar conductor as a metal member connected to the first conductor pattern to pass through the first sealing resin from an electrode drawn from the first component along the first main surface.

    RESIN MULTILAYER SUBSTRATE
    6.
    发明申请

    公开(公告)号:US20200245473A1

    公开(公告)日:2020-07-30

    申请号:US16846774

    申请日:2020-04-13

    摘要: A resin multilayer substrate includes a stacked body including resin layers, a component, one or more first conductor patterns, and one or more second conductor patterns each disposed in a gap between the resin layers. At least a portion of an outline of each of the one or more first conductor patterns overlaps with the component. An outline of each of the one or more second conductor patterns does not overlap with the component. A resin portion is adjacent to each of the one or more first conductor patterns along a portion of the outline of each of the one or more first conductor patterns that overlaps with the component. The resin portion is made of a resin paste including thermoplastic resin powder as a main material. The resin portion is not disposed in a portion along the outline of each of the one or more second conductor patterns.

    STACKED ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING STACKED ELECTRONIC COMPONENT

    公开(公告)号:US20200082990A1

    公开(公告)日:2020-03-12

    申请号:US16683857

    申请日:2019-11-14

    摘要: Provided is a stacked electronic component having: a stacked body 1 in which ceramic layers 1a to 1h are stacked, the stacked body having an a upper surface U and side surfaces S; at least one recess portion 8 formed on the upper surface U that indicates at least one of a mark, a letter, or a number; electrodes 3, 4, 5, 6 formed between the layers of the stacked body 1; and a shield layer 9 formed on the upper surface U and the side surfaces S of the stacked body 1. Right below an inner bottom surface of the recess portion 8 of the stacked body 1, there is provided a no-electrode region NE in which the electrodes 3, 4, 5, 6 are not formed, the no-electrode region NE having a thickness which is equal to or larger than a depth of the recess portion 8.

    HIGH-FREQUENCY MODULE
    8.
    发明申请

    公开(公告)号:US20190274237A1

    公开(公告)日:2019-09-05

    申请号:US16414185

    申请日:2019-05-16

    发明人: Yoshihito OTSUBO

    摘要: Provided is a high-frequency module capable of improving a shielding performance for a specific component. In a high-frequency module 1a, a component 3c that is mounted on a top surface 20a of a multilayer wiring board 2 is surrounded by a shield film 6 coating a surface of a sealing-resin layer 4, a plurality of metallic pins 5a arranged in the sealing-resin layer 4 so as to surround the component 3c, an outer electrode 8c formed on a bottom surface 20b of the multilayer wiring board 2 so as to be located at a position that overlaps with the component 3c when viewed in a direction perpendicular to the top surface 20a of the multilayer wiring board 2, and a plurality of connection conductors (via conductors 10b and pad electrodes 11) connecting the metallic pins 5a and the outer electrode 8c to one another.