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公开(公告)号:US20140264383A1
公开(公告)日:2014-09-18
申请号:US14213452
申请日:2014-03-14
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Ryoichi KAJIWARA , Takuya NAKAJO , Katsuo ARAI , Yuichi YATO , Hiroi OKA , Hiroshi HOZOJI
CPC classification number: H01L23/49 , H01L21/50 , H01L23/293 , H01L23/295 , H01L23/3107 , H01L23/3192 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L23/49582 , H01L23/562 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/92 , H01L29/1608 , H01L29/2003 , H01L2224/0381 , H01L2224/04042 , H01L2224/05073 , H01L2224/05082 , H01L2224/05155 , H01L2224/05166 , H01L2224/05552 , H01L2224/05553 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/0603 , H01L2224/291 , H01L2224/29111 , H01L2224/29118 , H01L2224/29139 , H01L2224/29144 , H01L2224/29294 , H01L2224/29439 , H01L2224/2949 , H01L2224/3011 , H01L2224/3201 , H01L2224/32013 , H01L2224/32058 , H01L2224/32059 , H01L2224/32245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45147 , H01L2224/45155 , H01L2224/45565 , H01L2224/45616 , H01L2224/45639 , H01L2224/45644 , H01L2224/45664 , H01L2224/48247 , H01L2224/48472 , H01L2224/48724 , H01L2224/48739 , H01L2224/48744 , H01L2224/48755 , H01L2224/48824 , H01L2224/48839 , H01L2224/48844 , H01L2224/48855 , H01L2224/48997 , H01L2224/4903 , H01L2224/49111 , H01L2224/73265 , H01L2224/83055 , H01L2224/83192 , H01L2224/83194 , H01L2224/83439 , H01L2224/83801 , H01L2224/8384 , H01L2224/8392 , H01L2224/83951 , H01L2224/85205 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2224/8592 , H01L2224/85951 , H01L2224/92 , H01L2224/92247 , H01L2924/00011 , H01L2924/10272 , H01L2924/15747 , H01L2924/181 , H01L2924/19107 , H01L2924/3512 , H01L2924/00014 , H01L2924/06 , H01L2924/00012 , H01L2224/85 , H01L2224/83 , H01L2924/01013 , H01L2924/01051 , H01L2924/01047 , H01L2924/01029 , H01L2924/0105 , H01L2924/014 , H01L2924/00 , H01L2224/83205
Abstract: A semiconductor device includes a die pad, an SiC chip mounted on the die pad, a porous first sintered Ag layer bonding the die pad and the SiC chip, and a reinforcing resin portion covering a surface of the first sintered Ag layer and formed in a fillet shape. The semiconductor device further includes a source lead electrically connected to a source electrode of the SiC chip, a gate lead electrically connected to a gate electrode, a drain lead electrically connected to a drain electrode, and a sealing body which covers the SiC chip, the first sintered Ag layer, and a part of the die pad, and the reinforcing resin portion covers a part of a side surface of the SiC chip.
Abstract translation: 半导体器件包括芯片焊盘,安装在芯片焊盘上的SiC芯片,接合芯片焊盘和SiC芯片的多孔第一烧结Ag层,以及覆盖第一烧结Ag层表面的增强树脂部分, 圆角形状。 半导体器件还包括电连接到SiC芯片的源电极的源极引线,电连接到栅电极的栅极引线,电连接到漏电极的漏极引线和覆盖SiC芯片的密封体, 第一烧结Ag层和芯片焊盘的一部分,并且增强树脂部分覆盖SiC芯片的侧表面的一部分。