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1.发明授权公开(公告)号：US08647974B2
公开(公告)日：2014-02-11
申请号：US13072554
申请日：2011-03-25
申请人： Roden R. Topacio , Michael Z. Su , Neil McLellan
发明人： Roden R. Topacio , Michael Z. Su , Neil McLellan
CPC分类号： H01L24/05 , H01L23/3192 , H01L23/562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/02233 , H01L2224/02235 , H01L2224/02255 , H01L2224/0401 , H01L2224/05022 , H01L2224/05155 , H01L2224/05166 , H01L2224/05552 , H01L2224/05555 , H01L2224/05556 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/1132 , H01L2224/1146 , H01L2224/13111 , H01L2224/73204 , H01L2924/01322 , H01L2924/00014 , H01L2924/01023 , H01L2924/01082 , H01L2924/00012 , H01L2924/01047 , H01L2924/01029
摘要： Various semiconductor chip input/output structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip that has a first conductor pad and a passivation structure. A second conductor pad is fabricated around but not in physical contact with the first conductor pad to leave a gap. The second conductor pad is adapted to protect a portion of the passivation structure.
摘要翻译： 公开了各种半导体芯片输入/输出结构及其制造方法。 一方面，提供一种制造方法，其包括提供具有第一导体焊盘和钝化结构的半导体芯片。 围绕第二导体焊盘制造第二导体焊盘而不与第一导体焊盘物理接触以留下间隙。 第二导体焊盘适于保护钝化结构的一部分。
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公开(公告)号：US20120241985A1
公开(公告)日：2012-09-27
申请号：US13072554
申请日：2011-03-25
申请人： Roden R. Topacio , Michael Z. Su , Neil McLellan
发明人： Roden R. Topacio , Michael Z. Su , Neil McLellan
IPC分类号： H01L23/488 , H01L21/58 , H01L21/28
CPC分类号： H01L24/05 , H01L23/3192 , H01L23/562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/02233 , H01L2224/02235 , H01L2224/02255 , H01L2224/0401 , H01L2224/05022 , H01L2224/05155 , H01L2224/05166 , H01L2224/05552 , H01L2224/05555 , H01L2224/05556 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/1132 , H01L2224/1146 , H01L2224/13111 , H01L2224/73204 , H01L2924/01322 , H01L2924/00014 , H01L2924/01023 , H01L2924/01082 , H01L2924/00012 , H01L2924/01047 , H01L2924/01029
摘要： Various semiconductor chip input/output structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip that has a first conductor pad and a passivation structure. A second conductor pad is fabricated around but not in physical contact with the first conductor pad to leave a gap. The second conductor pad is adapted to protect a portion of the passivation structure.
摘要翻译： 公开了各种半导体芯片输入/输出结构及其制造方法。 一方面，提供一种制造方法，其包括提供具有第一导体焊盘和钝化结构的半导体芯片。 围绕第二导体焊盘制造第二导体焊盘而不与第一导体焊盘物理接触以留下间隙。 第二导体焊盘适于保护钝化结构的一部分。
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公开(公告)号：US08294266B2
公开(公告)日：2012-10-23
申请号：US13027076
申请日：2011-02-14
CPC分类号： H01L24/11 , H01L23/3171 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2224/05073 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/10126 , H01L2224/1132 , H01L2224/1147 , H01L2224/13007 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/1411 , H01L2924/0001 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01059 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/12044 , H01L2924/14 , H01L2924/30107 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： Various semiconductor die conductor structures and methods of fabricating the same are provided. In one aspect, a method of manufacturing is provided that includes forming a conductor structure on a conductor pad of a semiconductor die. The conductor layer has a surface. A polymeric layer is formed on the surface of the conductor layer while a portion of the surface is left exposed. A solder structure is formed on the exposed portion of the surface and a portion of the polymeric layer.
摘要翻译： 提供各种半导体管芯导体结构及其制造方法。 一方面，提供一种制造方法，其包括在半导体管芯的导体焊盘上形成导体结构。 导体层具有表面。 在导体层的表面上形成聚合物层，同时使表面的一部分露出。 在表面的暴露部分和聚合物层的一部分上形成焊料结构。
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公开(公告)号：US20120012987A1
公开(公告)日：2012-01-19
申请号：US13247145
申请日：2011-09-28
申请人： Roden R. Topacio , Neil McLellan
发明人： Roden R. Topacio , Neil McLellan
IPC分类号： H01L21/311 , H01L29/06 , H01L21/28
CPC分类号： H01L23/49811 , H01L21/563 , H01L23/3171 , H01L23/3192 , H01L24/13 , H01L24/16 , H01L2224/0401 , H01L2224/05567 , H01L2224/1132 , H01L2224/11849 , H01L2224/13022 , H01L2224/13111 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/00014 , H01L2924/0002 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/3025 , H01L2924/01082 , H01L2924/01047 , H01L2924/01029 , H01L2924/00 , H01L2224/05552
摘要： Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend through to the side. A second opening is formed in the insulating layer that exposes a portion of the side.
摘要翻译： 公开了各种半导体芯片及其制造方法。 一方面，提供一种制造方法，其包括在施加到半导体芯片侧的绝缘层中形成第一开口。 第一个开口没有延伸到侧面。 在暴露一部分侧面的绝缘层中形成第二开口。
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公开(公告)号：US07994044B2
公开(公告)日：2011-08-09
申请号：US12553336
申请日：2009-09-03
申请人： Roden R. Topacio , Neil McLellan
发明人： Roden R. Topacio , Neil McLellan
CPC分类号： H01L24/05 , H01L24/03 , H01L24/16 , H01L2224/0401 , H01L2224/05551 , H01L2224/05552 , H01L2224/05599 , H01L2224/13012 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/00012 , H01L2924/00
摘要： Methods and apparatus to inhibit cracks and delaminations in a semiconductor chip solder bump are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first dielectric layer over a first conductor structure of a semiconductor chip and forming a first opening in the first dielectric layer to expose at least a portion of the conductor structure. The first opening defines an interior wall that includes plural protrusions. A solder structure is coupled to the first conductor structure such that a portion of the solder structure is positioned in the first opening.
摘要翻译： 公开了抑制半导体芯片焊料凸块中的裂纹和分层的方法和装置。 一方面，提供了一种制造方法，其包括在半导体芯片的第一导体结构上方形成第一电介质层，并在第一电介质层中形成第一开口以露出至少一部分导体结构。 第一开口限定包括多个突起的内壁。 焊料结构耦合到第一导体结构，使得焊料结构的一部分位于第一开口中。
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公开(公告)号：US07906424B2
公开(公告)日：2011-03-15
申请号：US11832486
申请日：2007-08-01
CPC分类号： H01L24/11 , H01L23/3171 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2224/05073 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/10126 , H01L2224/1132 , H01L2224/1147 , H01L2224/13007 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/1411 , H01L2924/0001 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01059 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/12044 , H01L2924/14 , H01L2924/30107 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： Various semiconductor die conductor structures and methods of fabricating the same are provided. In one aspect, a method of manufacturing is provided that includes forming a conductor structure on a conductor pad of a semiconductor die. The conductor layer has a surface. A polymeric layer is formed on the surface of the conductor layer while a portion of the surface is left exposed. A solder structure is formed on the exposed portion of the surface and a portion of the polymeric layer.
摘要翻译： 提供各种半导体管芯导体结构及其制造方法。 一方面，提供一种制造方法，其包括在半导体管芯的导体焊盘上形成导体结构。 导体层具有表面。 在导体层的表面上形成聚合物层，同时使表面的一部分露出。 在表面的暴露部分和聚合物层的一部分上形成焊料结构。
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公开(公告)号：US20130113084A1
公开(公告)日：2013-05-09
申请号：US13289761
申请日：2011-11-04
申请人： Roden R. Topacio , Neil McLellan , Yip Seng Low , Jianguo Li
发明人： Roden R. Topacio , Neil McLellan , Yip Seng Low , Jianguo Li
IPC分类号： H01L23/498 , H01L21/56
CPC分类号： H01L21/486 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/6836 , H01L23/147 , H01L23/3121 , H01L23/3128 , H01L23/49827 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/16145 , H01L2224/16225 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2924/01029 , H01L2924/01322 , H01L2924/12042 , H01L2924/1433 , H01L2924/1434 , H01L2924/15311 , H01L2924/157 , H01L2924/18161 , H01L2224/81 , H01L2924/00
摘要： Various semiconductor substrates and methods of processing the same are disclosed. In one aspect, a method of manufacturing is provided that includes mounting a first semiconductor chip on a side of a first substrate. The first substrate has at least one thru-silicon-via. An insulating layer is molded on the side of the first substrate. The insulating layer provides a support structure to enable handling of the first substrate.
摘要翻译： 公开了各种半导体衬底及其处理方法。 一方面，提供了一种制造方法，其包括将第一半导体芯片安装在第一基板的一侧上。 第一衬底具有至少一个贯通硅通孔。 在第一基板的侧面上模制绝缘层。 绝缘层提供支撑结构以能够处理第一基板。
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公开(公告)号：US20130049190A1
公开(公告)日：2013-02-28
申请号：US13221517
申请日：2011-08-30
申请人： Roden R. Topacio , Neil McLellan
发明人： Roden R. Topacio , Neil McLellan
IPC分类号： H01L23/488 , H01L21/58 , H01L21/283
CPC分类号： H01L24/11 , H01L23/3192 , H01L23/49816 , H01L23/49866 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0345 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/03614 , H01L2224/0362 , H01L2224/03622 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/05018 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05558 , H01L2224/05567 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/10126 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/115 , H01L2224/11502 , H01L2224/11849 , H01L2224/11912 , H01L2224/13007 , H01L2224/13022 , H01L2224/13026 , H01L2224/13111 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01029 , H01L2924/0105 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/06 , H01L2924/01023 , H01L2924/01074 , H01L2924/01047 , H01L2924/01082 , H01L2924/00 , H01L2224/05552
摘要： Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes depositing a layer of a first metallic material on a semiconductor chip. The first layer has a first physical quantity. A layer of a second metallic material is deposited on the layer of the first metallic material. The second layer has a second physical quantity. The first and second layers are reflowed to form a solder structure with a desired ratio of the first metallic material to the second metallic material.
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公开(公告)号：US09318457B2
公开(公告)日：2016-04-19
申请号：US14818621
申请日：2015-08-05
申请人： Roden R. Topacio , Neil McLellan
发明人： Roden R. Topacio , Neil McLellan
IPC分类号： H01L23/498 , H01L23/00 , H01L23/31
CPC分类号： H01L24/11 , H01L23/3192 , H01L23/49816 , H01L23/49866 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0345 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/03614 , H01L2224/0362 , H01L2224/03622 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/05018 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05558 , H01L2224/05567 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/10126 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/115 , H01L2224/11502 , H01L2224/11849 , H01L2224/11912 , H01L2224/13007 , H01L2224/13022 , H01L2224/13026 , H01L2224/13111 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01029 , H01L2924/0105 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/06 , H01L2924/01023 , H01L2924/01074 , H01L2924/01047 , H01L2924/01082 , H01L2924/00 , H01L2224/05552
摘要： Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes depositing a layer of a first metallic material on a semiconductor chip. The first layer has a first physical quantity. A layer of a second metallic material is deposited on the layer of the first metallic material. The second layer has a second physical quantity. The first and second layers are reflowed to form a solder structure with a desired ratio of the first metallic material to the second metallic material.
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公开(公告)号：US20150340334A1
公开(公告)日：2015-11-26
申请号：US14818621
申请日：2015-08-05
申请人： Roden R. Topacio , Neil McLellan
发明人： Roden R. Topacio , Neil McLellan
IPC分类号： H01L23/00 , H01L23/498
CPC分类号： H01L24/11 , H01L23/3192 , H01L23/49816 , H01L23/49866 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0345 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/03614 , H01L2224/0362 , H01L2224/03622 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/05018 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05558 , H01L2224/05567 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/10126 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/115 , H01L2224/11502 , H01L2224/11849 , H01L2224/11912 , H01L2224/13007 , H01L2224/13022 , H01L2224/13026 , H01L2224/13111 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01029 , H01L2924/0105 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/06 , H01L2924/01023 , H01L2924/01074 , H01L2924/01047 , H01L2924/01082 , H01L2924/00 , H01L2224/05552
摘要： Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes depositing a layer of a first metallic material on a semiconductor chip. The first layer has a first physical quantity. A layer of a second metallic material is deposited on the layer of the first metallic material. The second layer has a second physical quantity. The first and second layers are reflowed to form a solder structure with a desired ratio of the first metallic material to the second metallic material.
摘要翻译： 公开了各种半导体芯片焊料凸块和底部金属化（UBM）结构及其制造方法。 一方面，提供一种方法，其包括在半导体芯片上沉积第一金属材料层。 第一层具有第一物理量。 第二金属材料层沉积在第一金属材料的层上。 第二层具有第二物理量。 第一层和第二层被回流以形成具有所需比例的第一金属材料与第二金属材料的焊料结构。
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