Abstract:
A circuit board includes an insulating part including insulating layers, metal layers disposed on the insulating layers, vias each passing through at least one insulating layer among the insulating layers and connecting together at least two metal layers among the metal layers; a first thermally conductive structure including a thermally conductive material, at least a part of the thermally conductive structure being inserted into the insulating part, a first via having one surface contacting the first thermally conductive structure, a first metal pattern contacting another surface of the first via, a first bonding member connected to the first metal pattern, and pads to which a first electronic component is connected on an outermost surface of a metal layer disposed on an outermost surface of the insulating part, the pads being at least in a first region and a second region having a higher temperature than the first region.
Abstract:
A circuit board includes a first metal layer having a first via hole penetrating through an upper surface of the first metal layer and a lower surface thereof; a plated part provided to a surface of the first via hole; an insulating film provided to a surface of the plated part; and a first via formed by providing a conductive material to at least a portion of a region surrounded by an outer surface of the insulating film. Since the circuit board may implement fineness of the first via while forming the first metal layer to be thicker than the related art, warpage may be decreased and heat dissipation performance may be improved.
Abstract:
An embedded board, a printed circuit board, and a method of manufacturing the same. According to one embodiment of the present invention, an embedded board includes: a core insulating layer formed with a first cavity; a first circuit layer formed on one surface of the core insulating layer; a build-up insulating layer formed on one surface of the core insulating layer and formed with a second cavity extending from the first cavity; devices disposed in the first cavity and the second cavity and formed to protrude from one surface of the core insulating layer; a first insulating layer formed on the other surface of the core insulating layer and filling the first cavity and the second cavity; and a build-up circuit layer and a via formed in the build-up insulating layer.
Abstract:
There is provided a printed circuit board including: a core layer having a cavity formed therein; a heat radiation body included in the cavity; an insulating layer provided on an upper surface and a lower surface of the core layer; and a heat dissipating via penetrating through the insulating layer to be in contact with the heat radiation body and dissipating heat externally, wherein the heat radiation body includes an insulating plate, a first metal block formed on an upper surface of the insulating plate, and a second metal block formed on a lower surface of the insulating plate.
Abstract:
Disclosed herein is a printed circuit board capable of implementing slimness by decreasing the number of entire layers through an asymmetrical build-up structure in which an electric device is embedded, the printed circuit board including: a core layer including a cavity formed therein so that an electric device is embedded and a circuit pattern and a pad formed on upper and lower surfaces thereof; a through via formed in the core layer so as to connect the upper and the lower pads of the core layer to each other; a plurality of insulating layers built-up on the core layer and including a plurality of vias so as to be electrically connected to the through via; and a solder resist layer applied onto a lower portion of the core layer so that a lower surface of the through via is partially exposed.
Abstract:
The present invention relates to a chip embedded substrate, which includes a substrate formed by alternately stacking an insulation layer and a circuit layer and an embedded chip equipped with a connection terminal and mounted inside the substrate, wherein the connection terminal is protruded from the insulation layer placed on the outermost layer of the substrate, and a connection surface to be connected to an electronic component is exposed to the outside.