公开(公告)号：US20190198376A1

公开(公告)日：2019-06-27

申请号：US16293201

申请日：2019-03-05

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE ,  James P. LETTERMAN, JR.

IPC: H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L21/6835 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/49537 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/95 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11418 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/116 ,  H01L2224/119 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/1319 ,  H01L2224/16245 ,  H01L2224/16258 ,  H01L2224/27003 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27418 ,  H01L2224/2746 ,  H01L2224/27462 ,  H01L2224/276 ,  H01L2224/279 ,  H01L2224/2908 ,  H01L2224/291 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/32258 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/4811 ,  H01L2224/48111 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75755 ,  H01L2224/75756 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/81856 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83805 ,  H01L2224/83815 ,  H01L2224/83856 ,  H01L2224/85005 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92147 ,  H01L2224/92227 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/27 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/207

Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

公开(公告)号：US20180145013A1

公开(公告)日：2018-05-24

申请号：US15357680

申请日：2016-11-21

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE ,  James P. LETTERMAN, JR.

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/495 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/49805 ,  H01L21/4842 ,  H01L21/561 ,  H01L21/568 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L24/97 ,  H01L2021/60015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/85001 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.

公开(公告)号：US20190198374A1

公开(公告)日：2019-06-27

申请号：US16293099

申请日：2019-03-05

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE ,  James P. LETTERMAN, JR.

IPC: H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L21/6835 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/49537 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/95 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11418 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/116 ,  H01L2224/119 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/1319 ,  H01L2224/16245 ,  H01L2224/16258 ,  H01L2224/27003 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27418 ,  H01L2224/2746 ,  H01L2224/27462 ,  H01L2224/276 ,  H01L2224/279 ,  H01L2224/2908 ,  H01L2224/291 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/32258 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/4811 ,  H01L2224/48111 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75755 ,  H01L2224/75756 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/81856 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83805 ,  H01L2224/83815 ,  H01L2224/83856 ,  H01L2224/85005 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92147 ,  H01L2224/92227 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/27 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/207

Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

公开(公告)号：US20190088579A1

公开(公告)日：2019-03-21

申请号：US16194734

申请日：2018-11-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE ,  James P. LETTERMAN, JR.

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495 ,  H01L21/60

Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.

公开(公告)号：US20170133302A1

公开(公告)日：2017-05-11

申请号：US15415504

申请日：2017-01-25

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE ,  Soon Wei WANG ,  Chee Hiong CHEW

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/49541 ,  H01L21/4828 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/05014 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48157 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/17747 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A leadframe includes a frame, a die pad, a contact including a flank adjacent to the frame, a first tie bar between the frame and die pad, and a second tie bar between the die pad and contact. The leadframe is disposed over a carrier. A semiconductor die is disposed over the die pad. An encapsulant is deposited over the leadframe and semiconductor die including between the carrier and half-etched portions of the leadframe. A first trench is formed in the encapsulant to remove a portion of the frame and expose the flank of the contact. A conductive layer is formed over the flank by electroplating. A second trench is formed in the encapsulant through the second tie bar after forming the conductive layer.

公开(公告)号：US20190013249A1

公开(公告)日：2019-01-10

申请号：US16128353

申请日：2018-09-11

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE ,  James P. LETTERMAN, JR.

IPC: H01L21/66 ,  H01L23/00 ,  H01L21/268

Abstract: A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.

公开(公告)号：US20190002173A1

公开(公告)日：2019-01-03

申请号：US16126614

申请日：2018-09-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE

IPC: B65D73/02

CPC classification number: B65D73/02

Abstract: A carrier tape system, in some embodiments, comprises: a tape; a series of index holes along a length of said tape; a series of pockets along said length; a first series of standoff units along said length; and a second series of standoff units along said length, wherein the series of pockets is positioned between the first series of standoff units and the second series of standoff units, wherein the standoff units create a clearance space between the bottom surfaces of said pockets and the tape when said tape is wound on a reel.

公开(公告)号：US20170334625A1

公开(公告)日：2017-11-23

申请号：US15158424

申请日：2016-05-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE

IPC: B65D73/02

CPC classification number: B65D73/02

Abstract: A carrier tape system, in some embodiments, comprises: a tape; a series of index holes along a length of said tape; a series of pockets along said length; a first series of standoff units along said length; and a second series of standoff units along said length, wherein the series of pockets is positioned between the first series of standoff units and the second series of standoff units, wherein the standoff units create a clearance space between the bottom surfaces of said pockets and the tape when said tape is wound on a reel.

公开(公告)号：US20250149412A1

公开(公告)日：2025-05-08

申请号：US19020459

申请日：2025-01-14

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE ,  Soon Wei WANG ,  Chee Hiong CHEW

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A leadframe includes a frame, a die pad, a contact including a flank adjacent to the frame, a first tie bar between the frame and die pad, and a second tie bar between the die pad and contact. The leadframe is disposed over a carrier. A semiconductor die is disposed over the die pad. An encapsulant is deposited over the leadframe and semiconductor die including between the carrier and half-etched portions of the leadframe. A first trench is formed in the encapsulant to remove a portion of the frame and expose the flank of the contact. A conductive layer is formed over the flank by electroplating. A second trench is formed in the encapsulant through the second tie bar after forming the conductive layer.

公开(公告)号：US20190393127A1

公开(公告)日：2019-12-26

申请号：US16013397

申请日：2018-06-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. TRUHITTE

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/31

Abstract: Implementations of semiconductor packages may include: a heat sink including a plurality of projections extending from a first side of the heat sink and a die having a first side and a second side. The first side of the die may be coupled directly to a second side of the heat sink through a thermally conductive and electrically isolating material. The package may also include one or more interconnects including a solderable metal. The one or more interconnects may be coupled to the second side of the die. The package may also include a molding compound around the die and the one or more interconnects. The molding compound may be directly coupled to the second side of the heat sink.