公开(公告)号：US20160336299A1

公开(公告)日：2016-11-17

申请号：US15218847

申请日：2016-07-25

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Pandi C. Marimuthu ,  Sheila Marie L. Alvarez ,  Yaojian Lin ,  Jose A. Caparas ,  Yang Kern Jonathan Tan

IPC: H01L25/065 ,  H01L21/311 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/2633 ,  H01L21/311 ,  H01L21/486 ,  H01L21/56 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L25/105 ,  H01L2224/02311 ,  H01L2224/02379 ,  H01L2224/0558 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24227 ,  H01L2224/25171 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49174 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/821 ,  H01L2224/94 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1811 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/03

Abstract: A semiconductor device has a substrate and semiconductor die disposed over a first surface of the substrate. A wire stud is attached to the first surface of the substrate. The wire stud includes a base portion and stem portion. A bonding pad is formed over a second surface of the substrate. An encapsulant is deposited over the substrate, semiconductor die, and wire stud. A portion of the encapsulant is removed by LDA to expose the wire stud. A portion of the encapsulant is removed by LDA to expose the substrate. An interconnect structure is formed over the encapsulant and electrically connected to the wire stud and semiconductor die. A bump is formed over the interconnect structure. A semiconductor package is disposed over the encapsulant and electrically connected to the substrate. A discrete semiconductor device is disposed over the encapsulant and electrically connected to the substrate.

Abstract translation: 半导体器件具有设置在衬底的第一表面上的衬底和半导体管芯。 线柱附接到基底的第一表面。 线螺柱包括基部和杆部。 在衬底的第二表面上形成焊盘。 密封剂沉积在衬底，半导体管芯和线螺柱上。 密封剂的一部分被LDA去除以暴露线螺柱。 通过LDA去除一部分密封剂以暴露基底。 互连结构形成在密封剂上并电连接到线芯和半导体管芯。 在互连结构上形成凸点。 半导体封装设置在密封剂上并电连接到衬底。 分立半导体器件设置在密封剂上并电连接到衬底。

公开(公告)号：US09679769B1

公开(公告)日：2017-06-13

申请号：US15199751

申请日：2016-06-30

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Zigmund Ramirez Camacho ,  Bartholomew Liao Chung Foh ,  Sheila Marie L. Alvarez ,  Dao Nguyen Phu Cuong ,  HeeJo Chi

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/12 ,  H01L23/485 ,  H01L21/033 ,  H01L23/522 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L21/0335 ,  H01L21/485 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/568 ,  H01L21/76879 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53233 ,  H01L23/53242 ,  H01L24/03 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05026 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/83005 ,  H01L2224/85005 ,  H01L2224/85447 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/37001 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

Abstract: A system and method of manufacture of an integrated circuit packaging system includes: a photoimagable dielectric layer having a trace opening for exposing the carrier; a trace within the trace opening; an inner solder resist layer directly on the photoimagable dielectric layer and the trace, the inner solder resist layer having a bond pad opening for exposing the trace; an integrated circuit over the inner solder resist layer, the integrated circuit electrically connected to the trace through the bond pad opening; an encapsulation directly on the integrated circuit and the inner solder resist layer; and an external interconnect electrically coupled to the trace and the integrated circuit.

公开(公告)号：US10446523B2

公开(公告)日：2019-10-15

申请号：US15218847

申请日：2016-07-25

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Pandi C. Marimuthu ,  Sheila Marie L. Alvarez ,  Yaojian Lin ,  Jose A. Caparas ,  Yang Kern Jonathan Tan

IPC: H01L21/00 ,  H01L25/065 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538 ,  H01L25/10 ,  H01L21/311 ,  H01L21/48 ,  H01L23/31 ,  H01L21/263

Abstract: A semiconductor device has a substrate and semiconductor die disposed over a first surface of the substrate. A wire stud is attached to the first surface of the substrate. The wire stud includes a base portion and stem portion. A bonding pad is formed over a second surface of the substrate. An encapsulant is deposited over the substrate, semiconductor die, and wire stud. A portion of the encapsulant is removed by LDA to expose the wire stud. A portion of the encapsulant is removed by LDA to expose the substrate. An interconnect structure is formed over the encapsulant and electrically connected to the wire stud and semiconductor die. A bump is formed over the interconnect structure. A semiconductor package is disposed over the encapsulant and electrically connected to the substrate. A discrete semiconductor device is disposed over the encapsulant and electrically connected to the substrate.