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    System And Method For Dynamically Combining Images To Display Textual Content In The Form Of An Image
    3.
    发明申请
    System And Method For Dynamically Combining Images To Display Textual Content In The Form Of An Image 审中-公开
    用于动态组合图像以以图像的形式显示文本内容的系统和方法

    公开(公告)号：US20160110900A1

    公开(公告)日：2016-04-21

    申请号：US14518177

    申请日：2014-10-20

    申请人： Mateen Moosa ,  Marin Petkov ,  Andrew Lindsay ,  Brian D. Young

    发明人： Mateen Moosa ,  Marin Petkov ,  Andrew Lindsay ,  Brian D. Young

    IPC分类号： G06T11/60

    CPC分类号： G06T11/203

    摘要： The system and method for providing a composite image corresponding to a textual message. The composite image is generated by receiving a text message, parsing out styling information, using predetermined size and spacing for combinations of typographical characters in combinations with a graphics editing routine which allows for the recognition and translation of text into a series of images which can then be presented to a viewer as a composite image.

    摘要翻译： 用于提供对应于文本消息的合成图像的系统和方法。 合成图像是通过接收文本消息，解析出样式信息，使用预定大小和间隔将印刷字符的组合与图形编辑程序组合来生成的，该图形编辑程序允许将文本识别和翻译成一系列图像， 作为合成图像呈现给观看者。

    Signal driver having selectable aggregate slew rate to compensate for varying process, voltage or temperature conditions
    4.
    发明授权
    Signal driver having selectable aggregate slew rate to compensate for varying process, voltage or temperature conditions 有权
    信号驱动器具有可选择的总压摆率以补偿变化的工艺，电压或温度条件

    公开(公告)号：US07598772B2

    公开(公告)日：2009-10-06

    申请号：US11773476

    申请日：2007-07-05

    申请人： Brian D. Young

    发明人： Brian D. Young

    IPC分类号： H03K19/094 ,  H03K19/0175 ,  H03B1/00

    CPC分类号： H03K5/1534 ,  H03K19/00369 ,  H03K19/017509

    摘要： A signal driver having a selectable aggregate slew rate, a method of driving a signal driver and a signal driver incorporating the driver or the method. The driver includes plural partial drivers configured to output signals based on time constants established by corresponding plural time-delay networks associated therewith. The signal driver further includes a slew rate selector coupled to the plural time-delay networks and configured to provide a common signal thereto to cause the plural time-delay networks to achieve target time constants, the target time constants causing the output signals to be generated such that the signal driver achieves the selectable aggregate slew rate.

    摘要翻译： 具有可选择的总体压摆率的信号驱动器，驱动信号驱动器的方法和结合驱动器的信号驱动器或方法。 驱动器包括多个部分驱动器，配置为基于由相关联的多个时间延迟网络建立的时间常数来输出信号。 信号驱动器还包括耦合到多个时间延迟网络并被配置为提供公共信号的转换速率选择器，以使得多个延时网络实现目标时间常数，导致产生输出信号的目标时间常数 使得信号驱动器实现可选择的总体转换速率。

    Signal Driver Having Selectable Aggregate Slew Rate to Compensate for Varying Process, Voltage or Temperature Conditions
    7.
    发明申请
    Signal Driver Having Selectable Aggregate Slew Rate to Compensate for Varying Process, Voltage or Temperature Conditions 有权
    信号驱动器具有可选择的总体压摆率以补偿不同的工艺，电压或温度条件

    公开(公告)号：US20080157843A1

    公开(公告)日：2008-07-03

    申请号：US11773476

    申请日：2007-07-05

    申请人： Brian D. Young

    发明人： Brian D. Young

    IPC分类号： H03H11/26

    CPC分类号： H03K5/1534 ,  H03K19/00369 ,  H03K19/017509

    摘要： A signal driver having a selectable aggregate slew rate, a method of driving a signal driver and a signal driver incorporating the driver or the method. The driver includes plural partial drivers configured to output signals based on time constants established by corresponding plural time-delay networks associated therewith. The signal driver further includes a slew rate selector coupled to the plural time-delay networks and configured to provide a common signal thereto to cause the plural time-delay networks to achieve target time constants, the target time constants causing the output signals to be generated such that the signal driver achieves the selectable aggregate slew rate.

    摘要翻译： 具有可选择的总体压摆率的信号驱动器，驱动信号驱动器的方法和结合驱动器的信号驱动器或方法。 驱动器包括多个部分驱动器，配置为基于由相关联的多个时间延迟网络建立的时间常数来输出信号。 信号驱动器还包括耦合到多个时间延迟网络并被配置为提供公共信号的转换速率选择器，以使得多个延时网络实现目标时间常数，导致产生输出信号的目标时间常数 使得信号驱动器实现可选择的总体转换速率。

    Layered planar transmission lines
    8.
    发明授权
    Layered planar transmission lines 失效
    分层平面传输线

    公开(公告)号：US5408053A

    公开(公告)日：1995-04-18

    申请号：US160015

    申请日：1993-11-30

    申请人： Brian D. Young

    发明人： Brian D. Young

    IPC分类号： H01P3/08 ,  H05K1/02 ,  H05K1/03 ,  H05K3/40 ,  H05K3/46 ,  H05K1/00

    CPC分类号： H01P3/088 ,  H05K1/0219 ,  H05K1/0265 ,  H05K1/0306 ,  H05K2201/09618 ,  H05K2201/09672 ,  H05K2201/0979 ,  H05K3/4053 ,  H05K3/4611 ,  H05K3/4629

    摘要： A transmission line structure including a central signal conductor stack of elongated conductive strips separated from each other by contiguous dielectric layers of a unitized multilayer circuit structure, a first ground conductor stack of elongated conductive strips separated from each other by contiguous dielectric layers and laterally separated from one side of the central signal conductor stack, and a second ground conductor stack of elongated conductive strips separated from each other by contiguous dielectric layers and laterally separated from another side of the central signal conductor stack such that the central conductor stack is laterally between the first and second ground conductor stacks.

    摘要翻译： 传输线结构，其包括由单位化多层电路结构的连续电介质层彼此分离的细长导电条的中心信号导体叠层，细长导电条的第一接地导体堆叠，其由连续的电介质层彼此分离并且横向分离 中心信号导体叠层的一侧和细长导电条的第二接地导体叠层，它们由连续的电介质层彼此分开，并与中心信号导体堆叠的另一侧横向分离，使得中心导体堆叠横向位于第一 和第二接地导体堆叠。

    TRACE ROUTING WITHIN A SEMICONDUCTOR PACKAGE SUBSTRATE
    10.
    发明申请
    TRACE ROUTING WITHIN A SEMICONDUCTOR PACKAGE SUBSTRATE 有权
    在半导体封装衬底中跟踪布线

    公开(公告)号：US20140131866A1

    公开(公告)日：2014-05-15

    申请号：US13675008

    申请日：2012-11-13

    申请人： Brian D. Young

    发明人： Brian D. Young

    IPC分类号： H01L23/48 ,  H01L21/768

    CPC分类号： H01L23/49822 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/15311

    摘要： A semiconductor device includes a substrate configured with a plurality of conductive traces. The traces are configured to electrically couple to an integrated circuit (IC) die and at least one of the plurality of conductive traces includes first electrically conductive portions in a first electrically conductive layer of the substrate, second electrically conductive portions in a second electrically conductive layer of the substrate, and first electrically conductive connections between the first electrically conductive portions and the second electrically conductive portions. The first and second electrically conductive portions and the first electrically conductive connections form a continuous path along at least a portion of the at least one of the conductive traces. Time delay of conducting a signal along the at least one of the conductive traces is within a specified amount of time of time delay of conducting a signal along another one of the plurality of conductive traces.

    摘要翻译： 半导体器件包括配置有多个导电迹线的衬底。 迹线被配置为电耦合到集成电路（IC）管芯，并且多个导电迹线中的至少一个导电迹线包括在衬底的第一导电层中的第一导电部分，第二导电层中的第二导电部分 以及第一导电部分和第二导电部分之间的第一导电连接。 第一和第二导电部分和第一导电连接件沿至少一个导电迹线的至少一部分形成连续路径。 沿着至少一个导电迹线传导信号的时间延迟在沿多个导电迹线中的另一个传导信号的指定时间延迟时间内。