公开(公告)号：US20100181584A1

公开(公告)日：2010-07-22

申请号：US12304533

申请日：2006-07-11

申请人： Xiang Gao ,  Hari S. Venugopalan ,  Michael Sackrison ,  Ivan Eliashevich

发明人： Xiang Gao ,  Hari S. Venugopalan ,  Michael Sackrison ,  Ivan Eliashevich

IPC分类号： H01L33/00 ,  H01L31/00

CPC分类号： H01L33/44 ,  H01L33/0079 ,  H01L33/62 ,  H01L33/64 ,  H01L2924/0002 ,  H01L2933/0091 ,  H01L2924/00

摘要： A light emitting device includes a stack of semiconductor layers defining a light emitting pn junction and a dielectric layer disposed over the stack of semiconductor layers. The dielectric layer has a refractive index substantially matching a refractive index of the stack of semiconductor layers. The dielectric layer has a principal surface distal from the stack of semiconductor layers. The distal principal surface includes patterning, roughening, or texturing configured to promote extraction of light generated in the stack of semiconductor layers.

摘要翻译： 发光器件包括限定发光pn结的半导体层的叠层和设置在半导体层堆叠上的电介质层。 电介质层的折射率基本上与半导体层叠层的折射率相匹配。 电介质层具有远离半导体层堆叠的主表面。 远端主表面包括图案化，粗糙化或纹理化，其被配置为促进在半导体层堆叠中产生的光的提取。

公开(公告)号：US20080121902A1

公开(公告)日：2008-05-29

申请号：US11517053

申请日：2006-09-07

申请人： Michael Sackrison ,  Xiang Gao ,  Srinath K. Aanegola ,  Hari S. Venugopalan

发明人： Michael Sackrison ,  Xiang Gao ,  Srinath K. Aanegola ,  Hari S. Venugopalan

IPC分类号： H01L33/00

CPC分类号： H01L25/0756 ,  H01L25/0753 ,  H01L33/0079 ,  H01L2924/0002 ,  H01L2924/00

摘要： A light emitting package includes a support (12, 112, 212) defining a support surface (14). A first light emitting diode chip (20, 120, 220) is secured to the supporting surface and is configured to emit light having a first spectral distribution. A second light emitting diode chip (22, 122, 123, 222) is secured to the first light emitting diode chip. The second light emitting diode chip is configured to emit light having a second spectral distribution different from the first spectral distribution. Optionally, a third light emitting diode chip (223) is disposed on the second light emitting diode chip (222).

摘要翻译： 发光包装包括限定支撑表面（14）的支撑件（12,112,212）。 第一发光二极管芯片（20,120,220）固定到支撑表面并且被配置为发射具有第一光谱分布的光。 第二发光二极管芯片（22,122,123,222）固定到第一发光二极管芯片。 第二发光二极管芯片被配置为发射具有与第一光谱分布不同的第二光谱分布的光。 可选地，第三发光二极管芯片（223）设置在第二发光二极管芯片（222）上。

公开(公告)号：US20080061312A1

公开(公告)日：2008-03-13

申请号：US11519402

申请日：2006-09-12

申请人： Xiang Gao ,  Michael Sackrison ,  Hari S. Venugopalan

发明人： Xiang Gao ,  Michael Sackrison ,  Hari S. Venugopalan

IPC分类号： H01L33/00

CPC分类号： H01L33/62 ,  H01L24/73 ,  H01L33/44 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01S5/02272 ,  H01L2924/00 ,  H01L2224/0401

摘要： A light emitting chip is disposed on a support surface. A plurality of bonding bumps are disposed in a gap between the light emitting chip and the support surface. The plurality of bonding bumps provide at least one electrical power input path to the light emitting chip. An underfill comprising underfill material is disposed in the gap between the light emitting chip and the support surface such that the underfill substantially fills the gap but does not form a fillet extending outside the gap over sidewalls of the light emitting chip. The underfill is configured to provide at least one of (i) mechanical support for the light emitting chip and (ii) a thermal conduction path from the light emitting chip to the support surface.

摘要翻译： 发光芯片设置在支撑表面上。 多个接合凸块设置在发光芯片和支撑表面之间的间隙中。 多个接合凸块提供至少一个电功率输入路径到发光芯片。 包含底部填充材料的底部填充物设置在发光芯片和支撑表面之间的间隙中，使得底部填充物基本上填充间隙，但是不形成在发光芯片的侧壁上方的间隙外延伸的圆角。 底部填充物被配置为提供（i）发光芯片的机械支撑和（ii）从发光芯片到支撑表面的热传导路径中的至少一个。

公开(公告)号：US07843074B2

公开(公告)日：2010-11-30

申请号：US11519402

申请日：2006-09-12

申请人： Xiang Gao ,  Michael Sackrison ,  Hari S. Venugopalan

发明人： Xiang Gao ,  Michael Sackrison ,  Hari S. Venugopalan

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L33/62 ,  H01L24/73 ,  H01L33/44 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01S5/02272 ,  H01L2924/00 ,  H01L2224/0401

摘要： A light emitting chip is disposed on a support surface. A plurality of bonding bumps are disposed in a gap between the light emitting chip and the support surface. The plurality of bonding bumps provide at least one electrical power input path to the light emitting chip. An underfill comprising underfill material is disposed in the gap between the light emitting chip and the support surface such that the underfill substantially fills the gap but does not form a fillet extending outside the gap over sidewalls of the light emitting chip. The underfill is configured to provide at least one of (i) mechanical support for the light emitting chip and (ii) a thermal conduction path from the light emitting chip to the support surface.

摘要翻译： 发光芯片设置在支撑表面上。 多个接合凸块设置在发光芯片和支撑表面之间的间隙中。 多个接合凸块提供至少一个电功率输入路径到发光芯片。 包含底部填充材料的底部填充剂设置在发光芯片和支撑表面之间的间隙中，使得底部填充剂基本上填充间隙，但是不形成在发光芯片的侧壁上延伸到间隙外侧的圆角。 底部填充物被配置为提供（i）发光芯片的机械支撑和（ii）从发光芯片到支撑表面的热传导路径中的至少一个。

公开(公告)号：US07285801B2

公开(公告)日：2007-10-23

申请号：US10817603

申请日：2004-04-02

申请人： Ivan Eliashevich ,  Chris Bohler ,  Bryan S. Shelton ,  Hari S. Venugopalan ,  Xiang Gao

发明人： Ivan Eliashevich ,  Chris Bohler ,  Bryan S. Shelton ,  Hari S. Venugopalan ,  Xiang Gao

IPC分类号： H01L33/00

CPC分类号： H01L27/153 ,  H01L33/20 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

摘要： A light emitting semiconductor device die (10, 110, 210, 310) includes an electrically insulating substrate (12, 112). First and second spatially separated electrodes (60, 62, 260, 262, 360, 362) are disposed on the electrically insulating substrate. The first and second electrodes define an electrical current flow direction directed from the first electrode to the second electrode. A plurality of light emitting diode mesas (30, 130, 130′, 230, 330) are disposed on the substrate between the first and second spatially separated electrodes. Electrical series interconnections (50, 150, 250, 350) are disposed on the substrate between neighboring light emitting diode mesas. Each series interconnection carries electrical current flow between the neighboring mesas in the electrical current flow direction.

摘要翻译： 发光半导体器件管芯（10,110,210,310）包括电绝缘衬底（12,112）。 第一和第二空间分离的电极（60,62,260,262,360,362）设置在电绝缘基板上。 第一和第二电极限定从第一电极指向第二电极的电流流动方向。 多个发光二极管台面（30,130,130'，230,330）设置在第一和第二空间分离的电极之间的衬底上。 在相邻的发光二极管台面之间的基板上设置电气串联互连（50,150,250,350）。 每个串联互连在电流流动方向上在相邻台面之间承载电流。

公开(公告)号：US07125734B2

公开(公告)日：2006-10-24

申请号：US11075974

申请日：2005-03-09

申请人： Michael J. Sackrison ,  Hari S. Venugopalan ,  Xiang Gao

发明人： Michael J. Sackrison ,  Hari S. Venugopalan ,  Xiang Gao

IPC分类号： H01L21/00

CPC分类号： H01L33/22 ,  H01L33/0079 ,  H01L33/62 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： In a method for fabricating a flip-chip light emitting diode device, a submount wafer is populated with a plurality of the light emitting diode dies. Each device die is flip-chip bonded to the submount. Subsequent to the flip-chip bonding, a growth substrate is removed. The entire submount is immersed in the etchant solution, exposed to the light for a prespecified period of time, removed from the solution, dried and diced into a plurality of LEDs. The LEDs are immediately packaged without any further processing.

摘要翻译： 在制造倒装芯片发光二极管装置的方法中，副载荷晶片装有多个发光二极管管芯。 每个器件芯片倒装芯片连接到基座。 在倒装芯片接合之后，去除生长衬底。 将整个底座浸入蚀刻剂溶液中，暴露于预定时间段的光，从溶液中除去，干燥并切成多个LED。 LED立即封装，无需进一步处理。

公开(公告)号：US07385229B2

公开(公告)日：2008-06-10

申请号：US11482362

申请日：2006-07-07

申请人： Hari S. Venugopalan

发明人： Hari S. Venugopalan

IPC分类号： H01L33/00

CPC分类号： H01L33/40 ,  H01L33/32 ,  H01L2224/14 ,  H01L2224/16225

摘要： A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).

摘要翻译： 公开了用于倒装芯片接合的p型触点（30），并且使III族氮化物倒装芯片发光二极管管芯（10）的p型III族氮化物层（28）与接合焊盘（60）电接触 ）。 第一钯层（42）设置在p型III族氮化物层（28）上。 第一钯层（42）通过p型III族氮化物层（28）的天然氧化物扩散以与p型III族氮化物层（28）电接触。 反射银层（44）设置在第一钯层（42）上。 第二钯层（46）设置在银层（44）上。 包括至少两层（50,52,54）的粘合堆叠（48）设置在第二钯层（46）上。 接合堆叠（48）适于将p型层（28）倒装成键合到接合焊盘（60）。

公开(公告)号：US07179670B2

公开(公告)日：2007-02-20

申请号：US10794935

申请日：2004-03-05

申请人： Bryan S. Shelton ,  Sebastien Libon ,  Hari S. Venugopalan ,  Ivan Eliashevich ,  Stanton E. Weaver, Jr. ,  Chen-Lun Hsing Chen ,  Thomas F. Soules ,  Steven LeBoeuf ,  Stephen Arthur

发明人： Bryan S. Shelton ,  Sebastien Libon ,  Hari S. Venugopalan ,  Ivan Eliashevich ,  Stanton E. Weaver, Jr. ,  Chen-Lun Hsing Chen ,  Thomas F. Soules ,  Steven LeBoeuf ,  Stephen Arthur

IPC分类号： H01L21/00

CPC分类号： H01L33/62 ,  H01L24/81 ,  H01L33/38 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1357 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/3003 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/8321 ,  H01L2224/8323 ,  H01L2224/83815 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

摘要： A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).

摘要翻译： 发光二极管（10）具有背面和前侧，具有至少一个n型电极（14）和设置在其上的至少一个p型电极（12），其限定最小电极间隔（d < ）。 接合焊盘层（50）包括至少一个n型接合焊盘（64）和至少一个限定最小接合焊盘间隔（p>焊盘）的p型接合焊盘（62） 大于最小电极分离（d _{电极）。 插入在发光二极管（10）的前侧和接合焊盘层（50）之间的至少一个扇形层（30）包括穿过电介质层的通孔（34,54）的多个导电路径 以在所述至少一个n型电极（14）和所述至少一个n型焊盘（64）之间以及所述至少一个p型电极（12）和所述至少一个p型电极（12）之间提供电连通 一个p型接合焊盘（62）。}

公开(公告)号：US06787435B2

公开(公告)日：2004-09-07

申请号：US10064359

申请日：2002-07-05

申请人： Shawn R. Gibb ,  Robert F. Karlicek ,  Prosanto K. Mukerji ,  Hari S. Venugopalan ,  Ivan Eliashevich

发明人： Shawn R. Gibb ,  Robert F. Karlicek ,  Prosanto K. Mukerji ,  Hari S. Venugopalan ,  Ivan Eliashevich

IPC分类号： H01L2120

CPC分类号： H01L33/40 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

摘要： A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).

摘要翻译： 公开了一种发光元件（24）。 发光二极管（LED）包括具有正面和背面（33,35）的蓝宝石衬底（26）和沉积在蓝宝石衬底的前侧（33）上的多个半导体层（28,30,32） （26）。 半导体层（28,30,32）限定响应于电输入而发光的发光结构。 金属化堆叠（40）包括沉积在蓝宝石衬底（26）的背面（35）上的粘合层（34）和连接到粘合层（34）的可焊接层（38），使得可焊层（ 38）通过粘合层（34）固定到蓝宝石衬底（26）。 设置有LED的支撑结构（42）。 在LED和支撑结构（42）之间布置有焊料接合（44）。 焊接接合（44）将LED固定到支撑结构（42）。

公开(公告)号：US07141828B2

公开(公告)日：2006-11-28

申请号：US10249163

申请日：2003-03-19

申请人： Hari S. Venugopalan

发明人： Hari S. Venugopalan

IPC分类号： H01L33/00

CPC分类号： H01L33/40 ,  H01L33/32 ,  H01L2224/14 ,  H01L2224/16225

摘要： A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).