公开(公告)号：US20100182144A1

公开(公告)日：2010-07-22

申请号：US12376661

申请日：2007-08-06

申请人： Yoshihisa Yamashita ,  Seiichi Nakatani ,  Takashi Ichiryu ,  Fumio Fukushima ,  Kuniaki Kiyosue

发明人： Yoshihisa Yamashita ,  Seiichi Nakatani ,  Takashi Ichiryu ,  Fumio Fukushima ,  Kuniaki Kiyosue

IPC分类号： G08B1/08 ,  G06K19/077 ,  G06K19/06 ,  B32B38/10

CPC分类号： H01Q19/10 ,  G06K19/07749 ,  G06K19/07771 ,  H01Q1/2208 ,  H01Q17/00

摘要： Provided is a RFID magnetic sheet to be attached to an IC tag. The RFID magnetic sheet is provided with a plurality of stripe arranged layers (11a, 11b) whereupon a plurality of magnetic stripes (12) composed of a metal magnetic material are arranged at intervals, and a resin film (10) interposed between the respective stripe arranged layers. The arrangement relationship between the stripe arranged layers is set so that the magnetic stripes on each of the stripe arranged layers intersect with the magnetic stripes on the other stripe arranged layer in a planar shape.

摘要翻译： 提供了要附接到IC标签的RFID磁性片。 RFID磁性片设置有多个条状布置层（11a，11b），由此间隔地布置由金属磁性材料构成的多个磁条（12），并且在相应条带之间插入树脂膜（10） 布置层。 设置条纹布置层之间的布置关系，使得每个条纹布置层上的磁条与另一个条纹布置层上的磁条以平面形状相交。

公开(公告)号：US08283246B2

公开(公告)日：2012-10-09

申请号：US13091801

申请日：2011-04-21

申请人： Takashi Kitae ,  Seiichi Nakatani ,  Seiji Karashima ,  Yoshihisa Yamashita ,  Takashi Ichiryu

发明人： Takashi Kitae ,  Seiichi Nakatani ,  Seiji Karashima ,  Yoshihisa Yamashita ,  Takashi Ichiryu

IPC分类号： H01L21/00

CPC分类号： H01L24/16 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11001 ,  H01L2224/11003 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29299 ,  H01L2224/29305 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83885 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0264 ,  H05K2203/087 ,  H05K2203/1178 ,  Y02P70/613 ,  H01L2924/01031 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/00011 ,  H01L2924/00015 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/0675 ,  H01L2924/0695 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： The invention involves mounting a solder resin composition (6) including a solder powder (5a) and a resin (4) on the first electronic component (2); arranging such that the connecting terminals (3) of the first electronic component (2) and the electrode terminals (7) of the second electronic component (8) are facing each other; ejecting a gas (9a) from a gas generation source (1) included in the first electronic component (2) by heating the first electronic component (2) and the solder resin composition; and inducing the flow of the solder powder (5a) in the solder resin composition (6) by inducing convection of the gas (9a) in the solder resin composition (6), and electrically connecting the connecting terminals (3) and the electrode terminals (7) by self-assembly on the connecting terminals (3) and the electrode terminals (7). Through this are provided a flip chip packaging method that enables connecting, with high connection reliability, electrode terminals of a semiconductor chip wired with narrow pitch and connecting terminals of a circuit board, and a bump formation method for packaging on a circuit board.

摘要翻译： 本发明涉及将包含焊料粉末（5a）和树脂（4）的焊料树脂组合物（6）安装在第一电子部件（2）上; 排列成使得第一电子部件（2）的连接端子（3）和第二电子部件（8）的电极端子（7）彼此面对; 通过加热第一电子部件（2）和焊料树脂组合物，从包括在第一电子部件（2）中的气体发生源（1）喷出气体（9a） 并且通过引起焊料树脂组合物（6）中的气体（9a）的对流而引起焊料粉末（5a）在焊料树脂组合物（6）中的流动，并将连接端子（3）和电极端子 （7）通过在连接端子（3）和电极端子（7）上的自组装。 通过这种方式提供了一种倒装芯片封装方法，其以高连接可靠性连接具有窄间距的半导体芯片的电极端子和电路板的连接端子，以及用于封装在电路板上的凸块形成方法。

公开(公告)号：US20110049598A1

公开(公告)日：2011-03-03

申请号：US12939729

申请日：2010-11-04

申请人： Koichi HIRANO ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita ,  Takashi Ichiryu

发明人： Koichi HIRANO ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita ,  Takashi Ichiryu

IPC分类号： H01L29/786

CPC分类号： H01L51/0024 ,  H01L29/41733 ,  H01L29/66742 ,  H01L29/78603 ,  H01L51/0023 ,  H01L51/0097 ,  H01L51/0525 ,  H01L51/055 ,  H01L51/102 ,  Y10T428/24917

摘要： A layered film of a three-layer clad foil formed with a first metal layer 23, a second metal layer 25, and an inorganic insulating layer 35 interposed therebetween is prepared. After the second metal layer 25 is partially etched to form a gate electrode 20g, the first metal layer 23 is partially etched to form source/drain electrodes 20s, 20d in a region corresponding to the gate electrode 20g. A semiconductor layer 40 is then formed in contact with the source/drain electrodes 20s, 20d and on the gate electrode 20g with the inorganic insulating layer 35 interposed therebetween. The inorganic insulating layer 35 on the gate electrode 20g functions as a gate insulating film 30, and the semiconductor layer 40 between the source/drain electrodes 20s, 20d on the inorganic insulating layer 35 functions as a channel.

摘要翻译： 制备形成有第一金属层23，第二金属层25和介于其间的无机绝缘层35的三层复合箔的分层膜。 在第二金属层25被部分蚀刻以形成栅电极20g之后，第一金属层23被部分蚀刻以在对应于栅电极20g的区域中形成源/漏电极20s，20d。 然后，将半导体层40形成为与源极/漏极20s，20d接触并且在栅极电极20g上形成有绝缘层35。 栅电极20g上的无机绝缘层35用作栅极绝缘膜30，无机绝缘层35上的源/漏电极20s，20d之间的半导体层40用作沟道。

公开(公告)号：US20090203170A1

公开(公告)日：2009-08-13

申请号：US11914416

申请日：2006-03-30

申请人： Seiichi Nakatani ,  Seiji Karashima ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu

发明人： Seiichi Nakatani ,  Seiji Karashima ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu

IPC分类号： H01L21/60 ,  B23P19/00

CPC分类号： H01L21/563 ,  H01L21/67103 ,  H01L21/67126 ,  H01L23/3135 ,  H01L24/11 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/81121 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/83886 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/381 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0126 ,  H05K2203/082 ,  Y02P70/613 ,  Y10T29/53183 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/0665 ,  H01L2924/0695 ,  H01L2224/05599

摘要： A flip chip mounting method includes holding a circuit board (213) and a semiconductor chip (206), aligning the circuit board (213) with the semiconductor chip (206) while holding them with a predetermined gap therebetween, heating the circuit board (213) or the semiconductor chip (206) to a temperature at which solder powder in a solder resin composition (216) formed of solder powder (214) and a resin (215) is melted, supplying the solder resin composition (216) by a capillary phenomenon, and curing the resin (215), wherein the melted solder powder (214) in the solder resin composition (216) is moved through the predetermined gap across which the circuit board (213) and the semiconductor chip (206) are held, and self-assembled and grown, whereby the connection terminals (211) and the electrode terminals (207) are connected to each other electrically. According to this configuration, a flip chip mounting method having high productivity and reliability, which enables a next generation semiconductor chip to be mounted on a circuit board, a mounted body thereof, and a mounting apparatus thereof are provided.

摘要翻译： 一种倒装芯片安装方法，包括保持电路板（213）和半导体芯片（206），使电路板（213）与半导体芯片（206）保持一定间隔，同时将电路板（213）加热 ）或半导体芯片（206）的温度升高到由焊料粉末（214）和树脂（215）形成的焊料树脂组合物（216）中的焊料粉末熔化的温度，通过毛细管 现象，固化树脂（215），其中焊料树脂组合物（216）中的熔融焊料粉末（214）移动通过保持电路板（213）和半导体芯片（206）的预定间隙， 并且自组装和生长，由此连接端子（211​​）和电极端子（207）彼此电连接。 根据该结构，提供了一种能够将下一代半导体芯片安装在电路板上的高生产率和可靠性的倒装芯片安装方法及其安装体及其安装装置。

公开(公告)号：US07531754B2

公开(公告)日：2009-05-12

申请号：US11712943

申请日：2007-03-02

申请人： Yoshihisa Yamashita ,  Hiroki Yabe ,  Takashi Ichiryu ,  Seiichi Nakatani ,  Satoru Tomekawa ,  Toshio Fujii ,  Seiji Karashima

发明人： Yoshihisa Yamashita ,  Hiroki Yabe ,  Takashi Ichiryu ,  Seiichi Nakatani ,  Satoru Tomekawa ,  Toshio Fujii ,  Seiji Karashima

IPC分类号： H05K1/00

CPC分类号： H05K3/4084 ,  G03G15/225 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H05K1/0393 ,  H05K3/102 ,  H05K3/1266 ,  H05K3/20 ,  H05K3/207 ,  H05K3/386 ,  H05K3/4652 ,  H05K2201/0376 ,  H05K2203/0143 ,  H05K2203/0195 ,  H05K2203/0517 ,  H05K2203/1189 ,  H05K2203/1572 ,  H01L2924/00

摘要： A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.

摘要翻译： 柔性基板包括膜，膜的正面上的第一绝缘树脂层，膜背面的第二绝缘树脂层，嵌入第一绝缘树脂层中的前侧布线图案，以及后部 嵌入在第二绝缘树脂层中的布线图案。 前侧布线图案的表面与第一绝缘树脂层的表面齐平，并且背面布线图案的表面与第二绝缘树脂层的表面齐平。 前侧布线图案和背面布线图案中的至少一个的一部分朝向前侧布线图案和背面布线图案中的至少一个中的另一个的一部分凹陷，使得 前侧布线图案的一部分和背面布线图案的一部分彼此接合以形成结。

公开(公告)号：US08071425B2

公开(公告)日：2011-12-06

申请号：US12764455

申请日：2010-04-21

申请人： Seiichi Nakatani ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Seiji Karashima

发明人： Seiichi Nakatani ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Seiji Karashima

IPC分类号： H01L21/52

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/83007 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83815 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83888 ,  H01L2224/9201 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/0695 ,  H01L2224/05599

摘要： The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that is provided on an opposite side of a formation surface of the electrode terminal (207) of the semiconductor chip (206), is folded on an outer periphery of the semiconductor chip (206) on the formation surface side of the electrode terminal (207) and is in contact with the circuit board (213), wherein the connection terminal (211) of the circuit board (213) and the electrode terminal (207) of the semiconductor chip (206) are connected electrically via a solder layer (215), and the circuit board (213) and the semiconductor chip (206) are fixed by a resin (217). Thereby, the flip chip mounted body with excellent productivity and reliability that can mount the semiconductor chip on the circuit board, and a method and an apparatus for mounting the flip chip mounted body are provided.

摘要翻译： 本发明的倒装芯片安装体包括：具有多个连接端子（211​​）的电路板（213）; 具有与所述连接端子相对设置的多个电极端子（207）的半导体芯片（206）。 在所述半导体芯片（206）的外周折叠具有设置在所述半导体芯片（206）的所述电极端子（207）的形成面的相反侧的盒状的多孔片（205） 在电极端子（207）的形成面侧与电路基板（213）接触，电路基板（213）的连接端子（211​​）和半导体芯片的电极端子（207） 206）通过焊料层（215）电连接，并且电路板（213）和半导体芯片（206）由树脂（217）固定。 因此，提供了将半导体芯片安装在电路板上的优异的生产率和可靠性的倒装芯片安装体以及安装倒装芯片安装体的方法和装置。

公开(公告)号：US07981528B2

公开(公告)日：2011-07-19

申请号：US11848407

申请日：2007-08-31

申请人： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Koichi Hirano

发明人： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Koichi Hirano

IPC分类号： B32B15/00

CPC分类号： G06K19/07749 ,  G06K19/07771 ,  Y10T428/24355 ,  Y10T428/32

摘要： A water-repelling layer is formed on a resin film, and a stripe pattern region is formed so as to be positioned within a surface region of the water-repelling layer and so as to be relatively hydrophilic with respect to water repellency of the water-repelling layer. A magnetic stripe pattern is formed of needle-shaped magnetic grains oriented and aggregated in the stripe pattern region. The needle-shaped magnetic grains are arranged in a desirable state in a predetermined stripe pattern, with a high magnetic permeability and a magnetic sheet with stripe-arranged magnetic grains that is thin and flexible is obtained.

摘要翻译： 在树脂膜上形成防水层，并且形成条纹图案区域，以便位于防水层的表面区域内，并且相对于水溶性防水层的防水性而相对亲水， 排斥层。 磁条图案由在条纹图案区域中定向和聚集的针状磁性颗粒形成。 针状磁性颗粒以预定的条纹图案被布置成期望的状态，具有高磁导率，并且获得薄且柔性的带状排列的磁性颗粒的磁性片。

公开(公告)号：US07951700B2

公开(公告)日：2011-05-31

申请号：US11910810

申请日：2006-03-16

申请人： Takashi Kitae ,  Seiichi Nakatani ,  Seiji Karashima ,  Yoshihisa Yamashita ,  Takashi Ichiryu

发明人： Takashi Kitae ,  Seiichi Nakatani ,  Seiji Karashima ,  Yoshihisa Yamashita ,  Takashi Ichiryu

IPC分类号： H01L21/00

CPC分类号： H01L24/16 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11001 ,  H01L2224/11003 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29299 ,  H01L2224/29305 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83885 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0264 ,  H05K2203/087 ,  H05K2203/1178 ,  Y02P70/613 ,  H01L2924/01031 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/00011 ,  H01L2924/00015 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/0675 ,  H01L2924/0695 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： The invention involves mounting a solder resin composition (6) including a solder powder (5a) and a resin (4) on the first electronic component (2); arranging such that the connecting terminals (3) of the first electronic component (2) and the electrode terminals (7) of the second electronic component (8) are facing each other; ejecting a gas (9a) from a gas generation source (1) included in the first electronic component (2) by heating the first electronic component (2) and the solder resin composition; and inducing the flow of the solder powder (5a) in the solder resin composition (6) by inducing convection of the gas (9a) in the solder resin composition (6), and electrically connecting the connecting terminals (3) and the electrode terminals (7) by self-assembly on the connecting terminals (3) and the electrode terminals (7). Through this are provided a flip chip packaging method that enables connecting, with high connection reliability, electrode terminals of a semiconductor chip wired with narrow pitch and connecting terminals of a circuit board, and a bump formation method for packaging on a circuit board.

摘要翻译： 本发明涉及将包含焊料粉末（5a）和树脂（4）的焊料树脂组合物（6）安装在第一电子部件（2）上; 排列成使得第一电子部件（2）的连接端子（3）和第二电子部件（8）的电极端子（7）彼此面对; 通过加热第一电子部件（2）和焊料树脂组合物，从包括在第一电子部件（2）中的气体发生源（1）喷出气体（9a） 并且通过引起焊料树脂组合物（6）中的气体（9a）的对流而引起焊料粉末（5a）在焊料树脂组合物（6）中的流动，并将连接端子（3）和电极端子 （7）通过在连接端子（3）和电极端子（7）上的自组装。 通过这种方式提供了一种倒装芯片封装方法，其以高连接可靠性连接具有窄间距的半导体芯片的电极端子和电路板的连接端子，以及用于封装在电路板上的凸块形成方法。

公开(公告)号：US07732920B2

公开(公告)日：2010-06-08

申请号：US11909856

申请日：2006-03-14

申请人： Seiichi Nakatani ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Seiji Karashima

发明人： Seiichi Nakatani ,  Takashi Kitae ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Seiji Karashima

IPC分类号： H01L23/04 ,  H01L23/06

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/83007 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83815 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83888 ,  H01L2224/9201 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/0695 ,  H01L2224/05599

摘要： The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that is provided on an opposite side of a formation surface of the electrode terminal (207) of the semiconductor chip (206), is folded on an outer periphery of the semiconductor chip (206) on the formation surface side of the electrode terminal (207) and is in contact with the circuit board (213), wherein the connection terminal (211) of the circuit board (213) and the electrode terminal (207) of the semiconductor chip (206) are connected electrically via a solder layer (215), and the circuit board (213) and the semiconductor chip (206) are fixed by a resin (217). Thereby, the flip chip mounted body with excellent productivity and reliability that can mount the semiconductor chip on the circuit board, and a method and an apparatus for mounting the flip chip mounted body are provided.

摘要翻译： 本发明的倒装芯片安装体包括：具有多个连接端子（211​​）的电路板（213）; 具有与所述连接端子相对设置的多个电极端子（207）的半导体芯片（206）。 在所述半导体芯片（206）的外周折叠具有设置在所述半导体芯片（206）的所述电极端子（207）的形成面的相反侧的盒状的多孔片（205） 在电极端子（207）的形成面侧与电路基板（213）接触，电路基板（213）的连接端子（211​​）和半导体芯片的电极端子（207） 206）通过焊料层（215）电连接，并且电路板（213）和半导体芯片（206）由树脂（217）固定。 因此，提供了将半导体芯片安装在电路板上的优异的生产率和可靠性的倒装芯片安装体以及安装倒装芯片安装体的方法和装置。

公开(公告)号：US20070262470A1

公开(公告)日：2007-11-15

申请号：US11577346

申请日：2005-09-20

申请人： Takashi Ichiryu ,  Yoshihisa Yamashita ,  Seiichi Nakatani

发明人： Takashi Ichiryu ,  Yoshihisa Yamashita ,  Seiichi Nakatani

IPC分类号： H01L23/48 ,  H01L21/00 ,  H01L25/00

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10329 ,  H01L2924/181 ,  H05K1/186 ,  H05K3/4614 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： The present invention provides a module with a built-in semiconductor that can suppress a reduction in yield caused by a crack or failure of a semiconductor device in the process of mounting a thin semiconductor device on a wiring board and a method for manufacturing the module. In the module with a built-in semiconductor, a semiconductor device (107) is contained in an interlayer connection member (105) located between a first wiring board (101) and a second wiring board (103). The back side of the semiconductor device (107) is die-bonded to the first wiring board (101) via an adhesive (108), and the semiconductor device (107) is connected electrically to the second wiring pattern (104) via a protruding electrode (109).

摘要翻译： 本发明提供了一种具有内置半导体的模块，其能够抑制在将薄半导体器件安装在布线板上的过程中半导体器件的裂纹或故障引起的产量降低以及用于制造模块的方法。 在具有内置半导体的模块中，半导体器件（107）包含在位于第一布线板（101）和第二布线板（103）之间的层间连接部件（105）中。 半导体器件（107）的背面通过粘合剂（108）与第一布线板（101）进行裸片接合，半导体器件（107）经由突出部 电极（109）。