公开(公告)号：US07960806B2

公开(公告)日：2011-06-14

申请号：US12285324

申请日：2008-10-01

申请人： Young-Ki Lee ,  Seog-Moon Choi ,  Hyung-Jin Jeon ,  Sang-Hyun Shin

发明人： Young-Ki Lee ,  Seog-Moon Choi ,  Hyung-Jin Jeon ,  Sang-Hyun Shin

IPC分类号： H01L27/14

CPC分类号： H01L25/0753 ,  F21K9/00 ,  H01L33/486 ,  H01L33/62 ,  H01L33/641 ,  H01L33/647 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

摘要： A sub-mount, a light emitting diode package, and a method of manufacturing thereof are disclosed. A sub-mount, on which multiple light emitting diodes are mounted, can include a multiple number of metal bodies on which the light emitting diodes are respectively mounted, and an oxide wall interposed between the metal bodies such that the adjacent metal bodies are supported by each other but electrically disconnected from each other. By utilizing certain embodiments of the invention, a high heat releasing effect may be obtained, and manufacturing costs may be reduced.

摘要翻译： 公开了一种子安装，发光二极管封装及其制造方法。 其上安装有多个发光二极管的子座可以包括多个金属体，其上分别安装有发光二极管，金属体之间插入氧化物壁，使得相邻的金属体被 彼此相互电气断开。 通过利用本发明的某些实施例，可以获得高的散热效果，并且可以降低制造成本。

公开(公告)号：US20090261356A1

公开(公告)日：2009-10-22

申请号：US12285324

申请日：2008-10-01

申请人： Young-Ki Lee ,  Seog-Moon choi ,  Hyung-Jin Jeon ,  Sang-Hyun Shin

发明人： Young-Ki Lee ,  Seog-Moon choi ,  Hyung-Jin Jeon ,  Sang-Hyun Shin

IPC分类号： H01L33/00 ,  H01L21/50

CPC分类号： H01L25/0753 ,  F21K9/00 ,  H01L33/486 ,  H01L33/62 ,  H01L33/641 ,  H01L33/647 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

摘要： A sub-mount, a light emitting diode package, and a method of manufacturing thereof are disclosed. A sub-mount, on which multiple light emitting diodes are mounted, can include a multiple number of metal bodies on which the light emitting diodes are respectively mounted, and an oxide wall interposed between the metal bodies such that the adjacent metal bodies are supported by each other but electrically disconnected from each other. By utilizing certain embodiments of the invention, a high heat releasing effect may be obtained, and manufacturing costs may be reduced.

摘要翻译： 公开了一种子安装，发光二极管封装及其制造方法。 其上安装有多个发光二极管的子座可以包括多个金属体，其上分别安装有发光二极管，金属体之间插入氧化物壁，使得相邻的金属体被 彼此相互电气断开。 通过利用本发明的某些实施例，可以获得高的散热效果，并且可以降低制造成本。

公开(公告)号：US07632709B2

公开(公告)日：2009-12-15

申请号：US12149106

申请日：2008-04-25

申请人： Hyung-Jin Jeon ,  Sung Yi ,  Young-Do Kweon ,  Jong-Yun Lee ,  Joon-Seok Kang ,  Seung-Wook Park

发明人： Hyung-Jin Jeon ,  Sung Yi ,  Young-Do Kweon ,  Jong-Yun Lee ,  Joon-Seok Kang ,  Seung-Wook Park

IPC分类号： H01L21/00

CPC分类号： H01L23/3114 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/24 ,  H01L24/27 ,  H01L24/82 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517

摘要： A method of manufacturing a wafer level package is disclosed. The method may include stacking an insulation layer over a wafer substrate; processing a via hole in the insulation layer; forming a seed layer over the insulation layer; forming a plating resist, which is in a corresponding relationship with a redistribution pattern, over the seed layer; forming the redistribution pattern, which includes a terminal for external contact, by electroplating; and coupling a conductive ball to the terminal. As multiple redistribution layers can be formed using inexpensive PCB processes, the manufacturing costs can be reduced, and the stability and efficiency of the process can be increased.

公开(公告)号：US20090087951A1

公开(公告)日：2009-04-02

申请号：US12149106

申请日：2008-04-25

申请人： Hyung-Jin Jeon ,  Sung Yi ,  Young-Do Kweon ,  Jong-Yun Lee ,  Joon-Seok Kang ,  Seung-Wook Park

发明人： Hyung-Jin Jeon ,  Sung Yi ,  Young-Do Kweon ,  Jong-Yun Lee ,  Joon-Seok Kang ,  Seung-Wook Park

IPC分类号： H01L21/02

CPC分类号： H01L23/3114 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/24 ,  H01L24/27 ,  H01L24/82 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517

摘要： A method of manufacturing a wafer level package is disclosed. The method may include stacking an insulation layer over a wafer substrate; processing a via hole in the insulation layer; forming a seed layer over the insulation layer; forming a plating resist, which is in a corresponding relationship with a redistribution pattern, over the seed layer; forming the redistribution pattern, which includes a terminal for external contact, by electroplating; and coupling a conductive ball to the terminal. As multiple redistribution layers can be formed using inexpensive PCB processes, the manufacturing costs can be reduced, and the stability and efficiency of the process can be increased.

摘要翻译： 公开了一种制造晶片级封装的方法。 该方法可以包括在晶片衬底上堆叠绝缘层; 处理绝缘层中的通孔; 在所述绝缘层上形成种子层; 在种子层上形成与再分布图案对应关系的电镀抗蚀剂; 通过电镀形成包括用于外部接触的端子的再分布图案; 并将导电球耦合到端子。 由于可以使用廉价的PCB工艺形成多个再分布层，所以可以降低制造成本，并且可以提高工艺的稳定性和效率。

公开(公告)号：US08106308B2

公开(公告)日：2012-01-31

申请号：US11898915

申请日：2007-09-17

申请人： Hyung-Jin Jeon ,  Young-Hwan Shin ,  Tae-Gon Lee

发明人： Hyung-Jin Jeon ,  Young-Hwan Shin ,  Tae-Gon Lee

IPC分类号： H05K1/11

CPC分类号： H05K1/117 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H05K3/0035 ,  H05K2201/0919 ,  H05K2201/09472 ,  H05K2201/09709 ,  H05K2201/09845 ,  H05K2203/049 ,  Y10T29/49155 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

摘要： A printed circuit board for a package includes a first insulation layer, on one side of which an electronic component having a plurality of electrical contacts is mounted; a plurality of first bond pads formed on the other side of the first insulation layer in predetermined intervals, which are electrically connected with the electrical contacts; a second insulation layer stacked on the other side of the first insulation layer, with those portions removed where the first bond pads are formed; and a second bond pad, which is formed on a surface of the second insulation layer in correspondence with positions between the plurality of the first bond pads, and which is electrically connected with the electrical contacts. The bond pads can be implemented in two layers, as opposed to the case of forming the bond pads in one layer, in a predetermined area of a printed circuit board.

摘要翻译： 一种用于封装的印刷电路板包括第一绝缘层，其一侧安装有多个电触点的电子部件; 多个第一接合焊盘，其以预定间隔形成在所述第一绝缘层的另一侧上，其与所述电触点电连接; 层叠在所述第一绝缘层的另一侧的第二绝缘层，在形成所述第一接合焊盘的地方去除所述部分; 以及第二接合焊盘，其形成在所述第二绝缘层的与所述多个所述第一接合焊盘之间的位置对应并且与所述电触头电连接的表面上。 与印刷电路板的预定区域中形成一层中的接合焊盘的情况相反，接合焊盘可以实现为两层。

公开(公告)号：US20090253259A1

公开(公告)日：2009-10-08

申请号：US12222967

申请日：2008-08-20

申请人： Jingli Yuan ,  Young-Do Kweon ,  Jae-Kwang Lee ,  Jong-Hwan Baek ,  Hyung-Jin Jeon ,  Seung-Wook Park

发明人： Jingli Yuan ,  Young-Do Kweon ,  Jae-Kwang Lee ,  Jong-Hwan Baek ,  Hyung-Jin Jeon ,  Seung-Wook Park

IPC分类号： H01L21/60 ,  B23K37/04

CPC分类号： B23K1/0016 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/014

摘要： Disclosed are a solder attachment jig and a method of manufacturing a semiconductor device using the same. The solder ball attachment jig, which arranges a solder ball to be aligned with a conductive post of a semiconductor wafer, can include a body and a receiving hole, which is formed on the body to hold the solder ball. Internal walls of the receiving hole that face each other are symmetrically inclined. Using the solder ball attachment jig in accordance with an embodiment of the present invention, the alignment of the solder ball can be improved while reducing the cost and simplifying the processes.

摘要翻译： 公开了焊接附着夹具和使用其的半导体器件的制造方法。 布置焊球与半导体晶片的导电柱对准的焊球附着夹具可以包括主体和容纳孔，其形成在主体上以保持焊球。 相互面对的接收孔的内壁对称地倾斜。 使用根据本发明的实施例的焊球附着夹具，可以提高焊球的对准，同时降低成本并简化工艺。

公开(公告)号：US20080066954A1

公开(公告)日：2008-03-20

申请号：US11898915

申请日：2007-09-17

申请人： Hyung-Jin Jeon ,  Young-Hwan Shin ,  Tae-Gon Lee

发明人： Hyung-Jin Jeon ,  Young-Hwan Shin ,  Tae-Gon Lee

IPC分类号： H01R12/04 ,  H05K3/02

CPC分类号： H05K1/117 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H05K3/0035 ,  H05K2201/0919 ,  H05K2201/09472 ,  H05K2201/09709 ,  H05K2201/09845 ,  H05K2203/049 ,  Y10T29/49155 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

摘要： A printed circuit board for a package includes a first insulation layer, on one side of which an electronic component having a plurality of electrical contacts is mounted; a plurality of first bond pads formed on the other side of the first insulation layer in predetermined intervals, which are electrically connected with the electrical contacts; a second insulation layer stacked on the other side of the first insulation layer, with those portions removed where the first bond pads are formed; and a second bond pad, which is formed on a surface of the second insulation layer in correspondence with positions between the plurality of the first bond pads, and which is electrically connected with the electrical contacts. The bond pads can be implemented in two layers, as opposed to the case of forming the bond pads in one layer, in a predetermined area of a printed circuit board.

摘要翻译： 一种用于封装的印刷电路板包括第一绝缘层，其一侧安装有多个电触点的电子部件; 多个第一接合焊盘，其以预定间隔形成在所述第一绝缘层的另一侧上，其与所述电触点电连接; 层叠在所述第一绝缘层的另一侧的第二绝缘层，在形成所述第一接合焊盘的地方去除所述部分; 以及第二接合焊盘，其形成在所述第二绝缘层的与所述多个所述第一接合焊盘之间的位置对应并且与所述电触头电连接的表面上。 与印刷电路板的预定区域中形成一层中的接合焊盘的情况相反，接合焊盘可以实现为两层。