公开(公告)号：US06727187B2

公开(公告)日：2004-04-27

申请号：US09828957

申请日：2001-04-10

申请人： Yutaka Takeshima ,  Michimasa Funabashi ,  Kenji Tanaka

发明人： Yutaka Takeshima ,  Michimasa Funabashi ,  Kenji Tanaka

IPC分类号： H01L21302

CPC分类号： C23F1/18 ,  H01L21/02063 ,  Y10S438/906

摘要： For providing a cleaning technique capable of removing metal contamination at a low temperature and in a short period of time, an aqueous solution containing 0.1 to 15% by weight of hydrochloric acid, 0.01 to 0.3% by weight of hydrofluoric acid and 0.1 to 15% by weight of hydrogen peroxide is used as a cleaning solution for cleaning a semiconductor substrate after forming a gate electrode of a polymetal structure on the semiconductor substrate.

摘要翻译： 为了提供能够在低温和短时间内除去金属污染物的清洗技术，将含有0.1〜15重量％盐酸，0.01〜0.3重量％氢氟酸和0.1〜15重量％ 在半导体衬底上形成多金属结构的栅电极之后，用作清洗半导体衬底的清洗溶液。

公开(公告)号：US06277749B1

公开(公告)日：2001-08-21

申请号：US09392568

申请日：1999-09-09

申请人： Michimasa Funabashi

发明人： Michimasa Funabashi

IPC分类号： H01L21302

CPC分类号： H01L21/02063

摘要： A processing solution containing hydrogen peroxide, hydracid fluoride salt, and water is used for pre-cleaning prior to a step of forming a gate oxide film 14 by subjecting a silicon wafer 1 to a heat treatment. Tetraalkyl ammonium fluoride, ammonium fluoride or the like is used as hydracid fluoride salt.

公开(公告)号：US5917211A

公开(公告)日：1999-06-29

申请号：US979543

申请日：1997-11-25

申请人： Jun Murata ,  Yoshitaka Tadaki ,  Hiroko Kaneko ,  Toshihiro Sekiguchi ,  Hiroyuki Uchiyama ,  Hisashi Nakamura ,  Toshio Maeda ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Ogishima ,  Masaki Nagao ,  Michimasa Funabashi ,  Yasuo Kiguchi ,  Masayuki Kojima ,  Atsuyoshi Koike ,  Hiroyuki Miyazawa ,  Masato Sadaoka ,  Kazuya Kadota ,  Tadashi Chikahara ,  Kazuo Nojiri ,  Yutaka Kobayashi

发明人： Jun Murata ,  Yoshitaka Tadaki ,  Hiroko Kaneko ,  Toshihiro Sekiguchi ,  Hiroyuki Uchiyama ,  Hisashi Nakamura ,  Toshio Maeda ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Ogishima ,  Masaki Nagao ,  Michimasa Funabashi ,  Yasuo Kiguchi ,  Masayuki Kojima ,  Atsuyoshi Koike ,  Hiroyuki Miyazawa ,  Masato Sadaoka ,  Kazuya Kadota ,  Tadashi Chikahara ,  Kazuo Nojiri ,  Yutaka Kobayashi

IPC分类号： H01L21/8234 ,  H01L27/105 ,  H01L27/08 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L27/105 ,  H01L21/823425

摘要： A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.

摘要翻译： 一种半导体集成电路，包括构成存储系统的存储单元的第一n沟道MISFET，构成存储系统的外围电路的第二n沟道MISFET和构成外围电路中的输出电路的第三n沟道MISFET。 当这些MISFET的各个栅极长度基本相同时，第一n沟道MISFET，第二n沟道MISFET和第三n沟道MISFET的阈值电压依次减小。

公开(公告)号：US20120257181A1

公开(公告)日：2012-10-11

申请号：US13516776

申请日：2010-12-13

申请人： Michimasa Funabashi ,  Kenji Otokuni ,  Hiroki Edo ,  Hideaki Suzuki

发明人： Michimasa Funabashi ,  Kenji Otokuni ,  Hiroki Edo ,  Hideaki Suzuki

IPC分类号： G03B27/52

CPC分类号： H01L21/67051 ,  G03F7/422

摘要： A single-wafer substrate processing device is provided which does not spill a processing liquid and the vapors thereof to an exterior when directly supplying the process liquid to a surface of a substrate to process the substrate and which prevents the process liquid and the vapors, etc., thereof to adhere a ceiling, etc., of a housing. The device includes a housing 1, holding means 4 that holds, in the housing 1, a substrate 3 subjected to an eliminating process of adhering materials on a processing surface with a processing surface 3a being directed to the bottom 1b of the housing, supply means that supplies a process liquid to the processing surface 3a of the substrate 3 held by the holding means 4, an inlet 1a for taking in a gaseous body in the housing 1, and an outlet 1c for evacuating from the housing the vapors of the process liquid in the housing 1 together with the gaseous body taken in from the inlet 1a.

摘要翻译： 提供了一种单晶片基板处理装置，当将处理液直接供应到基板的表面以处理基板并且防止处理液体和蒸汽等时，不会将处理液体及其蒸汽溢出到外部 附着住房屋顶等。 该装置包括壳体1，保持装置4，其在壳体1中保持经受消除处理的基板3，基板3在处理表面上粘附材料，处理表面3a指向壳体的底部1b，供给装置 其将处理液体供应到由保持装置4保持的基板3的处理表面3a，用于吸入壳体1中的气体的入口1a和用于从壳体排出处理液体的蒸气的出口1c 在壳体1中与从入口1a吸入的气体一起。

公开(公告)号：US5734188A

公开(公告)日：1998-03-31

申请号：US674185

申请日：1996-07-01

申请人： Jun Murata ,  Yoshitaka Tadaki ,  Hiroko Kaneko ,  Toshihiro Sekiguchi ,  Hiroyuki Uchiyama ,  Hisashi Nakamura ,  Toshio Maeda ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Ogishima ,  Masaki Nagao ,  Michimasa Funabashi ,  Yasuo Kiguchi ,  Masayuki Kojima ,  Atsuyoshi Koike ,  Hiroyuki Miyazawa ,  Masato Sadaoka ,  Kazuya Kadota ,  Tadashi Chikahara ,  Kazuo Nojiri ,  Yutaka Kobayashi

发明人： Jun Murata ,  Yoshitaka Tadaki ,  Hiroko Kaneko ,  Toshihiro Sekiguchi ,  Hiroyuki Uchiyama ,  Hisashi Nakamura ,  Toshio Maeda ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Ogishima ,  Masaki Nagao ,  Michimasa Funabashi ,  Yasuo Kiguchi ,  Masayuki Kojima ,  Atsuyoshi Koike ,  Hiroyuki Miyazawa ,  Masato Sadaoka ,  Kazuya Kadota ,  Tadashi Chikahara ,  Kazuo Nojiri ,  Yutaka Kobayashi

IPC分类号： H01L27/105 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L3/119

CPC分类号： H01L27/105

摘要： A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.

公开(公告)号：US20050233554A1

公开(公告)日：2005-10-20

申请号：US11108736

申请日：2005-04-19

申请人： Toshihito Tsuga ,  Hirohiko Yamamoto ,  Michimasa Funabashi ,  Kazunori Nemoto

发明人： Toshihito Tsuga ,  Hirohiko Yamamoto ,  Michimasa Funabashi ,  Kazunori Nemoto

IPC分类号： H01L21/31 ,  H01L21/20 ,  H01L21/28 ,  H01L21/316 ,  H01L21/336 ,  H01L21/8247 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L21/02164 ,  H01L21/02282 ,  H01L21/28035 ,  H01L21/3165 ,  H01L21/84 ,  H01L27/12 ,  H01L29/42324

摘要： The present invention provides a technology for suppressing occurrence of abnormality on a surface of a silicon film other than a single crystal film formed on a wafer. A silicon film is formed on a wafer in step S1 and an oxide film functioning as an abnormality suppression film for suppressing the surface abnormality is formed on the silicon surface on the wafer formed in step S10. The abnormality suppression film is formed by the surface oxidation of the polycrystalline silicon using chemical solution such as ozone water or hydrogen peroxide solution. After forming the abnormality suppression film on the silicon surface, the abnormality suppression film, for example, an abnormal growth suppression film is removed according to need, and then the process of patterning the silicon film and forming an insulating oxide film is performed.

摘要翻译： 本发明提供抑制在晶片上形成的单晶膜以外的硅膜表面发生异常的技术。 在步骤S1中在晶片上形成硅膜，并且在步骤S10中形成的晶片的硅表面上形成用作用于抑制表面异常的异常抑制膜的氧化膜。 通过使用诸如臭氧水或过氧化氢溶液的化学溶液，通过多晶硅的表面氧化形成异常抑制膜。 在硅表面上形成异常抑制膜之后，根据需要去除异常抑制膜，例如异常生长抑制膜，然后进行图案化硅膜并形成绝缘氧化膜的工艺。

公开(公告)号：US06774047B2

公开(公告)日：2004-08-10

申请号：US09902673

申请日：2001-07-12

申请人： Michimasa Funabashi

发明人： Michimasa Funabashi

IPC分类号： H01L21302

CPC分类号： H01L21/02063

摘要： A processing solution containing hydrogen peroxide, hydracid fluoride salt, and water is used for pre-cleaning prior to a step of forming a gate oxide film 14 by subjecting a silicon water 1 to a heat treatment. Tetraalkyl ammonium fluoride, ammonium fluoride or the like is used as hydracid fluoride salt.

摘要翻译： 在通过对硅水1进行热处理的形成栅极氧化膜14的步骤之前，使用含有过氧化氢，氢氟酸盐和水的处理溶液进行预清洁。 四烷基氟化铵，氟化铵等用作氢氟酸盐。

公开(公告)号：US5482524A

公开(公告)日：1996-01-09

申请号：US285421

申请日：1994-08-03

申请人： Kazuo Nakano ,  Kazuaki Mizokami ,  Keiji Hasumi ,  Katsuhiko Itoh ,  Michimasa Funabashi ,  Yasuhiro Mitsui ,  Takashi Irie ,  Takeshi Tajima ,  Sadao Matsuoka

发明人： Kazuo Nakano ,  Kazuaki Mizokami ,  Keiji Hasumi ,  Katsuhiko Itoh ,  Michimasa Funabashi ,  Yasuhiro Mitsui ,  Takashi Irie ,  Takeshi Tajima ,  Sadao Matsuoka

IPC分类号： G01N1/02 ,  G01N1/00 ,  G01N1/22 ,  G01N1/28 ,  G01N30/00 ,  H01L21/324 ,  H01L21/66 ,  B01D53/04 ,  B01D35/18

CPC分类号： G01N30/00 ,  G01N1/2214 ,  G01N2001/2264 ,  G01N2030/008

摘要： An atmospheric pressure, elevated temperature gas desorption apparatus which enables quanitiative analysis of impurities absorbed in or on the surface of a solid sample (semiconductor wafer, optical disc, etc.) is disclosed. The atmospheric pressure, elevated temperature gas desorption apparatus for desorbing impurities absorbed in or on the surface of a plate-like solid sample 18 into a carrier gas 19 in a chamber 6 under an atmospheric pressure while increasing the temperature of the solid sample 18 includes a desorption room 7A provided in the chamber 6 and connected through to a first gas supply system 1 for supplying the carrier gas 19, for desorbing impurities absorbed in or on the surface of the solid sample 18 into the carrier gas 19. A sample support room 7B is provided in the chamber 6 and is separated from the desorption room 7A by a partition member 6A. The solid sample 18 is in close contact with the partition member 6A. A heater 8 for heating the solid sample 18 is in close contact with the partition member 6A. A reserve room 9 is connected to the sample support room 7B and to a second gas supply system 13 for supplying a purge gas.

摘要翻译： 公开了一种大气压高温气体解吸装置，其能够对固体样品（半导体晶片，光盘等）表面中或表面上吸收的杂质进行量化分析。 吸附在板状固体样品18中的表面上或其上的杂质的大气压高温气体解吸装置在大气压下在室6中的载气19中同时增加固体样品18的温度包括 解吸室7A设置在室6中，并连接到用于供给载气19的第一气体供应系统1，用于将吸收在固体样品18中或其表面上的杂质解吸到载体气体19中。样品支撑室7B 设置在室6中，并通过分隔构件6A与解吸室7A分离。 固体样品18与分隔构件6A紧密接触。 用于加热固体样品18的加热器8与分隔构件6A紧密接触。 预备室9连接到样品支撑室7B和用于供给吹扫气体的第二气体供给系统13。

公开(公告)号：US5264712A

公开(公告)日：1993-11-23

申请号：US881314

申请日：1992-05-07

申请人： Jun Murata ,  Yoshitaka Tadaki ,  Hiroko Kaneko ,  Toshihiro Sekiguchi ,  Hiroyuki Uchiyama ,  Hisashi Nakamura ,  Toshio Maeda ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Ogishima ,  Masaki Nagao ,  Michimasa Funabashi ,  Yasuo Kiguchi ,  Masayuki Kojima ,  Atsuyoshi Koike ,  Hiroyuki Miyazawa ,  Masato Sadaoka ,  Kazuya Kadota ,  Tadashi Chikahara ,  Kazuo Nojiri ,  Yutaka Kobayashi

发明人： Jun Murata ,  Yoshitaka Tadaki ,  Hiroko Kaneko ,  Toshihiro Sekiguchi ,  Hiroyuki Uchiyama ,  Hisashi Nakamura ,  Toshio Maeda ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Ogishima ,  Masaki Nagao ,  Michimasa Funabashi ,  Yasuo Kiguchi ,  Masayuki Kojima ,  Atsuyoshi Koike ,  Hiroyuki Miyazawa ,  Masato Sadaoka ,  Kazuya Kadota ,  Tadashi Chikahara ,  Kazuo Nojiri ,  Yutaka Kobayashi

IPC分类号： H01L21/8234 ,  H01L27/105 ,  H01L21/308 ,  H01L29/66

CPC分类号： H01L27/105 ,  H01L21/823425

摘要： A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.

摘要翻译： 一种半导体集成电路，包括构成存储系统的存储单元的第一n沟道MISFET，构成存储系统的外围电路的第二n沟道MISFET和构成外围电路中的输出电路的第三n沟道MISFET。 当这些MISFET的各个栅极长度基本相同时，第一n沟道MISFET，第二n沟道MISFET和第三n沟道MISFET的阈值电压依次减小。

公开(公告)号：US20050274694A1

公开(公告)日：2005-12-15

申请号：US11148403

申请日：2005-06-09

申请人： Michimasa Funabashi ,  Shigeru Omata ,  Nobuaki Toma ,  Masatoshi Fukushima

发明人： Michimasa Funabashi ,  Shigeru Omata ,  Nobuaki Toma ,  Masatoshi Fukushima

IPC分类号： B44C1/22 ,  C23C16/44 ,  C23G1/00 ,  G03F7/42 ,  H01L21/302

CPC分类号： C23C16/4402 ,  G03F7/427 ,  H01J2237/3342 ,  H01L21/31138

摘要： A semiconductor manufacturing apparatus capable of removing metal derived from an electrode from ozone generated by the silent discharge is provided. The ozone generated by the silent discharge between electrodes in the ozone generating unit is permeated through a molecule permeable film based on pressure difference between the back and the front of the molecule permeable film constituting a filter. The permeated ozone is supplied together with separately-generated water vapor to a resist surface on a semiconductor wafer to remove the resist. In the resist removal described above, the high-concentration metal contamination due to the metal derived from an electrode can be prevented.

摘要翻译： 本发明提供一种能够从由静电放电产生的臭氧中去除电极的金属的半导体制造装置。 基于构成过滤器的分子渗透膜的背面和前面之间的压力差，通过臭氧发生单元中的电极之间的无声放电产生的臭氧渗透通过分子渗透膜。 渗透的臭氧与单独产生的水蒸气一起供应到半导体晶片上的抗蚀剂表面以除去抗蚀剂。 在上述抗蚀剂去除中，可以防止由于电极衍生的金属引起的高浓度金属污染。