METHODS FOR FORMING LOW STRESS DIELECTRIC FILMS
    1.
    发明申请
    METHODS FOR FORMING LOW STRESS DIELECTRIC FILMS 审中-公开
    形成低应力电介质膜的方法

    公开(公告)号:US20120015113A1

    公开(公告)日:2012-01-19

    申请号:US12835574

    申请日:2010-07-13

    IPC分类号: C23C16/513

    摘要: A method for forming a multi-layer silicon oxide film on a substrate includes performing a deposition cycle that comprises depositing a silicon oxide layer using a thermal chemical vapor deposition (CVD) process and depositing a silicon oxide layer using a plasma enhanced chemical vapor deposition (PECVD) process. The deposition cycle is repeated a specified number of times to form the multi-layer silicon oxide film comprising a plurality of silicon oxide layers formed using the thermal CVD process and a plurality of silicon oxide layers formed using the PECVD process. Each silicon oxide layer formed using the thermal CVD process is adjacent to at least one silicon oxide layer formed using the PECVD process.

    摘要翻译: 在衬底上形成多层氧化硅膜的方法包括执行沉积循环,其包括使用热化学气相沉积(CVD)工艺沉积氧化硅层,并使用等离子体增强化学气相沉积法沉积氧化硅层( PECVD)过程。 沉积循环重复规定次数以形成包含使用热CVD工艺形成的多个氧化硅层和使用PECVD工艺形成的多个氧化硅层的多层氧化硅膜。 使用热CVD工艺形成的每个氧化硅层与使用PECVD工艺形成的至少一个氧化硅层相邻。

    Method for doping non-planar transistors
    2.
    发明授权
    Method for doping non-planar transistors 失效
    掺杂非平面晶体管的方法

    公开(公告)号:US08114761B2

    公开(公告)日:2012-02-14

    申请号:US12843726

    申请日:2010-07-26

    IPC分类号: H01L21/00

    CPC分类号: H01L21/2256 H01L29/66803

    摘要: Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.

    摘要翻译: 公开了通过在非平面结构上形成共形掺杂的硅玻璃层来掺杂非平面结构的方法。 将其上形成有非平面结构的基板放置在化学气相沉积处理室中以沉积掺杂玻璃(例如BSG或PSG)的共形SACVD层。 然后将衬底暴露于RTP或激光退火步骤以将掺杂剂扩散到非平面结构中,然后通过蚀刻去除掺杂的玻璃层。

    METHOD FOR DOPING NON-PLANAR TRANSISTORS
    3.
    发明申请
    METHOD FOR DOPING NON-PLANAR TRANSISTORS 失效
    非平面晶体管的方法

    公开(公告)号:US20110129990A1

    公开(公告)日:2011-06-02

    申请号:US12843726

    申请日:2010-07-26

    IPC分类号: H01L21/22

    CPC分类号: H01L21/2256 H01L29/66803

    摘要: Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.

    摘要翻译: 公开了通过在非平面结构上形成共形掺杂的硅玻璃层来掺杂非平面结构的方法。 将其上形成有非平面结构的基板放置在化学气相沉积处理室中以沉积掺杂玻璃(例如BSG或PSG)的共形SACVD层。 然后将衬底暴露于RTP或激光退火步骤以将掺杂剂扩散到非平面结构中,然后通过蚀刻去除掺杂的玻璃层。

    Precursor addition to silicon oxide CVD for improved low temperature gapfill
    4.
    发明授权
    Precursor addition to silicon oxide CVD for improved low temperature gapfill 失效
    添加氧化硅CVD用于改善低温缝隙填料的前体

    公开(公告)号:US08012887B2

    公开(公告)日:2011-09-06

    申请号:US12489234

    申请日:2009-06-22

    IPC分类号: H01L21/31 C23C16/00

    摘要: Methods of depositing silicon oxide layers on substrates involve flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that a uniform silicon oxide growth rate is achieved across the substrate surface. The surface of silicon oxide layers grown according to embodiments may have a reduced roughness when grown with the additive precursor. In other aspects of the disclosure, silicon oxide layers are deposited on a patterned substrate with trenches on the surface by flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that the trenches are filled with a reduced quantity and/or size of voids within the silicon oxide filler material.

    摘要翻译: 在衬底上沉积氧化硅层的方法包括使含硅前体,氧化气体,水和添加剂前体流入处理室,使得在衬底表面上实现均匀的氧化硅生长速率。 根据实施例生长的氧化硅层的表面可以在与添加剂前体一起生长时具有减小的粗糙度。 在本公开的其他方面中,通过使含硅前体,氧化气体,水和添加剂前体流入处理室,将硅氧化物层沉积在具有表面上的沟槽的图案化衬底上,使得沟槽填充有 氧化硅填充材料内的空隙的数量和/或尺寸减小。

    PRECURSOR ADDITION TO SILICON OXIDE CVD FOR IMPROVED LOW TEMPERATURE GAPFILL
    5.
    发明申请
    PRECURSOR ADDITION TO SILICON OXIDE CVD FOR IMPROVED LOW TEMPERATURE GAPFILL 失效
    用于改善低温胶粘剂的硅氧烷CVD的前驱物

    公开(公告)号:US20100159711A1

    公开(公告)日:2010-06-24

    申请号:US12489234

    申请日:2009-06-22

    IPC分类号: H01L21/31 H01L21/762

    摘要: Methods of depositing silicon oxide layers on substrates involve flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that a uniform silicon oxide growth rate is achieved across the substrate surface. The surface of silicon oxide layers grown according to embodiments may have a reduced roughness when grown with the additive precursor. In other aspects of the disclosure, silicon oxide layers are deposited on a patterned substrate with trenches on the surface by flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that the trenches are filled with a reduced quantity and/or size of voids within the silicon oxide filler material.

    摘要翻译: 在衬底上沉积氧化硅层的方法包括使含硅前体,氧化气体,水和添加剂前体流入处理室,使得在衬底表面上实现均匀的氧化硅生长速率。 根据实施例生长的氧化硅层的表面可以在与添加剂前体一起生长时具有减小的粗糙度。 在本公开的其他方面中,通过使含硅前体,氧化气体,水和添加剂前体流入处理室,将硅氧化物层沉积在具有表面上的沟槽的图案化衬底上,使得沟槽填充有 氧化硅填充材料内的空隙的数量和/或尺寸减小。

    Simultaneous switching of multiple time slots in an optical network node
    6.
    发明授权
    Simultaneous switching of multiple time slots in an optical network node 有权
    在光网络节点中同时切换多个时隙

    公开(公告)号:US08775744B2

    公开(公告)日:2014-07-08

    申请号:US12550497

    申请日:2009-08-31

    IPC分类号: G06F12/00 G06F3/00

    CPC分类号: H04L49/9036

    摘要: A switching frame buffer is described in which data units within a sequence of time slots, of a frame, may be simultaneously input and output at ports of the switching frame buffer. In one implementation, a write port may receive data units within a single cycle of the switch. A number of memories may be provided, where first selected ones of the memories constitute memory groups and second selected ones of the memories constitute a memory subsets, each of the memory groups including a corresponding one of the memory subsets. The write port may supply each of a number of copies of the data units to a corresponding one of the memory subsets. Multiplexers may be associated with the groups of the memories and a read port may receive one of the copies of a number of the data units from different ones of the multiplexers.

    摘要翻译: 描述了一种切换帧缓冲器,其中帧的时隙序列内的数据单元可以同时在切换帧缓冲器的端口输入和输出。 在一个实现中,写入端口可以在交换机的单个周期内接收数据单元。 可以提供多个存储器,其中存储器中的第一选定存储器构成存储器组,并且存储器中的第二选定存储器构成存储器子集,每个存储器组包括对应的一个存储器子集。 写入端口可以将数据单元的多个副本中的每一个提供给相应的一个存储器子集。 多路复用器可以与存储器组相关联,并且读取端口可以从不同的多路复用器接收多个数据单元的一个副本。

    Loadlock batch ozone cure
    7.
    发明授权
    Loadlock batch ozone cure 有权
    负压批次臭氧固化

    公开(公告)号:US08524004B2

    公开(公告)日:2013-09-03

    申请号:US13161371

    申请日:2011-06-15

    IPC分类号: C23C16/455

    摘要: A substrate processing chamber for processing a plurality of wafers in batch mode. In one embodiment the chamber includes a vertically aligned housing having first and second processing areas separated by an internal divider, the first processing area positioned directly over the second processing area; a multi-zone heater operatively coupled to the housing to heat the first and second processing areas independent of each other; a wafer transport adapted to hold a plurality of wafers within the processing chamber and move vertically between the first and second processing areas; a gas distribution system adapted to introduce ozone into the second area and steam into the first processing area; and a gas exhaust system configured to exhaust gases introduced into the first and second processing areas.

    摘要翻译: 一种用于以批处理模式处理多个晶片的衬底处理室。 在一个实施例中,所述腔室包括具有由内部分隔器隔开的第一和第二处理区域的垂直排列的壳体,所述第一处理区域直接位于所述第二处理区域上方; 多区加热器,其可操作地耦合到所述壳体以彼此独立地加热所述第一处理区域和所述第二处理区域; 晶片传送器,其适于将多个晶片保持在处理室内并在第一和第二处理区域之间垂直移动; 气体分配系统,其适于将臭氧引入所述第二区域并将蒸汽引入到所述第一处理区域中; 以及排气系统,其被配置为排出引入到第一和第二处理区域中的气体。

    Preferential dielectric gapfill
    8.
    发明授权
    Preferential dielectric gapfill 有权
    优选电介质填隙

    公开(公告)号:US08476142B2

    公开(公告)日:2013-07-02

    申请号:US13052238

    申请日:2011-03-21

    IPC分类号: H01L21/76

    CPC分类号: H01L21/76229 H01L21/67017

    摘要: Aspects of the disclosure pertain to methods of preferentially filling narrow trenches with silicon oxide while not completely filling wider trenches and/or open areas. In embodiments, dielectric layers are deposited by flowing a silicon-containing precursor and ozone into a processing chamber such that a relatively dense first portion of a silicon oxide layer followed by a more porous (and more rapidly etched) second portion of the silicon oxide layer. Narrow trenches are filled with dense material whereas open areas are covered with a layer of dense material and more porous material. Dielectric material in wider trenches may be removed at this point with a wet etch while the dense material in narrow trenches is retained.

    摘要翻译: 本公开的方面涉及优先用氧化硅填充窄沟槽而不完全填充较宽的沟槽和/或开放区域的方法。 在实施例中,通过使含硅前体和臭氧流入处理室来沉积电介质层,使得氧化硅层的相对致密的第一部分,随后是氧化硅层的更多孔(并且更快蚀刻)的第二部分 。 狭窄的沟槽填充有致密的材料,而开放区域被一层致密材料和更多孔的材料覆盖。 在较宽的沟槽中的电介质材料可以在这一点用湿法蚀刻去除,而狭窄沟槽中的致密材料被保留。

    In-situ ozone cure for radical-component CVD
    9.
    发明授权
    In-situ ozone cure for radical-component CVD 有权
    用于自由基组分CVD的原位臭氧固化

    公开(公告)号:US08304351B2

    公开(公告)日:2012-11-06

    申请号:US12972711

    申请日:2010-12-20

    IPC分类号: H01L21/31 H01L21/469

    摘要: Methods of forming a dielectric layer are described. The methods include the steps of mixing a silicon-containing precursor with a plasma effluent, and depositing a silicon-and-nitrogen-containing layer on a substrate. The silicon-and-nitrogen-containing layer is converted to a silicon-and-oxygen-containing layer by curing in an ozone-containing atmosphere in the same substrate processing region used for depositing the silicon-and-nitrogen-containing layer. Another silicon-and-nitrogen-containing layer may be deposited on the silicon-and-oxygen-containing layer and the stack of layers may again be cured in ozone all without removing the substrate from the substrate processing region. After an integral multiple of dep-cure cycles, the conversion of the stack of silicon-and-oxygen-containing layers may be annealed at a higher temperature in an oxygen-containing environment.

    摘要翻译: 描述形成电介质层的方法。 所述方法包括以下步骤:将含硅前体与等离子体流出物混合,并在基底上沉积含硅和氮的层。 通过在用于沉积含硅和含氮层的相同基板处理区域中的含臭氧的气氛中固化,将含硅和含氮层转化为含硅和氧的层。 可以在含硅和氧的层上沉积另外的含硅和含氮层,并且层叠层可以再次在臭氧中固化而不从衬底处理区移除衬底。 在去固化循环的整数倍之后,可以在含氧环境中的较高温度下退火含硅和氧层层的转化。

    TWO-STAGE OZONE CURE FOR DIELECTRIC FILMS
    10.
    发明申请
    TWO-STAGE OZONE CURE FOR DIELECTRIC FILMS 审中-公开
    用于电介质膜的两级氧化固化

    公开(公告)号:US20120238108A1

    公开(公告)日:2012-09-20

    申请号:US13227161

    申请日:2011-09-07

    IPC分类号: H01L21/316

    摘要: A method of forming a silicon oxide layer is described. The method increases the oxygen content of a dielectric layer by curing the layer in a two-step ozone cure. The first step involves exposing the dielectric layer to ozone while the second step involves exposing the dielectric layer to ozone excited by a local plasma. This sequence can reduce or eliminate the need for a subsequent anneal following the cure step. The two-step ozone cures may be applied to silicon-and-nitrogen-containing film to convert the films to silicon oxide.

    摘要翻译: 描述形成氧化硅层的方法。 该方法通过在两步臭氧固化中固化该层来增加电介质层的氧含量。 第一步涉及将介电层暴露于臭氧,而第二步涉及将电介质层暴露于由局部等离子体激发的臭氧。 该顺序可以减少或消除在固化步骤之后的后续退火的需要。 两步臭氧治疗可以应用于含硅和氮的膜以将膜转化为氧化硅。