公开(公告)号：US12125761B2

公开(公告)日：2024-10-22

申请号：US17467658

申请日：2021-09-07

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Jen-Yuan Chang

IPC分类号： H01L23/16 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01L27/06

CPC分类号： H01L23/3128 ,  H01L21/568 ,  H01L23/16 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2224/32146 ,  H01L2224/32233 ,  H01L2224/83005

摘要： A semiconductor package includes a first die; a second die stacked on the first die in a vertical direction; a dielectric encapsulation (DE) structure surrounding the first die and the second die in a lateral direction perpendicular to the vertical direction; and a package seal ring that extends through the DE structure and surrounds the second die and at least a portion of the first die, in the lateral direction.

公开(公告)号：US12057409B2

公开(公告)日：2024-08-06

申请号：US17571901

申请日：2022-01-10

申请人： SILICONWARE PRECISION INDUSTRIES CO., LTD.

发明人： Chih-Hsien Chiu ,  Wen-Jung Tsai ,  Chien-Cheng Lin ,  Ko-Wei Chang ,  Yu-Wei Yeh ,  Shun-Yu Chien ,  Chia-Yang Chen

IPC分类号： H01L23/00 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H01L23/58

CPC分类号： H01L23/562 ,  H01L23/3121 ,  H01L23/49822

摘要： An electronic package and a manufacturing method of the electronic package are provided, in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure nor cover the electronic component is embedded in the packaging layer.

公开(公告)号：US12057408B2

公开(公告)日：2024-08-06

申请号：US17171475

申请日：2021-02-09

申请人： Samsung Electronics Co., Ltd.

发明人： Chulwoo Kim ,  Yanggyoo Jung ,  Soohyun Nam

IPC分类号： H01L23/00 ,  H01L23/16 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L23/16 ,  H01L23/3185 ,  H01L23/3675 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/0652 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/18161 ,  H01L2924/3511

摘要： A semiconductor package includes a substrate including a wiring, a semiconductor chip structure on the substrate, and electrically connected to the wiring, an underfill resin in a space between the substrate and the semiconductor chip structure, and a stiffener surrounding the semiconductor chip structure, on the substrate, wherein the stiffener includes a conductive frame having a cavity and an insulating filler in the cavity.

公开(公告)号：US20240243076A1

公开(公告)日：2024-07-18

申请号：US18428245

申请日：2024-01-31

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shu-Shen YEH ,  Chin-Hua WANG ,  Po-Chen LAI ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L21/52 ,  H01L23/053 ,  H01L23/16

CPC分类号： H01L23/562 ,  H01L21/52 ,  H01L23/053 ,  H01L23/16

摘要： A semiconductor device package is provided, including a substrate, a semiconductor device, a ring structure, a lid structure, and at least one adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The ring structure comprises a first ring part and a second ring part on opposite sides of the semiconductor device. A first gap is formed between the first ring part and the semiconductor device, a second gap is formed between the second ring part and the semiconductor device, and the first gap is smaller than the second gap. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in the first gap and configured to connect the lid structure and the first surface of the substrate.

公开(公告)号：US20240096820A1

公开(公告)日：2024-03-21

申请号：US18334100

申请日：2023-06-13

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Young Lyong KIM ,  Hyun Soo CHUNG ,  In Hyo HWANG

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H10B80/00

CPC分类号： H01L23/562 ,  H01L21/563 ,  H01L23/16 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/50 ,  H10B80/00 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204

摘要： A method for manufacturing a semiconductor package includes mounting semiconductor chips on an interposer, forming a molding part between the semiconductor chips, surrounding a plurality of bumps between the semiconductor chips and the interposer with a first underfill, forming a sacrificial layer that covers the semiconductor chips, forming a wafer level molding layer that covers the sacrificial layer, performing a planarization process to expose upper sides of the semiconductor chips, form the sacrificial layer into a sacrificial pattern, and form the wafer level molding layer into a wafer level molding pattern, removing the sacrificial pattern, performing a sawing process to remove an outer edge of the semiconductor package, mounting the interposer on a side of a package board, surrounding a plurality of bumps between the package board and the interposer with a second underfill, and attaching a stiffener to an outer portion of the package board.

公开(公告)号：US20240071849A1

公开(公告)日：2024-02-29

申请号：US17822476

申请日：2022-08-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jian-You Chen ,  Kuan-Yu Huang ,  Li-Chung Kuo ,  Chen-Hsuan Tsai ,  Kung-Chen Yeh ,  Hsien-Ju Tsou ,  Ying-Ching Shih ,  Szu-Wei Lu

IPC分类号： H01L23/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L23/16 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/16 ,  H01L2224/16227

摘要： A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.

公开(公告)号：US11908755B2

公开(公告)日：2024-02-20

申请号：US16797307

申请日：2020-02-21

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Sang Jae Jang ,  Weilung Lu ,  Burt Barber ,  Adrian Arcedera ,  Shingo Nakamura

IPC分类号： H01L23/043 ,  H01L21/52 ,  H01L23/06 ,  H01L23/31 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/16 ,  H01L23/055 ,  H01L23/498

CPC分类号： H01L23/043 ,  H01L21/50 ,  H01L21/52 ,  H01L23/04 ,  H01L23/055 ,  H01L23/06 ,  H01L23/10 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3157 ,  H01L23/49838

摘要： In one example, a semiconductor device comprises a substrate comprising a top side, a bottom side, and a conductive structure, a body over the top side of the substrate, an electronic component over the top side of the substrate and adjacent to the body, wherein the electronic component comprises an interface element on a top side of the electronic component, a lid over the interface element and a seal between the top side of the electronic component and the lid, and a buffer on the top side of the substrate between the electronic component and the body. Other examples and related methods are also disclosed herein.

公开(公告)号：US20240030077A1

公开(公告)日：2024-01-25

申请号：US18121158

申请日：2023-03-14

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： SANGHYEON JEONG

IPC分类号： H01L23/16 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48 ,  H01L23/13

CPC分类号： H01L23/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L21/4846 ,  H01L23/13 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L24/16

摘要： A package includes a lower substrate, a lower chip provided on the lower substrate, posts provided on an edge of the lower substrate and outside of the lower chip, an upper substrate provided on the posts and the lower chip, the upper substrate including a cavity formed on a bottom surface of the upper substrate, and a crack stiffener provided at an edge of the cavity, where the crack stiffener is configured to reduce formation of a crack in the upper substrate.

公开(公告)号：US11830823B2

公开(公告)日：2023-11-28

申请号：US17015147

申请日：2020-09-09

申请人： Amkor Technology Singapore Holding Pte. Ltd

发明人： Tae Ki Kim ,  Jae Beom Shim ,  Min Jae Yi ,  Yi Seul Han ,  Young Ju Lee ,  Kyeong Tae Kim

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/16 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/3025 ,  H01L2924/3512

摘要： In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via. The multi-stage terminal includes a pad base within the first opening having a pad base top side recessed below an upper surface the first dielectric and a pad head coupled to the pad base within the first opening, the pad head having a pad head top side with a micro dimple. Other examples and related methods are also disclosed herein.

公开(公告)号：US20230378078A1

公开(公告)日：2023-11-23

申请号：US18360656

申请日：2023-07-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shin-Puu JENG ,  Po-Hao TSAI ,  Po-Yao CHUANG ,  Techi WONG

IPC分类号： H01L23/538 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/16 ,  H01L21/683

CPC分类号： H01L23/5389 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/3114 ,  H01L25/105 ,  H01L24/20 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L25/50 ,  H01L24/19 ,  H01L23/5383 ,  H01L23/16 ,  H01L21/563 ,  H01L23/3128 ,  H01L21/6835 ,  H01L21/56 ,  H01L2224/214 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2224/92125 ,  H01L2224/13111 ,  H01L2224/11462 ,  H01L2224/16225 ,  H01L24/16 ,  H01L2224/13082 ,  H01L2224/81001 ,  H01L24/13 ,  H01L2924/181 ,  H01L2924/1304 ,  H01L2924/1203 ,  H01L2221/68345 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2221/68381 ,  H01L2224/11464 ,  H01L2224/13147 ,  H01L2924/15321 ,  H01L2224/73204

摘要： A package structure is provided. The package structure includes a redistribution structure and a semiconductor chip bonded to the redistribution structure. The package structure also includes an adhesive layer directly on the semiconductor chip. The redistribution structure is wider than the adhesive layer. The package structure further includes an interposer substrate bonded to the redistribution structure. A bottommost surface of the interposer substrate is spaced apart from a topmost surface of the redistribution structure.