公开(公告)号：WO2006068453A1

公开(公告)日：2006-06-29

申请号：PCT/KR2005/004508

申请日：2005-12-23

Applicant: Hynix Semiconductor Inc. ,  KIL, Deok Sin ,  HONG, Kwon ,  YEOM, Seung Jin

Inventor： KIL, Deok Sin ,  HONG, Kwon ,  YEOM, Seung Jin

IPC: H01L27/108

CPC classification number: C23C16/40 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/31641 ,  H01L27/10814 ,  H01L28/40

Abstract: Provided is a method for forming a dielectric film in a semiconductor device, wherein the method can improve a dielectric characteristic and a leakage current characteristic. According to specific embodiments of the present invention, the method for forming a dielectric film includes: forming a zirconium dioxide (ZrO2) layer over a wafer in a predetermined thickness that does not allow continuous formation of the ZrO2 layer; and forming an aluminum oxide (AI2O3) layer over portions of the wafer where the ZrO2 layer is not formed, in a predetermined thickness that does not allow continuous formation of the Al2O3 layer.

Abstract translation: 提供一种在半导体器件中形成电介质膜的方法，其中该方法可以改善介电特性和漏电流特性。 根据本发明的具体实施方案，形成电介质膜的方法包括：在不允许连续形成ZrO 2层的预定厚度的晶片上形成二氧化锆（ZrO 2）层; 并且在不形成ZrO 2层的晶片的部分上形成氧化铝（Al 2 O 3）层，其厚度不能连续地形成Al 2 O 3层。

公开(公告)号：WO2005124888A1

公开(公告)日：2005-12-29

申请号：PCT/US2005/019792

申请日：2005-06-06

Applicant: PRESIDENT AND FELLOWS OF HARVARD COLLEGE

Inventor： GOLOVCHENKO, Jene ,  PENG, Haibing

IPC: H01L51/20

CPC classification number: H01L51/0512 ,  B82Y10/00 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/3185 ,  H01L51/002 ,  H01L51/0048

Abstract: The invention provides a carbon nanotube field effect transistor including a nanotube having a length suspended between source and drain electrodes. A gate dielectric material coaxially coats the suspended nanotube length and at least a portion of the source and drain electrodes. A gate metal layer coaxially coats the gate dielectric material along the suspended nanotube length and overlaps a portion of the source and drain electrodes, and is separated from those electrode portions by the gate dielectric material. The nanotube field effect transistor is fabricated by coating substantially the full suspended nanotube length and a portion of the source and drain electrodes with a gate dielectric material. Then the gate dielectric material along the suspended nanotube length and at least a portion of the gate dielectric material on the source and drain electrodes are coated with a gate metal layer.

Abstract translation: 本发明提供一种碳纳米管场效应晶体管，其包括长度悬置在源极和漏极之间的纳米管。 栅介电材料同时涂覆悬浮的纳米管长度和至少一部分源极和漏极。 栅极金属层沿着悬挂的纳米管长度同轴地涂覆栅极电介质材料，并与源极和漏极的一部分重叠，并通过栅极电介质材料与那些电极部分分离。 纳米管场效应晶体管通过用栅极电介质材料基本上涂覆完全悬浮的纳米管长度和一部分源极和漏极来制造。 然后沿着悬浮的纳米管长度的栅极电介质材料和源极和漏极上的栅极电介质材料的至少一部分涂覆有栅极金属层。

公开(公告)号：WO2004108985A3

公开(公告)日：2005-06-30

申请号：PCT/IB2004001642

申请日：2004-05-19

Applicant: AIR LIQUIDE

Inventor： JURSICH GREGORY M ,  INMAN RONALD S

IPC: C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  C23C16/30 ,  C23C16/34

CPC classification number: C23C16/45553 ,  C23C16/403 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02194 ,  H01L21/02205 ,  H01L21/0228 ,  H01L21/3145 ,  H01L21/31616 ,  H01L21/31645 ,  H01L21/318

Abstract: A method of forming an aluminum containing film on a substrate includes providing a precursor having the chemical structure: AI(NR1R2)(NR3R4)(NR5R6); where each of R1, R2, R3, R4, R5 and R6 is independently selected from the group consisting of hydrogen and an alkyl group including at least two carbon atoms. The precursor is utilized to form a film on the substrate including at least one of aluminum oxide, aluminum nitride and aluminum oxy-nitride. Each of the R1 - R6 groups can be the same or different and can by straight or branched chain alkyls. An exemplary precursor that has is useful in forming aluminum containing films is tris diethylamino aluminum.

Abstract translation: 在基板上形成含铝膜的方法包括提供具有以下化学结构的前体：Al（NR1R2）（NR3R4）（NR5R6）; 其中R 1，R 2，R 3，R 4，R 5和R 6各自独立地选自氢和包括至少两个碳原子的烷基。 该前体用于在基底上形成包含氧化铝，氮化铝和氮氧化铝中的至少一种的膜。 每个R 1 -R 6基团可以相同或不同，并且可以通过直链或支链烷基。 可用于形成含铝膜的示例性前体是三乙基氨基铝。

公开(公告)号：WO03100859A9

公开(公告)日：2005-04-07

申请号：PCT/EP0305415

申请日：2003-05-23

Applicant: SCHOTT AG ,  LEIB JUERGEN ,  MUND DIETRICH

Inventor： LEIB JUERGEN ,  MUND DIETRICH

IPC: H05K3/46 ,  B81C1/00 ,  C03B19/00 ,  C03C4/12 ,  C03C14/00 ,  C03C15/00 ,  C03C17/02 ,  C03C17/34 ,  C23C14/10 ,  H01L21/316 ,  H01L21/50 ,  H01L21/56 ,  H01L21/768 ,  H01L23/10 ,  H01L23/29 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/532 ,  H01L23/66 ,  H01L51/52 ,  H01P11/00 ,  H05K3/28

CPC classification number: C03B19/00 ,  C03C3/083 ,  C03C3/089 ,  C03C4/12 ,  C03C14/006 ,  C03C15/00 ,  C03C17/02 ,  C03C17/34 ,  C03C2214/16 ,  C03C2217/21 ,  C03C2217/77 ,  C03C2218/15 ,  C03C2218/32 ,  C03C2218/328 ,  C03C2218/33 ,  C03C2218/355 ,  C23C14/10 ,  H01L21/02129 ,  H01L21/02145 ,  H01L21/02161 ,  H01L21/02263 ,  H01L21/31616 ,  H01L21/31625 ,  H01L21/50 ,  H01L21/56 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76885 ,  H01L23/10 ,  H01L23/291 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49894 ,  H01L23/66 ,  H01L24/97 ,  H01L51/5203 ,  H01L51/5237 ,  H01L51/5262 ,  H01L2223/6627 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/0106 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1903 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H01P3/003 ,  H01P11/003 ,  H05K3/28 ,  H05K3/467 ,  H05K2201/0179 ,  Y02P40/57 ,  H01L2924/00

Abstract: The invention relates to a method for producing a substrate (1) comprising a conductor assembly (4, 41, 42) that is suitable for use at high frequencies, said substrate having improved high-frequency characteristics. The method comprises the following steps: deposition of a structured glass layer (9, 91, 92, 93, 13) comprising at least one opening (8) above a contact region (71 - 74) by vapour deposition on the substrate (1); and application of at least one conductor structure (100, 111, 112, 113) to the glass layer (9, 91 - 93), which is in electric contact with the contact region (71 - 74).

Abstract translation: 本发明提供了一种具有高频合适的导体装置（4,41,42）的衬底（1）的制造方法，该装置具有改进的高频特性。 该方法包括以下步骤：通过在基板（1）上的气相沉积在接触区域（71-74）上沉积具有至少一个开口（8）的结构化玻璃层（9,91,92,93,13），并且施加至少一个 玻璃层（9,91-93）上的导体结构（100,111,112,113），其与接触区域（71-74）具有电接触。

公开(公告)号：WO2005029568A2

公开(公告)日：2005-03-31

申请号：PCT/US2004026811

申请日：2004-08-19

Applicant: TOKYO ELECTRON LTD ,  IBM ,  O'MEARA DAVID L ,  WAJDA CORY ,  TAKAHASHI TSUYOSHI ,  CALLEGARI ALESSANDRO ,  SCHEER KRISTEN ,  ZAFAR SUFI ,  JAMISON PAUL

Inventor： O'MEARA DAVID L ,  WAJDA CORY ,  TAKAHASHI TSUYOSHI ,  CALLEGARI ALESSANDRO ,  SCHEER KRISTEN ,  ZAFAR SUFI ,  JAMISON PAUL

IPC: H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  C23C16/34 ,  H01L21/00 ,  H01L21/66

CPC classification number: H01L21/28185 ,  H01L21/02181 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/3143 ,  H01L21/31604 ,  H01L21/31616 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31658 ,  H01L21/31662 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: A method is provided for forming a microstructure with an interfacial oxide layer by using a diffusion filter layer to control the oxidation properties of a substrate associated with formation of a high-k layer into the microstructure. The diffusion filter layer controls the oxidation of the surface. The interfacial oxide layer can be formed during an oxidation process that is carried out following deposition of a high­k layer onto the diffusion filter layer, or during deposition of a high-k layer onto the diffusion filter layer.

Abstract translation: 提供了一种用于通过使用扩散过滤层来形成具有界面氧化物层的微观结构以控制与形成高k层的微结构相关联的衬底的氧化性能的方法。 扩散过滤层控制表面的氧化。 可以在氧化过程中形成界面氧化物层，该氧化工艺是在将highk层沉积到扩散过滤层上之后，或者在将高k层沉积到扩散过滤层上时进行的。

公开(公告)号：WO2005017963A2

公开(公告)日：2005-02-24

申请号：PCT/US2004/025130

申请日：2004-08-03

Applicant: ASM AMERICA, INC. ,  WILK, Glen

Inventor： WILK, Glen

IPC: H01L

CPC classification number: H01L21/31658 ,  C23C16/0245 ,  C23C16/0281 ,  C23C16/405 ,  C23C16/45525 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/02315 ,  H01L21/28158 ,  H01L21/28194 ,  H01L21/28255 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31604 ,  H01L21/31616 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66477

Abstract: Methods are provided for treating germanium surfaces (200) in preparation for subsequent deposition, particularly gate dielectric deposition by atomic layer deposition (ALD). Prior to depositing, the germanium surface (200) is treated with plasma products or thermally reacted with vapor reactants. Examples of surface treatments leave oxygen bridges, nitrogen bridges, -OH, -NH and/or -NH 2 terminations that more readily adsorb ALD reactants. The surface treatments avoid deep penetration of the reactants into the germanium bulk but improve nucleation.

Abstract translation: 提供了用于处理锗表面（200）以准备随后的沉积，特别是通过原子层沉积（ALD）的栅极电介质沉积的方法。 在沉积之前，锗表面（200）用等离子体产物处理或与蒸气反应物热反应。 表面处理的例子留下更容易吸附ALD反应物的氧桥，氮桥，-OH，-NH和/或-NH2端基。 表面处理避免了反应物深入渗入锗块，但改善了成核。

公开(公告)号：WO2004093168A1

公开(公告)日：2004-10-28

申请号：PCT/SG2004/000065

申请日：2004-03-22

Applicant: INFINEON TECHNOLOGIES AG ,  KABUSHIKI KAISHA TOSHIBA ,  HORNIK, Karl ,  ZHUANG, Haoren ,  MOON, Bum-Ki ,  HILLIGER, Andreas ,  NATORI, Katsuaki

Inventor： HORNIK, Karl ,  ZHUANG, Haoren ,  MOON, Bum-Ki ,  HILLIGER, Andreas ,  NATORI, Katsuaki

IPC: H01L21/02

CPC classification number: H01L28/57 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/0228 ,  H01L21/28568 ,  H01L21/3141 ,  H01L21/31616 ,  H01L28/65 ,  H01L28/75

Abstract: A ferrocapacitor device comprising a ferroelectric capacitor structure which includes a bottom electrode (5), a ferroelectric layer (7), and a top electrode (9), formed over a substructure (1). A first Al 2 0 3 cover layer (15) is deposited over the structure by a physical vapour deposition process (such as sputtering), and a second Al 2 0 3 cover layer (17) is deposited over the first Al 2 0 3 cover layer (15) by atomic layer deposition. The first Al 2 0 3 cover layer (15) protects the capacitor structure during the formation of the second Al 2 0 3 cover layer (17), and the second Al 2 0 3 cover layer (17) protects the capacitor structure during back end processes performed on the FeRAM device.

Abstract translation: 一种铁电体器件，包括形成在子结构（1）上的包括底部电极（5），铁电体层（7）和顶部电极（9）的铁电电容器结构。 通过物理气相沉积工艺（例如溅射）在结构上沉积第一Al 2 O 3覆盖层（15），并且通过原子层沉积在第一Al 2 O 3覆盖层（15）上沉积第二Al 2 O 3覆盖层（17）。 第一Al 2 O 3覆盖层（15）在形成第二Al 2 O 3覆盖层（17）期间保护电容器结构，并且第二Al 2 O 3覆盖层（17）在对FeRAM器件执行的后端处理期间保护电容器结构。

公开(公告)号：WO2004077519A2

公开(公告)日：2004-09-10

申请号：PCT/US2004/005531

申请日：2004-02-26

Applicant: NARASIMHAN, Mukundan ,  DEMARAY, Richard, E. ,  BROOKS, Peter

Inventor： NARASIMHAN, Mukundan ,  DEMARAY, Richard, E. ,  BROOKS, Peter

IPC: H01L

CPC classification number: C23C14/345 ,  C23C14/35 ,  H01L21/02145 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02186 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/02304 ,  H01L21/31604 ,  H01L21/31608 ,  H01L21/31612 ,  H01L21/31616 ,  H01L21/31637 ,  H01L21/31691 ,  H01L51/5253 ,  H01L51/5256 ,  H01L51/5265 ,  Y10S438/958

Abstract: In accordance with the present invention, a dielectric barrier layer is presented. A barrier layer according to the present invention includes a densified amorphous dielectric layer deposited on a substrate by pulsed-DC, substrate biased physical vapor deposition, wherein the densified amorphous dielectric layer is a barrier layer. A method of forming a barrier layer according to the present inventions includes providing a substrate and depositing a highly densified, amorphous, dielectric material over the substrate in a pulsed-dc, biased, wide target physical vapor deposition process. Further, the process can include performing a soft-metal breath treatment on the substrate. Such barrier layers can be utilized as electrical layers, optical layers, immunological layers, or tribological layers.

Abstract translation: 根据本发明，提供介电阻挡层。 根据本发明的阻挡层包括通过脉冲DC，衬底偏置物理气相沉积沉积在衬底上的致密非晶介质层，其中致密的非晶介质层是阻挡层。 根据本发明的形成阻挡层的方法包括在脉冲直流偏置的宽目标物理气相沉积工艺中在衬底上提供衬底和沉积高度致密化的非晶形介电材料。 此外，该方法可以包括在基材上进行软金属呼吸处理。 这样的阻挡层可以用作电层，光学层，免疫层或摩擦学层。

公开(公告)号：WO2004042804A2

公开(公告)日：2004-05-21

申请号：PCT/US2003/034727

申请日：2003-10-31

Applicant: PLANAR SYSTEMS, INC. ,  AITCHISON, Bradley, J ,  PAKKALA, Arto ,  KUOSMANEN, Pekka ,  HÄRKÖNEN, Kari

Inventor： AITCHISON, Bradley, J ,  PAKKALA, Arto ,  KUOSMANEN, Pekka ,  HÄRKÖNEN, Kari

IPC: H01L21/02

CPC classification number: H01L21/02175 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02362 ,  H01L21/3142 ,  H01L21/31604 ,  H01L21/31616 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/10805 ,  H01L27/10829 ,  H01L27/1085 ,  H01L27/10861 ,  H01L28/84 ,  H01L29/66181 ,  H01L29/945

Abstract: A dielectric structure (304) formed on a substrate (300) using a thin film deposition technique such as atomic layer deposition (ALD) includes at least one layer of current leakage inhibiting dielectric material (310), such as Al 2 O 3 , HfO 2 , or ZrO 2 , for example, in combination with niobium oxide (Nb 2 O 5 ). The Nb 2 O 5 is either incorporated into the dielectric structure as a dopant in a layer of the current leakage inhibiting material (310) or as one or more separate layers (320, 340) in addition to the layer or layers of current leakage inhibiting material (310). The dielectric structure (304) may be used in miniature capacitors for integrated circuit devices such as DRAM devices, for example. In some embodiments, one or more capacitor electrodes (300, 390) are formed around the dielectric structure (304) in the same ALD processing system. One or more of the electrodes (300, 390) may comprise a transition metal nitride, a noble metal, or a noble metal alloy.

Abstract translation: 使用诸如原子层沉积（ALD）之类的薄膜沉积技术在衬底（300）上形成的电介质结构（304）包括至少一个电流泄漏抑制电介质材料（310）层， 例如Al 2 O 3 3，HfO 2或ZrO 2，例如与氧化铌的组合 （铌<子> 2 0 <子> 5 ）。 在电流泄漏抑制材料（310）的层中或者作为一个或多个单独的层（320）将Nb 2 O 5或者纳入电介质结构中作为掺杂剂 ，340）以及电流泄漏抑制材料（310）的层。 例如，电介质结构（304）可以用于诸如DRAM器件的集成电路器件的微型电容器。 在一些实施例中，在同一ALD处理系统中的电介质结构（304）周围形成一个或多个电容器电极（300,390）。 一个或多个电极（300,390）可以包括过渡金属氮化物，贵金属或贵金属合金。

公开(公告)号：WO03100859A2

公开(公告)日：2003-12-04

申请号：PCT/EP0305415

申请日：2003-05-23

Applicant: SCHOTT GLAS ,  ZEISS STIFTUNG ,  LEIB JUERGEN ,  MUND DIETRICH

Inventor： LEIB JUERGEN ,  MUND DIETRICH

IPC: H05K3/46 ,  B81C1/00 ,  C03B19/00 ,  C03C4/12 ,  C03C14/00 ,  C03C15/00 ,  C03C17/02 ,  C03C17/34 ,  C23C14/10 ,  H01L21/316 ,  H01L21/50 ,  H01L21/56 ,  H01L21/768 ,  H01L23/10 ,  H01L23/29 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/532 ,  H01L23/66 ,  H01L51/52 ,  H01P11/00 ,  H05K3/28

CPC classification number: C03B19/00 ,  C03C3/083 ,  C03C3/089 ,  C03C4/12 ,  C03C14/006 ,  C03C15/00 ,  C03C17/02 ,  C03C17/34 ,  C03C2214/16 ,  C03C2217/21 ,  C03C2217/77 ,  C03C2218/15 ,  C03C2218/32 ,  C03C2218/328 ,  C03C2218/33 ,  C03C2218/355 ,  C23C14/10 ,  H01L21/02129 ,  H01L21/02145 ,  H01L21/02161 ,  H01L21/02263 ,  H01L21/31616 ,  H01L21/31625 ,  H01L21/50 ,  H01L21/56 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76885 ,  H01L23/10 ,  H01L23/291 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49894 ,  H01L23/66 ,  H01L24/97 ,  H01L51/5203 ,  H01L51/5237 ,  H01L51/5262 ,  H01L2223/6627 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/0106 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1903 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H01P3/003 ,  H01P11/003 ,  H05K3/28 ,  H05K3/467 ,  H05K2201/0179 ,  Y02P40/57 ,  H01L2924/00

Abstract: The invention relates to a method for producing a substrate (1) comprising a conductor assembly (4, 41, 42) that is suitable for use at high frequencies, said substrate having improved high-frequency characteristics. The method comprises the following steps: deposition of a structured glass layer (9, 91, 92, 93, 13) comprising at least one opening (8) above a contact region (71 - 74) by vapour deposition on the substrate (1); and application of at least one conductor structure (100, 111, 112, 113) to the glass layer (9, 91 - 93), which is in electric contact with the contact region (71 - 74).

Abstract translation: 本发明提供了用于制造基底（1）与高频兼容导体装置（4，41，42），其具有改善的高频特性的方法。 其方法包括以下步骤：沉积玻璃（9，91，92，93，13）的图案化层具有至少一个开口（8）经由接触区（71-74）通过气相沉积在基板（1），上和施加至少一个 导体结构（100，111，112，113）的玻璃层（9，91 - 93），其上使与接触区电接触（71-74）包括。