公开(公告)号：WO2019147186A1

公开(公告)日：2019-08-01

申请号：PCT/SG2019/050039

申请日：2019-01-24

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

Inventor： LI, Hongyu ,  XIE, Ling ,  CHONG, Ser Choong ,  WICKRAMANAYAKA, Sunil

IPC: H01L21/768 ,  H01L23/48

Abstract: Various embodiments may provide a method of forming an electrical connection structure. The method may include forming a cavity on a front surface of a substrate, the substrate including an electrically conductive pad, by etching through the electrically conductive pad. The method may also include forming one or more dielectric liner layers covering an inner surface of the cavity. The method may further include forming a via hole extending from the cavity by etching through the one or more dielectric liner layers, forming one or more further dielectric liner layers covering an inner surface of the via hole. The method may additionally include depositing a suitable electrically conductive material into the cavity and the via hole to form a conductive via having a first portion in the cavity and a second portion in the via hole, a diameter of the first portion different from a diameter of the second portion.

公开(公告)号：WO2011099934A1

公开(公告)日：2011-08-18

申请号：PCT/SG2010/000048

申请日：2010-02-10

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH ,  CHOI, Won Kyoung ,  PREMACHANDRAN, Chiraharikathu Veedu Sankarapillai ,  XIE, Ling ,  LIAO, Ebin ,  ONG, Siong Chiew Joe ,  BAI, Kewu

Inventor： CHOI, Won Kyoung ,  PREMACHANDRAN, Chiraharikathu Veedu Sankarapillai ,  XIE, Ling ,  LIAO, Ebin ,  ONG, Siong Chiew Joe ,  BAI, Kewu

IPC: H01L23/488 ,  H05K1/09

CPC classification number: H01L23/49816 ,  H01L23/49866 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32145 ,  H01L2224/83193 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/83894 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/351 ,  H05K3/3463 ,  H05K2201/0338 ,  H01L2924/00 ,  H01L2924/3512

Abstract: In an embodiment, a method of forming a bonded structure is provided. The method may include forming at least one first under bump metallurgy (UBM) structure on a first substrate, forming a first gold layer on the at least one first under bump metallurgy structure; forming a tin layer on the first gold layer, forming an indium layer on the tin layer, forming an inhibition layer configured to inhibit oxygen penetration on the indium layer, and forming at least one second under bump metallurgy structure on a second substrate, forming s second gold layer on the at least one second under bump metallurgy structure; and bringing the inhibition layer into contact with the second gold layer at a predetermined temperature to form a resultant intermetallic structure between the first substrate and the second substrate thereby bonding the first substrate to the second substrate and forming the bonded structure.

Abstract translation: 在一个实施例中，提供了形成接合结构的方法。 该方法可以包括在第一衬底上形成至少一个第一凸点下金属（UBM）结构，在该至少一个第一凸点下金属结构上形成第一金层; 在所述第一金层上形成锡层，在所述锡层上形成铟层，形成抑制氧层在所述铟层上的渗透的抑制层，以及在第二基板上形成至少一个第二凸块下金属结构，形成s 在所述至少一个第二凸块下金属结构上的第二金层; 并且使所述抑制层与所述第二金层在预定温度下接触以在所述第一基板和所述第二基板之间形成所得的金属间结构，从而将所述第一基板接合到所述第二基板并形成所述接合结构。

公开(公告)号：WO2011021981A1

公开(公告)日：2011-02-24

申请号：PCT/SG2009/000284

申请日：2009-08-17

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH ,  XIE, Ling ,  PREMACHANDRAN, Chirayharikathu, Veedu, Sankarapillai ,  MYO, Ei Pa Pa ,  ORATTI KALANDAR, Navas Khan ,  KRIPESH, Vaidyanathan ,  NEUZIL, Pavel ,  LAU, Hon-Shing, John

Inventor： XIE, Ling ,  PREMACHANDRAN, Chirayharikathu, Veedu, Sankarapillai ,  MYO, Ei Pa Pa ,  ORATTI KALANDAR, Navas Khan ,  KRIPESH, Vaidyanathan ,  NEUZIL, Pavel ,  LAU, Hon-Shing, John

IPC: H01L21/00

CPC classification number: H01L21/78

Abstract: Embodiments provide a method of dicing a wafer having an active surface and an inactive surface opposing the active surface, wherein the active surface comprises components sensitive to at least one of liquid, pressure and vibration. The method includes applying a protecting layer on at least a portion of the inactive surface of the wafer; and dry dicing through the wafer from the inactive surface of the wafer through the protecting layer and the wafer to form a plurality of dies separated from each other.

Abstract translation: 实施例提供了一种切割具有活性表面和与活性表面相对的非活性表面的晶片的方法，其中活性表面包括对液体，压力和振动中的至少一种敏感的成分。 该方法包括在晶片的非活性表面的至少一部分上施加保护层; 并且通过晶片从晶片的非活性表面通过保护层和晶片干燥切割以形成彼此分离的多个管芯。

公开(公告)号：WO2016064350A1

公开(公告)日：2016-04-28

申请号：PCT/SG2015/050407

申请日：2015-10-23

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

Inventor： XIE, Ling ,  WICKRAMANAYAKA, Sunil

IPC: H01L23/48 ,  H01L25/00 ,  H01L21/768 ,  H01L21/60

CPC classification number: H01L24/13 ,  H01L23/48 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05109 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/11464 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1369 ,  H01L2224/16145 ,  H01L2224/8112 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/81856 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2924/14 ,  H01L2924/3841 ,  H01L2224/81

Abstract: A method for bonding a first substrate and a second substrate, the first substrate having at least one first connection extending from one side of the first substrate, the method comprising fabricating a first adhesive material around and along a height of the at least one first connection; and bonding the at least one first connection, the first adhesive material, and the second substrate.

Abstract translation: 一种用于接合第一基板和第二基板的方法，所述第一基板具有从所述第一基板的一侧延伸的至少一个第一连接，所述方法包括在所述至少一个第一连接的高度周围和沿着所述至少一个第一连接的高度 ; 以及接合所述至少一个第一连接部，所述第一粘合材料和所述第二基板。

公开(公告)号：WO2015195052A1

公开(公告)日：2015-12-23

申请号：PCT/SG2015/050173

申请日：2015-06-22

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

Inventor： WICKRAMANAYAKA, Sunil ,  XIE, Ling ,  AW, Jerry Jie Li

IPC: H01L21/98 ,  H01L23/13 ,  H01L23/48 ,  H01L23/52 ,  H01L25/00

CPC classification number: H01L24/81 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13611 ,  H01L2224/16225 ,  H01L2224/81022 ,  H01L2224/8109 ,  H01L2224/81097 ,  H01L2224/81099 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8181 ,  H01L2224/8182 ,  H01L2224/8183 ,  H01L2224/81986 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/9205

Abstract: A method for chip on wafer bonding is provided. The method includes the formation of a plurality of posts on at least one of a chip and a wafer, and a like plurality of contacts on the other of the chip and the wafer. After formation, a contact surface of each post is planarized, the respective planarized contact surface having a surface roughness height. A bonding material is then applied to at least one of the chip in a thickness no greater than the surface roughness height of the contact surface. The posts are then temporarily bonded to the contacts using the bonding material to stabilize a position of the chip relative to the wafer for permanent diffusion bonding of the chip to the wafer.

Abstract translation: 提供了一种晶片接合芯片的方法。 该方法包括在芯片和晶片中的至少一个上形成多个柱，以及在芯片和晶片的另一个上形成类似的多个触点。 在形成后，每个柱的接触表面被平坦化，相应的平坦化接触表面具有表面粗糙度高度。 然后将接合材料施加到不大于接触表面的表面粗糙度高度的厚度中的至少一个芯片。 然后使用接合材料将柱临时粘接到触点，以稳定芯片相对于晶片的位置，以将芯片永久扩散粘合到晶片。

公开(公告)号：WO2013191656A1

公开(公告)日：2013-12-27

申请号：PCT/SG2013/000252

申请日：2013-06-18

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

Inventor： CHIDAMBARAM, Vivek ,  XIE, Ling ,  NAGARAJAN, Ranganathan ,  CHEN, Bangtao ,  HO, Beng Yeung

IPC: B32B15/01 ,  H01J19/70 ,  H01L23/26 ,  H01L23/10

CPC classification number: H01L23/26 ,  B81B7/0038 ,  B81C1/00285 ,  C22C14/00 ,  C22C19/03 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a layer arrangement and a wafer level package comprising the layer arrangement, and in particular, the layer arrangement comprises a getter layer and further comprises a sacrificial layer. The wafer level package may be used in microelectromechanical systems (MEMS) packaging at a vacuum level of about 10 mTorr or less such as close to 1 mTorr (i.e. MEMS vacuum packaging).

Abstract translation: 本发明涉及一种层布置和包括层布置的晶片级封装，并且具体地，该层布置包括吸气剂层并且还包括牺牲层。 晶片级封装可以在大约10mTorr或更小的真空度，例如接近1mTorr（即MEMS真空封装）的微电子机械系统（MEMS）封装中使用。

公开(公告)号：WO2008036045A1

公开(公告)日：2008-03-27

申请号：PCT/SG2006/000276

申请日：2006-09-19

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH ,  XIE, Ling ,  PREMACHANDRAN, Chirayarikathuveedu Sankarapillai ,  CHONG, Ser Choong

Inventor： XIE, Ling ,  PREMACHANDRAN, Chirayarikathuveedu Sankarapillai ,  CHONG, Ser Choong

IPC: F15C1/00 ,  F15C1/04

CPC classification number: F15C5/00 ,  Y10T137/218 ,  Y10T137/2213 ,  Y10T137/2218 ,  Y10T137/2224

Abstract: A dispenser arrangement for fluidic dispensing control into a microfluidic component comprising an enclosed fluid holding area having a base portion and a top portion and a valve adapted to be movable between an open position and a closed position and positioned at least partially in the fluid holding area. The valve comprises an elongated hollow portion having a body and two ends adapted for fluid flow from the fluid holding area to the microfluidic component in the open position, a first opening on the body of the hollow portion positioned within the fluid holding area allowing fluid communication from the fluid holding area to the microfluidic component in the open position, a sealing portion connected to a first end of the hollow portion positioned within the fluid holding area adapted for sealing connection with the top portion of the fluid holding area in the closed position and a slant second opening at a second end of the hollow portion positioned outside of the fluid holding area. The slant second opening is adapted to pierce through a sealing layer covering the microfluidic component in the open position and to insert into a first substrate housing the microfluidic component in the closed position. A dispenser unit comprising a dispenser arrangement and an actuator, wherein the actuator is a piston is also disclosed.

Abstract translation: 一种用于流体分配控制到微流体部件的分配器装置，包括具有基部和顶部的封闭流体保持区域和适于在打开位置和关闭位置之间移动并且至少部分地定位在流体保持区域中的阀 。 阀包括细长的中空部分，其具有本体，并且两端适于在打开位置中从流体保持区域流到微流体部件，位于流体保持区域内的中空部分的主体上的第一开口允许流体连通 从所述流体保持区域到所述微流体部件处于所述打开位置，密封部分连接到位于所述流体保持区域内的所述中空部分的第一端，所述第一端适于密封与所述关闭位置中的所述流体保持区域的顶部部分的连接;以及 在位于流体保持区域外部的中空部分的第二端处的倾斜的第二开口。 倾斜的第二开口适于在打开位置刺穿覆盖微流体部件的密封层并插入到处于关闭位置的容纳微流体部件的第一基板。 还公开了一种分配器单元，其包括分配器装置和致动器，其中致动器是活塞。

公开(公告)号：WO2006088427A1

公开(公告)日：2006-08-24

申请号：PCT/SG2005/000038

申请日：2005-02-15

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH ,  NATIONAL UNIVERSITY OF SINGAPORE ,  CHONG, Ser, Choong ,  XIE, Ling ,  JI, Hongmiao ,  LI, Jing ,  CHEN, Yu ,  YOBAS, Levent

Inventor： CHONG, Ser, Choong ,  XIE, Ling ,  JI, Hongmiao ,  LI, Jing ,  CHEN, Yu ,  YOBAS, Levent

IPC: B81B1/00 ,  B01L3/00

CPC classification number: B81B7/0061 ,  B01F5/0603 ,  B01F13/0059 ,  B01L3/502707 ,  B01L3/502715 ,  B01L9/527 ,  B01L2200/028 ,  B01L2200/12 ,  B01L2300/0816 ,  B01L2300/0887 ,  B81B2201/051 ,  B81B2201/058

Abstract: A microfluidics package (1) comprising a substrate (6) having a top surface, said top surface comprises at least one fluid channel (11, 12), at least one fluidic chip (2) having a top surface, a bottom surface, at least one side surface, and at least one passage to allow a fluid to traverse from the top surface or any side surface to the bottom surface of the chip; and a sheet (4) of which both sides are adhesive, wherein the first adhesive side of the sheet (4) is secured to the substrate (6), and the at least one fluidic chip (2) is secured by the second adhesive side of the sheet (4), said fluidic chip (2) being arranged such that the at least one passage of the fluidic chip is in fluid communication with the at least one fluid channel (11, 12) of the substrate.

Abstract translation: 一种微流体封装（1），包括具有顶表面的衬底（6），所述顶表面包括至少一个流体通道（11,12），至少一个流体芯片（2），其具有顶表面，底表面 至少一个侧表面和至少一个通道，以允许流体从所述芯片的顶表面或任何侧表面穿过所述底表面; 和其中两侧是粘合剂的片材（4），其中片材（4）的第一粘合剂侧固定到基底（6）上，并且至少一个流体碎片（2）由第二粘合剂侧 所述流体芯片（2）布置成使得流体芯片的至少一个通道与基板的至少一个流体通道（11,12）流体连通。