公开(公告)号：WO2011087485A2

公开(公告)日：2011-07-21

申请号：PCT/US2010/003213

申请日：2010-12-20

Applicant: TESSERA RESEARCH LLC ,  HABA, Belgacem ,  DAMBERG, Philip ,  OSBORN, Philip, R.

Inventor： HABA, Belgacem ,  DAMBERG, Philip ,  OSBORN, Philip, R.

IPC: H01L23/49

CPC classification number: H01L23/49816 ,  H01L21/50 ,  H01L23/13 ,  H01L23/49861 ,  H01L24/01 ,  H01L24/36 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/05554 ,  H01L2224/40091 ,  H01L2224/40225 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48477 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49112 ,  H01L2224/4942 ,  H01L2224/49427 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/85051 ,  H01L2224/85191 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/48095 ,  H01L2224/37099 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A microelectronic assembly (100) includes a semiconductor chip (110, 1110) having chip contacts (112) exposed at a first face and a substrate (130, 1130) juxtaposed with a face (128, 129) of the chip (110, 1110). A conductive bond element (144) can electrically connect a first chip contact (112) with a first substrate contact (132, 1132) of the substrate, and a second conductive bond element (146) can electrically connect the first chip contact (112, 132) with a second substrate contact. The first bond element (144) can have a first end (244A, 344A) metallurgically joined to the first chip contact (112, 212A) and a second end (244B, 344B) metallurgically joined to the first substrate contact. A first end (246A, 346A) of the second bond element can be metallurgically joined to the first bond element (212A). The second bond element may or may not touch the first chip contact (112, 212A, 1212) or the substrate contact (132, 1132). A third bond element (948) can be joined to ends of first and second bond elements which are joined to substrate contacts or to chip contacts. In one embodiment, a bond element (740) can have a looped connection, having first and second ends (742, 746) joined at a first contact (732A) and a middle portion (744) joined to a second contact (712A).

Abstract translation: 微电子组件（100）包括具有在第一面处露出的芯片触头（112）和与芯片（110,1110）的面（128,129）并置的衬底（130,1130）的半导体芯片（110,1110） ）。 导电接合元件（144）可将第一芯片触点（112）与衬底的第一衬底触点（132,1132）电连接，并且第二导电结合元件（146）可电连接第一芯片触头（112， 132）与第二基板接触。 第一结合元件（144）可以具有冶金地连接到第一芯片触头（112,212A）的第一端（244A，344A）和与第一基板触点冶金连接的第二端（244B，344B）。 第二接合元件的第一端（246A，346A）可以冶金地接合到第一接合元件（212A）。 第二接合元件可以或可以不接触第一芯片触点（112,212A，1212）或基板触点（132,1132）。 第三接合元件（948）可以连接到第一和第二接合元件的端部，所述第一和第二接合元件连接到衬底触点或芯片触点。 在一个实施例中，接合元件（740）可以具有环形连接，其具有在第一接触（732A）处接合的第一和第二端（742,746）和与第二接触件（712A）接合的中间部分（744）。

公开(公告)号：WO2009025972A2

公开(公告)日：2009-02-26

申请号：PCT/US2008071500

申请日：2008-07-29

Applicant: MICRON TECHNOLOGY INC ,  LUA EDMUND KOON TIAN ,  LEOW SEE HIONG ,  LEE CHOON KUAN

Inventor： LUA EDMUND KOON TIAN ,  LEOW SEE HIONG ,  LEE CHOON KUAN

CPC classification number: H01L23/16 ,  H01L21/50 ,  H01L23/498 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48477 ,  H01L2224/49174 ,  H01L2224/4942 ,  H01L2224/49421 ,  H01L2224/73265 ,  H01L2224/83138 ,  H01L2224/85051 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Stacked microelectronic devices and methods of manufacturing stacked microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a plurality of electrically isolated, multi-tiered metal spacers on a front side of a first microelectronic die, and attaching a back-side surface of a second microelectronic die to individual metal spacers. In another embodiment, the method of manufacturing the microelectronic device may further include forming top-tier spacer elements on front-side wire bonds of the first die.

Abstract translation: 本文公开了堆叠微电子器件和制造堆叠微电子器件的方法。 在一个实施例中，一种制造微电子器件的方法包括：在第一微电子管芯的正面上形成多个电隔离的多层金属隔离物;以及将第二微电子管芯的背面表面附接到单独的金属隔离物 。 在另一个实施例中，制造微电子器件的方法可以进一步包括在第一管芯的正面接线键合上形成顶层间隔元件。

公开(公告)号：WO2017066174A2

公开(公告)日：2017-04-20

申请号：PCT/US2016/056402

申请日：2016-10-11

Applicant: INVENSAS CORPORATION

Inventor： AWUJOOLA, Abiola ,  SUN, Zhuowen ,  ZOHNI, Wael ,  PRABHU, Ashok, S. ,  SUBIDO, Willmar

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/48

CPC classification number: H01L23/552 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/215 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4942 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73227 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

Abstract translation: 公开了一般涉及具有免受干扰保护的微电子封装的装置。 在其设备中，基板具有与上表面相对的上表面和下表面并具有接地平面。 第一微电子器件耦合到衬底的上表面。 导线接合线耦合到接地平面以用于对其进行干涉并从基板的上表面延伸出去。 引线接合线的第一部分被定位成相对于干涉为第一微电子器件提供屏蔽区域。 丝焊线的第二部分未被定位成提供屏蔽区域。 第二微电子器件耦合到衬底并位于屏蔽区域的外部。 导电表面覆盖在用于覆盖屏蔽区域的丝焊线的第一部分上。

公开(公告)号：WO2011087485A3

公开(公告)日：2012-01-26

申请号：PCT/US2010003213

申请日：2010-12-20

Applicant: TESSERA INC ,  HABA BELGACEM ,  DAMBERG PHILIP ,  OSBORN PHILIP R

Inventor： HABA BELGACEM ,  DAMBERG PHILIP ,  OSBORN PHILIP R

IPC: H01L23/49 ,  H01L21/60 ,  H01L23/13

CPC classification number: H01L23/49816 ,  H01L21/50 ,  H01L23/13 ,  H01L23/49861 ,  H01L24/01 ,  H01L24/36 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/05554 ,  H01L2224/40091 ,  H01L2224/40225 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48477 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49112 ,  H01L2224/4942 ,  H01L2224/49427 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/85051 ,  H01L2224/85191 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/48095 ,  H01L2224/37099

Abstract: A microelectronic assembly (100) includes a semiconductor chip (110) having chip contacts (112) exposed at a first face and a substrate (130) juxtaposed with a face (128) of the chip (110). A conductive bond element (144) can electrically connect a first chip contact (112) with a first substrate contact (132) of the substrate, and a second conductive bond element (146) can electrically connect the first chip contact (112) with a second substrate contact. The first bond element (144) can have a first end (144A) metallurgically joined to the first chip contact (112) and a second end (144B) metallurgically joined to the first substrate contact (132). A first end (246A, 346A) of the second bond element (146) can be metallurgically joined to the first bond element (144).

Abstract translation: 微电子组件（100）包括具有在第一面处露出的芯片触头（112）和与芯片（110）的面（128）并置的衬底（130）的半导体芯片（110）。 导电接合元件（144）可以将第一芯片触点（112）与衬底的第一衬底触点（132）电连接，并且第二导电接合元件（146）可将第一芯片触头（112）与 第二基板接触。 第一结合元件（144）可以具有冶金地连接到第一芯片触头（112）的第一端（144A）和冶金地连接到第一基板触点（132）的第二端（144B）。 第二接合元件（146）的第一端（246A，346A）可以冶金地接合到第一接合元件（144）。