公开(公告)号：EP3018712A4

公开(公告)日：2017-04-19

申请号：EP13888740

申请日：2013-07-05

申请人： RENESAS ELECTRONICS CORP

发明人： YATO YUICHI ,  OKA HIROI ,  OKUNISHI NORIKO ,  TAKADA KEITA

IPC分类号： H01L23/495 ,  H01L23/31

CPC分类号： H01L23/49513 ,  H01L21/565 ,  H01L23/13 ,  H01L23/16 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49582 ,  H01L23/49805 ,  H01L23/49844 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/743 ,  H01L24/77 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83192 ,  H01L2224/83439 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/84205 ,  H01L2224/84439 ,  H01L2224/8501 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/92157 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/1301 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.

摘要翻译： 根据实施例的半导体器件是半导体器件，其中安装在芯片安装部分上的半导体芯片被树脂密封，并且第一部件被固定到半导体芯片的外围部分与外围部分之间的芯片安装表面侧 的芯片安装部分。 而且，第一部件由树脂密封。 而且，在平面图中，芯片安装部分的第一部分在第一方向上的长度大于半导体芯片在第一方向上的长度。

公开(公告)号：EP3007226B1

公开(公告)日：2018-12-05

申请号：EP15188280.0

申请日：2015-10-05

申请人： Epistar Corporation

发明人： He, Guan-Ru ,  Yeh, Jui-Hung ,  Huang, Kevin T. Y. ,  Chen, Chih-Chung

IPC分类号： H01L25/075

CPC分类号： H01L33/62 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/29 ,  H01L24/40 ,  H01L24/48 ,  H01L24/64 ,  H01L24/66 ,  H01L24/69 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/36 ,  H01L33/486 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/29194 ,  H01L2224/32 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/64 ,  H01L2224/73251 ,  H01L2224/80 ,  H01L2224/80006 ,  H01L2224/8085 ,  H01L2224/80862 ,  H01L2224/80874 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84455 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/89 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2224/45099 ,  H01L2224/69 ,  H01L2224/83 ,  H01L2224/08 ,  H01L2224/85 ,  H01L2224/84 ,  H01L2924/00012 ,  H01L2224/37099

摘要： LED chip packaging assembly that facilitates an integrated method for mounting LED chips as a group to be pre-wired to be electrically connected to each other through a pattern of extendable metal wiring lines is provided. LED chips which are electrically connected to each other through extendable metal wiring lines, replace pick and place mounting and the wire bonding processes of the LED chips, respectively. Wafer level MEMS technology is utilized to form parallel wiring lines suspended and connected to various contact pads. Bonding wires connecting the LED chips are made into horizontally arranged extendable metal wiring lines which can be in a spring shape, and allowing for expanding and contracting of the distance between the connected LED chips. A tape is further provided to be bonded to the LED chips, and extended in size to enlarge distance between the LED chips to exceed the one or more prearranged distances.

公开(公告)号：EP3007226A1

公开(公告)日：2016-04-13

申请号：EP15188280.0

申请日：2015-10-05

申请人： Epistar Corporation

发明人： He, Guan-Ru ,  Yeh, Jui-Hung ,  Huang, Kevin T. Y. ,  Chen, Chih-Chung

IPC分类号： H01L25/075

CPC分类号： H01L33/62 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/29 ,  H01L24/40 ,  H01L24/48 ,  H01L24/64 ,  H01L24/66 ,  H01L24/69 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/36 ,  H01L33/486 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/29194 ,  H01L2224/32 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/64 ,  H01L2224/73251 ,  H01L2224/80 ,  H01L2224/80006 ,  H01L2224/8085 ,  H01L2224/80862 ,  H01L2224/80874 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84455 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/89 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2224/45099 ,  H01L2224/69 ,  H01L2224/83 ,  H01L2224/08 ,  H01L2224/85 ,  H01L2224/84 ,  H01L2924/00012 ,  H01L2224/37099

摘要： LED chip packaging assembly that facilitates an integrated method for mounting LED chips as a group to be pre-wired to be electrically connected to each other through a pattern of extendable metal wiring lines is provided. LED chips which are electrically connected to each other through extendable metal wiring lines, replace pick and place mounting and the wire bonding processes of the LED chips, respectively. Wafer level MEMS technology is utilized to form parallel wiring lines suspended and connected to various contact pads. Bonding wires connecting the LED chips are made into horizontally arranged extendable metal wiring lines which can be in a spring shape, and allowing for expanding and contracting of the distance between the connected LED chips. A tape is further provided to be bonded to the LED chips, and extended in size to enlarge distance between the LED chips to exceed the one or more prearranged distances.

摘要翻译： 提供了一种LED芯片封装组件，其有助于通过可延伸的金属布线的图案将预先布线的LED芯片安装成彼此电连接的集成方法。 通过可延伸的金属布线彼此电连接的LED芯片分别替代LED芯片的拾取和放置安装以及引线接合工艺。 晶圆级MEMS技术用于形成并联布线，并联连接到各种接触焊盘。 连接LED芯片的接合线被制成水平布置的可延伸的金属布线，其可以是弹簧形状，并且允许连接的LED芯片之间的距离的扩展和收缩。 进一步提供胶带以与LED芯片接合，并且尺寸延伸以扩大LED芯片之间的距离以超过一个或多个预定距离。

公开(公告)号：EP1668686A4

公开(公告)日：2006-09-13

申请号：EP04781479

申请日：2004-08-18

申请人： ADVANCED INTERCONNECT TECH LTD

发明人： ISLAM SHAFIDUL ,  SAN ANTONIO ROMARICO SANTOS

IPC分类号： H01L21/44 ,  H01L20060101 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495 ,  H01L25/10

CPC分类号： H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/105 ,  H01L2221/68377 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/84439 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/85 ,  H01L2924/0665 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

摘要： A semiconductor device package includes an electrically conductive lead frame having a plurality of posts disposed at a perimeter of the package. Each of the posts has a first contact surface disposed at the first package face and a second contact surface disposed at the second package face. The lead frame also includes a plurality of post extensions disposed at the second package face. Each of the post extensions includes a bond site formed on a surface of the post extension opposite the second package face. At least one I/O pads on the semiconductor device is electrically connected to the post extension at the bond site using wirebonding, tape automated bonding, or flip-chip methods. The package can be assembled use a lead frame having pre-formed leads, with or without taping, or it can employ the use of partially etched lead frames. A stack of the semiconductor device packages may be formed.

摘要翻译： 半导体器件封装包括导电引线框架，其具有设置在封装的周边的多个柱。 每个柱具有设置在第一封装面处的第一接触表面和设置在第二封装面处的第二接触表面。 引线框架还包括设置在第二封装面处的多个柱延伸部。 每个柱延伸部包括形成在与第二封装面相对的柱延伸部的表面上的粘结部位。 半导体器件上的至少一个I / O焊盘使用引线接合，带自动接合或倒装芯片方法在接合位置处电连接到柱延伸部。 可以使用具有预成形引线的引线框架来组装封装，带有或不带有胶带，或使用部分蚀刻的引线框架。 可以形成半导体器件封装的堆叠。

公开(公告)号：EP3018712A1

公开(公告)日：2016-05-11

申请号：EP13888740.1

申请日：2013-07-05

申请人： Renesas Electronics Corporation

发明人： YATO, Yuichi ,  OKA, Hiroi ,  OKUNISHI, Noriko ,  TAKADA, Keita

IPC分类号： H01L23/50

CPC分类号： H01L23/49513 ,  H01L21/565 ,  H01L23/13 ,  H01L23/16 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49582 ,  H01L23/49805 ,  H01L23/49844 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/743 ,  H01L24/77 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83192 ,  H01L2224/83439 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/84205 ,  H01L2224/84439 ,  H01L2224/8501 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/92157 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/1301 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.

摘要翻译： 根据实施例的半导体器件是半导体器件，其中安装在芯片安装部分上的半导体芯片被树脂密封，并且第一部件被固定到半导体芯片的外围部分与外围部分之间的芯片安装表面侧 的芯片安装部分。 而且，第一部件由树脂密封。 而且，在平面图中，芯片安装部分的第一部分在第一方向上的长度大于半导体芯片在第一方向上的长度。

公开(公告)号：EP2503595A1

公开(公告)日：2012-09-26

申请号：EP12153710.4

申请日：2012-02-02

申请人： ABB Research Ltd.

发明人： Liu, Chunlei ,  Schulz, Nicola ,  Kicin, Slavo

IPC分类号： H01L23/62 ,  H01L25/07

CPC分类号： H01L25/072 ,  H01L23/3735 ,  H01L23/492 ,  H01L23/62 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L2224/03505 ,  H01L2224/05124 ,  H01L2224/05624 ,  H01L2224/0568 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29298 ,  H01L2224/32506 ,  H01L2224/37147 ,  H01L2224/3718 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/40227 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/84424 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/8448 ,  H01L2224/8484 ,  H01L2224/85205 ,  H01L2224/92246 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/83205

摘要： The present invention relates to a power semiconductor module comprising a semiconductor device (12), in particular an insulated gate bipolar transistor, a reverse conductive insulated gate bipolar transistor, or a bi-mode insulated gate transistor, with an emitter electrode and a collector electrode, wherein an electrically conductive upper layer (14) is sintered to the emitter electrode, the upper layer (14) at least partly being capable of forming an eutecticum with the semiconductor of the semiconductor device (12) and at least partly having a coefficient of thermal expansion which differs from the coefficient of thermal expansion of the semiconductor in a range of ≤ 250%, in particular ≤ 50%, and wherein an electrically conductive base plate (20) is sintered to the collector electrode, and wherein the semiconductor module (10) further comprises an electrically conductive area (24) being electrically isolated from the base plate (20) and being connected to the upper layer (14) via a direct electrical connection (22). A semiconductor module according to the invention is easy to prepare, has an improved reliability and exhibits short circuit failure mode capacity.

摘要翻译： 本发明涉及一种功率半导体模块，其包括半导体器件（12），特别是绝缘栅双极晶体管，反向导通绝缘栅双极晶体管或双模绝缘栅晶体管，其具有发射极和集电极 ，其中将导电上层（14）烧结到所述发射极，所述上层（14）至少部分地能够与半导体器件（12）的半导体形成共晶，并且至少部分地具有 热膨胀与半导体的热膨胀系数不同，在‰÷250％的范围内，特别是‰¤50％，其中将导电基板（20）烧结到集电极上，其中半导体 模块（10）还包括导电区域（24），其与基板（20）电隔离并连接到上层（ 14）通过直接电连接（22）。 根据本发明的半导体模块易于准备，具有改进的可靠性并且具有短路故障模式容量。

公开(公告)号：EP3271938A2

公开(公告)日：2018-01-24

申请号：EP16706510.1

申请日：2016-02-15

申请人： Pac Tech - Packaging Technologies GmbH

发明人： LÜDEKE, Heinrich ,  GEELHAAR, Ricardo

IPC分类号： H01L21/60 ,  H01L23/488 ,  B23K26/20

CPC分类号： H01L24/48 ,  B23K26/20 ,  H01L24/03 ,  H01L24/05 ,  H01L24/16 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/73 ,  H01L24/77 ,  H01L24/81 ,  H01L24/84 ,  H01L24/85 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/16225 ,  H01L2224/37026 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40225 ,  H01L2224/40491 ,  H01L2224/40992 ,  H01L2224/40997 ,  H01L2224/4112 ,  H01L2224/45005 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48839 ,  H01L2224/48847 ,  H01L2224/73255 ,  H01L2224/77263 ,  H01L2224/77281 ,  H01L2224/77601 ,  H01L2224/77611 ,  H01L2224/77704 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/84214 ,  H01L2224/84424 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84455 ,  H01L2224/84464 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/84986 ,  H01L2224/85051 ,  H01L2224/85203 ,  H01L2224/85214 ,  H01L2224/85379 ,  H01L2224/8584 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2224/13099

摘要： The invention relates to a chip arrangement (10) and a method for forming a contact connection (11) between a chip (18), in particular a power transistor or the like, and a conductor material strip (14), said conductor material strip being formed on a non-conductive substrate (12) and the chip being arranged on the substrate or on a conductor material strip (15). A silver paste (29) or copper paste is applied to a chip contact surface (25) of the chip and of the conductor material strip (28), a contact conductor (30) is dipped into the silver paste or the copper paste on the chip contact surface and into the silver paste or the copper paste on the conductor material strip, and a solvent contained in the silver paste or the copper paste is at least partially evaporated by heating. The silver paste or the copper paste is then sintered by means of laser energy, thereby forming the contact connection.

公开(公告)号：EP1668686A2

公开(公告)日：2006-06-14

申请号：EP04781479.3

申请日：2004-08-18

申请人： Advanced Interconnect Technologies Limited

发明人： ISLAM, Shafidul ,  SAN ANTONIO, Romarico, Santos

IPC分类号： H01L21/44

CPC分类号： H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/105 ,  H01L2221/68377 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/84439 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/85 ,  H01L2924/0665 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

摘要： A semiconductor device package includes an electrically conductive lead frame having a plurality of posts disposed at a perimeter of the package. Each of the posts has a first contact surface disposed at the first package face and a second contact surface disposed at the second package face. The lead frame also includes a plurality of post extensions disposed at the second package face. Each of the post extensions includes a bond site formed on a surface of the post extension opposite the second package face. At least one I/O pads on the semiconductor device is electrically connected to the post extension at the bond site using wirebonding, tape automated bonding, or flip-chip methods. The package can be assembled use a lead frame having pre-formed leads, with or without taping, or it can employ the use of partially etched lead frames. A stack of the semiconductor device packages may be formed.