公开(公告)号：EP4372813A1

公开(公告)日：2024-05-22

申请号：EP23208099.4

申请日：2023-11-07

申请人： Infineon Technologies AG

发明人： KADAR, Balazs ,  PALASIK, Bálint ,  HYMON, Erwin ,  GURNYIK, Tamás

IPC分类号： H01L23/498 ,  H01R12/57 ,  H01R43/02 ,  H01L21/48

CPC分类号： H01L23/48 ,  H01R12/57 ,  H01R43/0221 ,  H01L23/49811 ,  H01L21/4853

摘要： An electrical connector includes an upper stanchion forming a first end of the electrical connector, a planar welding tab forming a second end of the electrical connector that is opposite the first end, a meander arranged between the planar welding tab and the upper stanchion, and an opening in the meander, wherein the first and second ends of the electrical connector are vertically spaced apart from one another in a vertical direction that is orthogonal to a plane of the planar welding tab, wherein the meander is meandered relative to the vertical direction, wherein the meander and the planar welding tab each extend laterally away from the upper stanchion in the same direction, and wherein an area of the welding tab that is within an outer lateral reach of the meander is exposed from above by the opening.

公开(公告)号：EP3003966B1

公开(公告)日：2018-06-20

申请号：EP14808422.1

申请日：2014-05-23

申请人： InvenSense, Inc.

发明人： ZHANG, Cerina ,  TEA, Nim

IPC分类号： B81B3/00 ,  B81C1/00

CPC分类号： B81C1/00984 ,  B81B3/0008 ,  B81B2207/015 ,  B81C1/00976 ,  B81C2201/115 ,  H01L21/76838 ,  H01L23/48 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of the invention includes reducing stiction of a MEMS device by providing a conductive path for electric charge collected on a bump stop formed on a substrate. The bump stop is formed by depositing and patterning a dielectric material on the substrate, and the conductive path is provided by a conductive layer deposited on the bump stop. The conductive layer can also be roughened to reduce stiction.

公开(公告)号：EP3203515A4

公开(公告)日：2018-05-30

申请号：EP15846216

申请日：2015-09-16

申请人： SANSHA ELECTRIC MFG CO LTD

发明人： TAKAMURA AKIO

IPC分类号： H01L25/07 ,  H01L23/04 ,  H01L23/48 ,  H01L23/50

CPC分类号： H01L23/049 ,  H01L23/04 ,  H01L23/041 ,  H01L23/043 ,  H01L23/053 ,  H01L23/08 ,  H01L23/10 ,  H01L23/24 ,  H01L23/28 ,  H01L23/48 ,  H01L23/492 ,  H01L23/50 ,  H01L23/562 ,  H01L25/0655 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/00

摘要： Sought is to provide a semiconductor module that makes it possible to easily perform visual observation of soldering, and to perform a reflow soldering process in a state where external terminals are attached to a case. A semiconductor module includes a rectangular base plate; a substrate which is placed on the base plate and on which a circuit including a semiconductor chip and so forth is formed; a rectangular parallelepiped case made of resin that is attached to the base plate and houses the substrate within; and a plurality of external terminals lower ends of which are fixed to the substrate with upper ends thereof being exposed on a top face of the case. The case is provided with a first case opening portion and a second case opening portion that are respectively formed by cutting off a front face and a rear face of the case from an upper edge thereof along a longitudinal direction thereof; and the top face of the case between the first case opening portion and the second case opening portion includes an external terminal holding portion to hold the plurality of external terminals along the longitudinal direction with the upper ends thereof being exposed. A sealing material is injected from the first case opening portion and the second case opening portion onto a top face of the substrate, and thereby the semiconductor module is sealed.

公开(公告)号：EP3314651A1

公开(公告)日：2018-05-02

申请号：EP15896572.3

申请日：2015-06-26

申请人： Intel Corporation

发明人： OUYANG, Gong ,  LEE, Beom-taek

IPC分类号： H01L25/07 ,  H01L23/48

CPC分类号： H01L23/48 ,  H01L23/66 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/07 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2224/85399

摘要： Some embodiments of the present disclosure describe an integrated circuit (IC) package assembly having first, second, and third insulated wires wire bonded with die pads on an IC die, with an outer surface of the second insulated wire located at a distance of less than an outer cross-sectional diameter of the second insulated wire from an outer surface of the first insulated wire at a first location and located at a distance of less than the outer cross-sectional diameter from an outer surface of the third insulated wire at a second location. Other embodiments may be described and/or claimed.

公开(公告)号：EP2764539B1

公开(公告)日：2018-02-28

申请号：EP12781518.1

申请日：2012-10-02

申请人： Oracle International Corporation

发明人： SUTHERLAND, Ivan E.

IPC分类号： H01L23/48 ,  H01L25/065 ,  H01L23/485

CPC分类号： H01L25/0657 ,  G01B7/023 ,  G01B7/14 ,  G01B7/30 ,  H01L23/48 ,  H01L24/16 ,  H01L2224/81121 ,  H01L2225/06531 ,  H01L2225/06593 ,  H01L2924/00012

摘要： A semiconductor die is described. This semiconductor die includes a driver, and a spatial alignment transducer that is electrically coupled to the driver and which is proximate to a surface of the semiconductor die. The driver establishes a spatially varying electric charge distribution in at least one direction in the spatial alignment transducer, thereby facilitating determination of a vertical spacing between a surface of the semiconductor die and a surface of another semiconductor die. In particular, a spatial alignment sensor proximate to the surface of the other semiconductor die may detect an electrical field (or an associated electrostatic potential) associated with the spatially varying electric charge distribution. This detected electric field may allow the vertical spacing between the surfaces of the semiconductor dies to be determined.

公开(公告)号：EP3123504A4

公开(公告)日：2017-12-13

申请号：EP14886705

申请日：2014-03-28

申请人： INTEL CORP

发明人： LAMBERT WILLIAM J ,  SANKMAN ROBERT L ,  OSBORN TYLER N ,  GEALER CHARLES A

IPC分类号： H01L23/48 ,  H01L23/50 ,  H01L23/522 ,  H01L25/065 ,  H01L29/92 ,  H01L49/02

CPC分类号： H01L25/117 ,  H01L23/48 ,  H01L23/481 ,  H01L23/50 ,  H01L23/5223 ,  H01L25/0657 ,  H01L25/50 ,  H01L28/40 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541

摘要： An apparatus including a die including a plurality of through silicon vias (TSV's) extending from a device side to a backside of the die; and a decoupling capacitor coupled to the TSV's. A method including providing a die including a plurality of through silicon vias (TSV's) extending from a device side to a backside of the die; coupling a decoupling capacitor to the backside of the die. An apparatus including a computing device including a package including a microprocessor including a device side and a backside with through silicon vias (TSV's) extending from the device side to the backside, and a decoupling capacitor coupled to the backside of the die; and a printed circuit board, wherein the package is coupled to the printed circuit board.

公开(公告)号：EP2159841B1

公开(公告)日：2017-11-08

申请号：EP09169228.5

申请日：2009-09-02

申请人： Linear Technology Corporation

发明人： Pruitt, David A.

IPC分类号： H01F19/08 ,  H01L23/64 ,  H01L25/07 ,  H01L25/065 ,  H01F27/28 ,  H01F38/14 ,  H01L23/495

CPC分类号： H01F19/08 ,  H01F38/14 ,  H01F2019/085 ,  H01F2027/2814 ,  H01L23/48 ,  H01L23/4952 ,  H01L23/642 ,  H01L23/645 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L2223/6611 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/4823 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48491 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/49052 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/49176 ,  H01L2224/4943 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48824

公开(公告)号：EP3217430A1

公开(公告)日：2017-09-13

申请号：EP14905388.6

申请日：2014-11-06

申请人： Mitsubishi Electric Corporation

发明人： TANI, Masakazu ,  DEGUCHI, Yoshiyuki ,  SAKATA, Kazuki

IPC分类号： H01L25/07 ,  H01L23/48 ,  H01L25/18

CPC分类号： H01L21/486 ,  H01L21/76898 ,  H01L23/48 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/34 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor module is provided with a conductive member having one end, in a longitudinal direction, joined to an electrode of a semiconductor element that is mounted on an insulating substrate, the other end of the conductive member in the longitudinal direction being joined to a component different from the electrode. The conductive member is made up of a metal sheet, and has a bent portion at the one end and at the other end. The bent portion provided at the one end has a cut in a leading end portion, in the longitudinal direction, and an end joining section at which the cut is not present is joined to the electrode of the semiconductor element. As a result, a semiconductor module can be realized that allows combination of increased current capacity with improved reliability.

摘要翻译： 本发明提供一种半导体模块，其特征在于，具备：导电部件，其长度方向的一端与安装在绝缘基板上的半导体元件的电极接合;导电部件的长度方向的另一端与部件 不同于电极。 导电构件由金属片构成，并且在一端和另一端具有弯曲部分。 设置于一端的弯曲部在长度方向上的前端部具有切口，在该半导体元件的电极上接合有不存在切口的端部接合部。 结果，可以实现允许组合增加的电流容量和改进的可靠性的半导体模块。

公开(公告)号：EP3198642A1

公开(公告)日：2017-08-02

申请号：EP14889785.3

申请日：2014-12-03

申请人： Intel Corporation

发明人： CHANG, Peter ,  MAYBERRY, Michael

IPC分类号： H01L23/58 ,  H01L23/48

CPC分类号： H01L24/94 ,  H01L23/48 ,  H01L23/58 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L24/95 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32227 ,  H01L2224/80006 ,  H01L2224/81005 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2224/8385 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/10157 ,  H01L2924/15159 ,  H01L2224/11 ,  H01L2924/01079 ,  H01L2924/0105 ,  H01L2224/81 ,  H01L2224/80 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/83

摘要： Some example forms relate a method of fabricating an electronic package. The method includes attaching a source wafer that includes micro devices to a target wafer. The method further includes removing a portion of the source wafer from the target wafer to form an electronic package. The micro devices remain on the target wafer when the source wafer is removed from target wafer. The method may further include performing post processing on the electronic package that is formed after the source wafer is removed from the target wafer. In some forms of the method, some of the micro devices remain on the source wafer when the source wafer is removed from target wafer.

摘要翻译： 一些示例形式涉及制造电子封装的方法。 该方法包括将包括微器件的源晶片附着到目标晶片。 该方法还包括从目标晶片去除一部分源晶片以形成电子封装。 当源晶圆从目标晶圆移除时，微器件保留在目标晶圆上。 该方法还可以包括在源晶片从目标晶片移除之后形成的电子封装上执行后处理。 在该方法的一些形式中，当从目标晶片移除源晶片时，一些微器件保留在源晶片上。

公开(公告)号：EP3196931A1

公开(公告)日：2017-07-26

申请号：EP15861565.8

申请日：2015-11-20

申请人： NSK Ltd.

发明人： SHIMAKAWA, Shigeru ,  SUNAGA, Takashi ,  SEKINE, Takaaki ,  KOGURE, Teruyoshi ,  SUZUKI, Ryoichi

IPC分类号： H01L23/36 ,  H01L23/12 ,  H01L23/48 ,  H01L23/50

CPC分类号： H01L23/50 ,  H01L23/12 ,  H01L23/36 ,  H01L23/48 ,  H01L24/40 ,  H01L2924/0002 ,  H01L2924/00

摘要： [Problem]
An object of the present invention is to provide an electronic part mounting heat-dissipating substrate which enables a circuit for which a power semiconductor in which a large current flows is used to reduce the wiring resistances of a large power operation and improve the heat dissipation.
[Means for Solving]
The present invention is an electronic part mounting heat-dissipating substrate which comprises: a conductor plate which is formed on lead frames of wiring pattern shapes; and an insulating member which is provided between the lead frames of the wiring pattern shapes on the conductor plate; wherein a plate surface of a part arrangement surface of the conductor plate and a top surface of the insulating member at a side of the part arrangement surface form one continuous surface, wherein a plate surface of a back surface of the part arrangement surface of the conductor plate and a top surface of the insulating member at a side of the back surface at the part arrangement surface-side are formed in an identical plane, wherein the substrate is formed in a circular shape

摘要翻译： 发明内容本发明的目的在于提供一种电子部件安装用散热基板，该电子部件安装用散热基板能够使用流过大电流的功率半导体的电路来降低大功率动作的布线电阻， 散热。 用于解决问题的手段本发明是一种电子部件安装散热基板，其包括：导体板，其形成在布线图案形状的引线框上; 以及绝缘构件，其设置在导体板上的布线图案形状的引线框之间; 其特征在于，所述导体板的部件配置面的板面与所述部件配置面侧的所述绝缘部件的顶面形成一个连续面，所述导体的所述部件配置面的背面的板面 在所述部件配置面侧的所述背面侧的所述绝缘部件的上表面形成为同一平面，所述基板形成为圆形