公开(公告)号：EP1777997A1

公开(公告)日：2007-04-25

申请号：EP05077397.7

申请日：2005-10-18

Applicant: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO

Inventor： Hackert, Jürgen

IPC: H05K1/09

CPC classification number: H05K3/24 ,  H05K3/1216 ,  H05K3/125 ,  H05K3/182 ,  H05K3/246 ,  H05K2201/0257 ,  H05K2201/0347 ,  H05K2203/013 ,  H05K2203/0709 ,  H05K2203/0723

Abstract: The invention provides method for preparing a conductive device comprising the steps of:
(a) providing a non-conductive substrate layer;
(b) applying a pattern of an ink on a surface of the substrate layer, which ink comprises a first metal;
(c) depositing a second metal on the ink pattern obtained in step (b); and
(d) applying a third metal on the second metal by means of electrodeposition.
The invention further provides a conductive device obtainable by said method.

Abstract translation: 本发明提供一种制备导电器件的方法，包括（a）提供非导电衬底层; （b）在基材层的表面上施加油墨图案，该油墨包含（c）在步骤（b）中获得的油墨图案上沉积第二金属; 和（d）通过电沉积在第二金属上施加第三金属。 本发明还提供可通过所述方法获得的导电装置。

公开(公告)号：EP1668697A2

公开(公告)日：2006-06-14

申请号：EP04784570.6

申请日：2004-09-17

Applicant: MOTOROLA, INC.

Inventor： WALDVOGEL, John M. ,  BIELICK, Brian R. ,  MILLER, Herman J. ,  VAN CANNON, Billy J.

IPC: H01L23/10 ,  H01L23/12 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H05K3/0061 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/341 ,  H05K3/386 ,  H05K3/44 ,  H05K2201/0347 ,  H05K2201/068 ,  H05K2201/09063 ,  H05K2201/1003 ,  H05K2203/1178 ,  H01L2924/00

Abstract: An electrical circuit apparatus (300) that includes: a substrate (330) having a ground layer (336), at least one thermal aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate such that at least a portion of the at least one substrate thermal aperture overlaps the heat sink, the adhesive layer having at least one thermal aperture (322) and at least one solder aperture (324), wherein aligning the at least one substrate solder aperture with the at least one adhesive layer solder aperture and aligning the at least one substrate thermal aperture with the at least one adhesive layer thermal aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

Abstract translation: 1。一种电路装置（300），包括：具有接地层（336），至少一个热孔径（332）和至少一个焊料孔（334）的基板（330）; 散热器（310）; 以及用于将所述散热器机械地耦合到所述基板的所述接地层的粘合剂层（320），使得所述至少一个基板热孔径的至少一部分与所述散热器重叠，所述粘合剂层具有至少一个热孔径（322 ）和至少一个焊料孔（324），其中将所述至少一个基板焊料孔与所述至少一个粘合剂层焊料孔对准并且将所述至少一个基板热孔与所述至少一个粘合剂层热孔对准使得焊料润湿 在散热器和基板的接地层之间的预定区域中。

公开(公告)号：EP1667507A1

公开(公告)日：2006-06-07

申请号：EP06003717.3

申请日：1999-09-14

Applicant: IBIDEN CO., LTD.

Inventor： En, Honchin ,  Nakai, Tohru ,  Oki, Takeo ,  Hirose, Naohiro ,  Noda, Kouta

IPC: H05K3/18 ,  H05K3/46 ,  H05K1/09 ,  C25D5/18 ,  C23C18/34

CPC classification number: H05K3/4644 ,  C23C18/1607 ,  C23C18/1653 ,  C23C18/22 ,  C23C18/30 ,  C23C18/34 ,  C23C18/405 ,  C23C28/00 ,  C23C28/023 ,  C23C28/42 ,  C25D3/38 ,  C25D5/022 ,  C25D5/18 ,  C25D5/34 ,  C25D7/123 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/241 ,  H05K3/381 ,  H05K3/382 ,  H05K3/384 ,  H05K3/421 ,  H05K3/423 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4661 ,  H05K2201/0215 ,  H05K2201/0344 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0723 ,  H05K2203/1476 ,  H05K2203/1492 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A process for manufacturing a multilayer printed circuit board comprises a step for providing openings in an interlayer insulating layer, and a step for filling up the openings to construct via holes in a manner of plugging the openings in the interlayer insulating layer. Electroplating may be used to fill up the openings and, at the same time, build up a conductor layer. The electroplating is performed using an aqueous solution containing a metal ion and 0.1 to 1.5 mmol/L of at least one additive selected from the group consisting of thioureas, cyanides and polyalkylene oxides as a plating solution. The multilayer printed circuit board comprises a core board and, as constructed on both sides thereof, a buildup wiring layer obtainable by building up the interlayer insulating layer and the conductor layer alternately with the via holes interconnecting the conductor layers.

Abstract translation: 用于制造多层印刷电路板的方法包括在层间绝缘层中提供开口的步骤以及以堵塞层间绝缘层中的开口的方式填充开口以构建通孔的步骤。 电镀可以用来填充开口并且同时建立导体层。 电镀使用含有金属离子和0.1至1.5mmol / L的至少一种选自硫脲，氰化物和聚亚烷基氧化物的添加剂的水溶液作为电镀液来进行。 多层印刷电路板包括核心板，并且在其两侧构造有增层布线层，该增层布线层通过交替地建立层间绝缘层和导体层以及使导体层互连的通孔来形成。

公开(公告)号：EP1667505A1

公开(公告)日：2006-06-07

申请号：EP06003705.8

申请日：1999-09-14

Applicant: IBIDEN CO., LTD.

Inventor： En, Honchin ,  Nakai, Tohru ,  Oki, Takeo ,  Hirose, Naohiro ,  Noda, Kouta

IPC: H05K3/18 ,  H05K3/46 ,  H05K1/09 ,  C25D5/18 ,  C23C18/34

CPC classification number: H05K3/4644 ,  C23C18/1607 ,  C23C18/1653 ,  C23C18/22 ,  C23C18/30 ,  C23C18/34 ,  C23C18/405 ,  C23C28/00 ,  C23C28/023 ,  C23C28/42 ,  C25D3/38 ,  C25D5/022 ,  C25D5/18 ,  C25D5/34 ,  C25D7/123 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/241 ,  H05K3/381 ,  H05K3/382 ,  H05K3/384 ,  H05K3/421 ,  H05K3/423 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4661 ,  H05K2201/0215 ,  H05K2201/0344 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0723 ,  H05K2203/1476 ,  H05K2203/1492 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: In an electroplating process, an electrically conductive substrate is electroplated intermittently using the substrate surface as cathode and a plating metal as anode at a constant voltage between the anode and the cathode. The electroplating process is used for producing a circuit board comprising a substrate, and as formed thereon, a conductor circuit.

Abstract translation: 在电镀工艺中，使用衬底表面作为阴极并且在阳极和阴极之间以恒定电压将电镀金属作为阳极来间歇地电镀导电衬底。 电镀工艺用于制造包括衬底的电路板，并在其上形成导体电路。

公开(公告)号：EP1162867B1

公开(公告)日：2006-04-05

申请号：EP00964763.7

申请日：2000-10-10

Applicant: IBIDEN CO., LTD.

Inventor： KAWASAKI, Yogo Ogaki-kojou Ibiden Co., Ltd. ,  SATAKE, Hiroaki Aoyagi-kojou Ibiden Co., Ltd. ,  IWATA, Yutaka Aoyagi-kojou Ibiden Co., Ltd. ,  TANABE, Tetsuya Aoyagi-kojou Ibiden Co., Ltd.

IPC: H05K1/11

CPC classification number: H05K1/113 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/3457 ,  H05K3/381 ,  H05K3/382 ,  H05K3/426 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0209 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0796 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Through holes (36) are formed in such a manner as to extend through a core board (30) and lower layer interlayer resin insulator layers (50), while via holes (66) are formed immediately above through holes (66). As a result, the through hole (36) and via hole (66) are in line with each other, so that the wiring length is shortened and the speed of transmission of signals can be increased. Further, since the through hole (36) and the via hole (66) connected to a solder bump (76) (conductive connecting pin (78)) are directly connected, the arrangement is superior in connection reliability.

公开(公告)号：EP1592288A1

公开(公告)日：2005-11-02

申请号：EP05006902.0

申请日：2005-03-30

Applicant: Fuba Printed Circuits GmbH

Inventor： Freye, Jens ,  Novotny, Martin ,  Biener, Leo

IPC: H05K1/02 ,  H05K7/20

CPC classification number: H05K3/4046 ,  H05K1/0204 ,  H05K1/0298 ,  H05K2201/0347 ,  H05K2201/10416

Abstract: Eine elektrische Leiterplatte, die aus mehreren, dielektrischen Trägerschichten (1,2,3) besteht, zwischen denen sich jeweils Leiterbilder (4,5) befinden, wobei die Außenseiten ebenfalls mit Leiterbildern (5,7) belegt sind, ist zur Verbesserung der Wärmeabfuhr mit einer durchgängigen Ausnehmung (8) versehen, deren Innenseiten mit einer Metallisierungsschicht (12) gleichförmig überzogen sind. Die Metallisierungsschicht (12) steht mit den Leiterbildern (4,5,6,7) zumindest in einem wärmeleitfähigen Kontakt und es ist in die Ausnehmung (8) im Übrigen, den Innenraum der Metallisierungsschicht (12) ausfüllend, ein aus einem metallischen Werkstoff bestehender Wärmeleitblock (9) eingesetzt, der sich gleichförmig durch die gesamte Leiterplatte hindurcherstreckt und in deren jeweiliger Ober- bzw. Unterseite endet. Der Wärmeleitblock (9) steht mit der Metallisierungsschicht (12) ebenfalls in einer wärmeleitfähigen Verbindung. Mittels Oberflächenmetallisierungsschichten (10,11), welche die zugekehrten Stirnseiten des Wärmeleitblockes (9) in den jeweiligen ober- und unterseitigen Ebenen der Wärmeplatte überragen, ist diese zusätzlich formschlüssig innerhalb der Ausnehmung (8) festgelegt. Die in den einzelnen Leiterbildern (4,5,6,7) betrieblich entwickelte Verlustwärme kann auf diesem Wege sehr effektiv abgeführt und über die äußeren Oberflächen der Metallisierungsschichten (10,11) entweder an die Umgebung oder eine mit diesen in thermischer Berührung stehende sonstige Wärmesenke abgeführt werden. Infolge flächigen Erstreckung des Wärmeleitblockes in der Grundebene der Leiterplatte ist dieser problemlos in den üblichen Fertigungsprozess der Leiterplatte intergrierbar.

Abstract translation: 电介质支撑层（DSL）（1-3）的一面上，导电图案（CP）（4-7）表示一个电路，并具有一个平坦的金属导热块（FMHCB）（9） DSL中的通用凹槽（8）用于与CP的导热接触。 FMHCB的前侧（9'，9“）与印刷电路板的顶部（13）和底部（14）的表面齐平地延伸。

公开(公告)号：EP1553450A1

公开(公告)日：2005-07-13

申请号：EP05007530.8

申请日：2002-09-18

Applicant: San-Ei Kagaku Co. Ltd.

Inventor： Sato, Kiyoshi ,  Kitamura, Kazunori

IPC: G03F7/038 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K3/0094 ,  C08F283/10 ,  C08F290/00 ,  C08F290/06 ,  C08F290/064 ,  C08L63/00 ,  C08L63/10 ,  G03F7/038 ,  H05K3/287 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  C08L2666/22

Abstract: A photo-setting and thermosetting resin composition comprises ( I ) a partial adduct of epoxy resin with unsaturated aliphatic acid, (II) (meth)acrylates, (III) a photocrosslinking agent, (IV) liquid epoxy resin, and (V) a latent curing agent. The resin composition can be easily charged and plugged into a through-hole, does not drip down, and can be effectively photo-set and thermoset. A photo-set product prepared of the resin composition can be easily polished. A plugged-through-hole printed wiring (substrate) board prepared of the resin composition does not cause defects such as hollows, cracks, blisters, peelings and so on, is excellent in solder-resistance, does not corrode a metal part, and can produce an appliance of high reliability and long life which does not occur short circuit and poor electrical connection.

Abstract translation: 光硬化和热硬化性树脂组合物包含（i）环氧树脂与不饱和脂族酸的部分加成物，（II）（甲基）丙烯酸酯，（III）光交联剂，（IV）液态环氧树脂，和（V）一 潜伏性固化剂。 该树脂组合物能够容易地充电和插入通孔，不滴落下来，并且可以有效地照片集和热固性材料。 该树脂组合物的制备的光集产品可容易地研磨。 所述树脂组合物不引起缺陷的制备的插入的通孔印刷配线（基板）基板：例如中空部，裂纹，水泡，剥离等，具有优异的钎焊性，不腐蚀的金属部件，并能 在生产高可靠性和长寿命这不会发生短路，电接触不良设备。

公开(公告)号：EP1545175A2

公开(公告)日：2005-06-22

申请号：EP04257610.8

申请日：2004-12-08

Applicant: Endicott Interconnect Technologies, Inc.

Inventor： Larnerd, James M. ,  Lauffer, John M. ,  Markovich, Voya R. ,  Papathomas, Kostas I.

IPC: H05K3/42 ,  H05K1/11 ,  H01L23/498

CPC classification number: H05K3/429 ,  H01L2224/13 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/421 ,  H05K2201/0347 ,  H05K2201/09454 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09845

Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste (61). In the case of the latter, it is also possible to provide a top covering conductive layer (63) over the paste, e.g., to serve as a pad or the like on the board's external surface.

Abstract translation: 在哪一种制造印刷电路板的方法，导电通孔被板的结构的两个介电层内形成，以连接指定导电层。 一个孔连接两个相邻的层和其他连接两个相邻层，包括通过另一个孔连接在所述导电层中的一个。 因此，它可以连接使用一个或多个孔全部三个导电层。 将所得的孔可填充，E. G.，用金属镀敷，或导电或其他非导电性糊剂（61）。 在后者的情况下，因此有可能以提供对膏的顶部覆盖导电层（63），E. G.，以用作垫或在板的外表面等。

公开(公告)号：EP1501104A1

公开(公告)日：2005-01-26

申请号：EP04012945.4

申请日：2004-06-01

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Tanaka, Koichi

IPC: H01C17/22 ,  H01C17/24 ,  H05K1/16

CPC classification number: H01C17/24 ,  H01C17/22 ,  H05K1/167 ,  H05K2201/0347 ,  H05K2201/035 ,  H05K2203/171

Abstract: A circuit board high in reliability and a method for manufacturing the circuit board are provided. The electrical resistance is accurately adjustable without damaging the circuit body even if it is made of resinous material and is free from a change over time. A circuit board in which a resistor (16) consisting of a resistor paste is printed between electrodes (14a) formed on a circuit pattern (14) printed on a printed circuit board (11), wherein a conductor (18) for adjusting the electrical resistance value of the resistor is coated on the surface of the resistor.

Abstract translation: 提供了高可靠性的电路板和制造电路板的方法。 电阻精确可调，即使是由树脂材料制成，也不会随时间变化而损坏电路体。 一种电路板，其中，在印刷在印刷电路板（11）上的电路图案（14）上形成的电极（14a）之间印刷由电阻膏组成的电阻器（16），其中，用于调节电气 电阻器的电阻值涂覆在电阻器的表面上。

公开(公告)号：EP0860101B1

公开(公告)日：2004-10-20

申请号：EP96938583.0

申请日：1996-11-06

Applicant: Strandberg, Reinhold

Inventor： Strandberg, Reinhold

IPC: H05K3/22 ,  G01R1/073 ,  G01R31/28

CPC classification number: H05K3/4007 ,  G01R1/07378 ,  H05K3/06 ,  H05K3/22 ,  H05K3/427 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/0949 ,  H05K2201/098 ,  H05K2203/0346

Abstract: A method for producing contact pads on pattern boards (8) comprises a plating treatment in order to apply electrically conductive material on the board in correspondence to the desired contact pads (31). The electrically conducting material on the contact pads is subjected to a treatment with an agent capable of etching the material in order to provide chamfering or rounding of peripherical edges (34) of the contact pads.