利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

277 条记录 (耗时 0.025 秒)

    Electrical contactor, especially wafer level contactor, using fluid pressure
    123.
    发明公开
    Electrical contactor, especially wafer level contactor, using fluid pressure 审中-公开
    电接触器，尤其是Waferkontaktor，利用液体的压力

    公开(公告)号：EP1418436A3

    公开(公告)日：2005-07-06

    申请号：EP03025061.7

    申请日：2000-08-10

    申请人： FormFactor, Inc.

    发明人： Eldridge, Benjamin

    IPC分类号： G01R1/073

    CPC分类号： G01R31/2887 ,  G01R1/0735 ,  G01R31/2886

    摘要： A probe assembly comprises a flexible wiring substrate (633) including a plurality of electrical connections to a semiconductor tester; and a plurality of compliant, elongate probes (639) disposed on said substrate in a pattern corresponding to a pattern of test features on a semiconductor device (505) to be tested, wherein said wiring of said substrate interconnects ones of said probes with ones of said electrical connections to said semiconductor tester.

    METHOD OF MAKING MICROELECTRONIC SPRING CONTACT ARRAY
    124.
    发明公开
    METHOD OF MAKING MICROELECTRONIC SPRING CONTACT ARRAY 审中-公开
    一种用于生产微电子弹簧片

    公开(公告)号：EP1532456A1

    公开(公告)日：2005-05-25

    申请号：EP03765632.9

    申请日：2003-07-15

    申请人： FORMFACTOR, INC.

    发明人： ELDRIDGE, Benjamin, N. ,  MATHIEU, Gaetan, L. ,  REYNOLDS, Carl, V.

    IPC分类号： G01R3/00 ,  G01R1/067

    CPC分类号： G01R1/06744 ,  G01R1/06733 ,  G01R3/00 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49222 ,  Y10T29/49224

    摘要： A method of making a microelectronic spring contact array comprises forming a plurality of spring contacts on a sacrificial substrate and then releasing the spring contacts from the sacrificial substrate. Each of the spring contacts has an elongated beam having a base end. The method of making the array includes attaching the spring contacts at their base ends to a base substrate after they have been released entirely from the sacrificial substrate, so that each contact extends from the base substrate to a distal end of its beams. The distal ends are aligned with a predetermined array of tip positions. In an embodiment of the invention, the spring contacts are formed by patterning contours of the spring contacts in a sacrificial layer on the sacrificial substrate. The walls of patterned recesses in the sacrificial layer define side profiles of the spring contacts, and a conductive material is deposited in the recesses to form the elongated beams of the spring contacts.

    FIDUCIAL ALIGNMENT MARKS ON MICROELECTRONIC SPRING CONTACTS
    125.
    发明公开
    FIDUCIAL ALIGNMENT MARKS ON MICROELECTRONIC SPRING CONTACTS 审中-公开
    在微电子弹簧触点痕迹

    公开(公告)号：EP1523684A1

    公开(公告)日：2005-04-20

    申请号：EP02752348.9

    申请日：2002-07-15

    申请人： FORMFACTOR, INC.

    发明人： MARTIN, Robert, C. ,  WATJE, Eric, T.

    IPC分类号： G01R1/073 ,  H01L21/66

    CPC分类号： G01R1/06738 ,  G01R1/06727 ,  G01R1/06794 ,  G01R1/07307 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Microelectronic spring contacts with fiducial alignment marks for use on a semiconductor wafer contactor or similar apparatus, and methods for making such marks by using a sacrificial substrate, are disclosed. Each alignment mark is placed on a pad adjacent to a contact tip. The alignment mark is positioned on the pad so that it will not contact the terminal or any other part of a wafer under test. The alignment mark and the contact tip are preferably positioned on the pad in the same lithographic step. Then, the pad and like pads, selected ondes of which also have similar alignment marks, are attached to the ends of an array of resilient contact elements. A plurality of alignment marks accurately positioned in relation to a plurality of contact tips on a contactor is thus disclosed. Configurations for ensuring that the alignment marks remain free of debris and easily located for essentially the entire life of the contactare disclosed, as are various different exemplary shapes of alignment marks.

    PREDICTIVE, ADAPTIVE POWER SUPPLY FOR AN INTEGRATED CIRCUIT UNDER TEST
    126.
    发明公开
    PREDICTIVE, ADAPTIVE POWER SUPPLY FOR AN INTEGRATED CIRCUIT UNDER TEST 有权
    预测，自适应电源是集成电路测试

    公开(公告)号：EP1470432A2

    公开(公告)日：2004-10-27

    申请号：EP03707580.1

    申请日：2003-01-29

    申请人： FORMFACTOR, INC.

    发明人： ELDRIDGE, Benjamin, N. ,  MILLER, Charles, A.

    IPC分类号： G01R31/316 ,  G01R31/319

    CPC分类号： G06F1/26 ,  G01R31/2851 ,  G01R31/31721 ,  G01R31/31905 ,  G01R31/31924

    摘要： A main power source supplies current through path impedance to a power terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases following edges of a clock signal applied to the DUT during a test as transistors within the IC switch in response to the clock signal edges. To limit variation (noise) in voltage at the power input terminal, an auxiliary power supply supplies an additional current pulse to the power input terminal to meet the increased demand during each cycle of the clock signal. The magnitude of the current pulse is a function of a predicted increase in current demand during that clock cycle, and of the magnitude of an adaption signal controlled by a feedback circuit provided to limit variation in voltage developed at the DUT's power input terminal.