公开(公告)号：EP2259668A4

公开(公告)日：2011-12-14

申请号：EP08873661

申请日：2008-11-20

Applicant: IBIDEN CO LTD

Inventor： TANAKA HIRONORI

IPC: H05K3/46

CPC classification number: H05K1/185 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/24227 ,  H01L2224/2518 ,  H01L2224/82039 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/18162 ,  H01L2924/19041 ,  H05K1/0231 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/09918 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2201/10727 ,  H05K2203/1469 ,  H05K2203/166 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2924/00014

公开(公告)号：EP2315510A2

公开(公告)日：2011-04-27

申请号：EP11000762.2

申请日：2002-05-31

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Fukuoka, Yoshitaka ,  Serizawa, Tooru ,  Yagi, Hiroshi ,  Shimada, Osamu ,  Harai, Hiroyuki ,  Yamaguchi, Yuji

IPC: H05K3/46 ,  H05K1/16

CPC classification number: H05K1/162 ,  H05K1/095 ,  H05K1/165 ,  H05K1/167 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/086 ,  H05K2201/09763 ,  H05K2203/0338 ,  H05K2203/1189 ,  Y10T29/4902 ,  Y10T29/49099 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155

Abstract: A wiring board provided with a passive element, comprising: an insulating board (5) having a first surface and a second surface; a layered dielectrics (26) disposed on the second surface of the insulating board, the layered dielectrics sinking in a thickness direction of the insulating board to be positioned at a first sinking level; a layered electrical conductor (36) disposed under the layered dielectrics to be in contact with the layered dielectrics and to be positioned at a second sinking level under the first sinking level of the insulating board and also disposed to be positioned at a same sinking level as the first sinking level of the insulating board; and a wiring layer (1a) disposed on the second surface of the insulating board and having a first contacting portion with the layered dielectrics and a second contacting portion with the layered electrical conductor, characterized in that the wiring board further comprises: a second layered dielectrics (27) disposed under the layered electrical conductor to be in contact with the layered electrical conductor and to be positioned at a third sinking level under the second sinking level of the insulating board and also disposed to be positioned at same sinking levels as the second and the first sinking levels of the insulating board to be in contact with the layered dielectrics; and a second layered electrical conductor (38) disposed under the second layered dielectrics to be in contact with the second layered dielectrics and to be positioned at a fourth sinking level under the third sinking level of the insulating board and also disposed to be positioned at same sinking levels as the third, the second, and the first sinking levels of the insulating board to be in contact with the wiring layer electrically conducting with the first contacting portion.

Abstract translation: 一种设置有无源元件的布线板，包括：绝缘板（5），具有第一表面和第二表面; 设置在所述绝缘板的第二表面上的分层电介质（26），所述层状电介质沿所述绝缘板的厚度方向下沉以定位在第一沉降水平; 层状电导体（36），其布置在所述层状电介质下方以与所述层状电介质接触并且被定位在所述绝缘板的所述第一沉降级下方的第二沉降水平处，并且还布置成与 绝缘板的第一个下沉水平; 以及布置在绝缘板的第二表面上的布线层（1a），并且具有与层状电介质的第一接触部分和与层状电导体的第二接触部分，其特征在于，布线板还包括：第二层状电介质 （27），设置在所述分层电导体下方以与所述分层电导体接触并且被定位在所述绝缘板的所述第二沉降水平面下方的第三沉没水平面处，并且还被设置为与所述第二和第 绝缘板的第一沉降层与层状电介质接触; 以及第二层状电导体（38），其设置在所述第二层状电介质下方以与所述第二层状电介质接触并且位于所述绝缘板的所述第三沉降层下方的第四沉降位置处并且还被设置为位于所述第二层状电介质 绝缘板的第三，第二和第一下沉水平与与第一接触部分导电的布线层接触的下沉水平。

公开(公告)号：EP2056655A4

公开(公告)日：2011-03-02

申请号：EP08776850

申请日：2008-07-15

Applicant: PANASONIC CORP

Inventor： NAKAMURA TADASHI ,  KITA TAKAYUKI ,  FUKASAWA KOTA

IPC: H05K1/14

CPC classification number: H05K1/141 ,  H05K3/368 ,  H05K3/4069 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/10378

公开(公告)号：EP2203955A1

公开(公告)日：2010-07-07

申请号：EP08842456.9

申请日：2008-10-24

Applicant: EADS Deutschland GmbH ,  Universität des Saarlandes

Inventor： KÖRBER, Richard ,  BITTNER, Achim ,  SCHMID, Ulrich ,  PRECHTEL, Ulrich ,  ZIEGLER, Volker ,  FEURER, Ernst

IPC: H01Q1/38 ,  H01L23/15 ,  H05K1/03 ,  G01S13/00 ,  H01Q9/04

CPC classification number: H05K1/024 ,  G01S7/032 ,  H01L2224/48091 ,  H01L2924/1461 ,  H01Q1/38 ,  H01Q9/0407 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0116 ,  H05K2201/0187 ,  H05K2201/0254 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The invention relates to a method for producing a radar sensor (10) which is suitable particularly for producing highly integrated and nevertheless highly sensitive radar sensors. The radar sensor (10) has a plurality of antennas (18, 20) which can be driven differently and a distribution network (14) for driving the antennas (18, 20). The method according to the invention comprises the steps of: a) providing a ceramic support structure with the distribution network (14), in which support structure cavities are formed, b) filling the cavities with a material matrix comprising a first material with inclusions of a second material in order to form, within the material matrix, a large number of regions which have a lower dielectric constant than the first material, c) applying planar antenna patches to the material matrix.

公开(公告)号：EP2180771A1

公开(公告)日：2010-04-28

申请号：EP07790804.4

申请日：2007-07-13

Applicant: Ibiden Co., Ltd.

Inventor： TAKAHASHI, Michimasa ,  AOYAMA, Masakazu

IPC: H05K3/46

CPC classification number: H05K3/4691 ,  H05K1/148 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0909 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/1536

Abstract: A wiring board 19 is structured by connecting a first wiring board 17 and a second wiring board 16 with a pliable member 15. The first wiring board 17 is structured by laminating a first substrate 1, a non-pliable second substrate 2 having a smaller mounting area than that of the first substrate 1, and a base substrate 3 formed between the first substrate 1 and the second substrate 2, where at least a portion of the periphery is formed thinner than the central portion. Vias 44 are formed at least either in the first substrate 1 or the second substrate 2.

Abstract translation: 布线基板19通过将第一布线基板17和第二布线基板16与柔软部件15连接而构成。第一布线基板17通过层叠第一基板1，具有较小安装的非柔软性的第二基板2 面积比第一基板1的面积小，以及在第一基板1和第二基板2之间形成的基底基板3，其中至少一部分周边形成得比中央部分薄。 通孔44至少形成在第一基板1或第二基板2中。

公开(公告)号：EP2173146A1

公开(公告)日：2010-04-07

申请号：EP07790801.0

申请日：2007-07-13

Applicant: Ibiden Co., Ltd.

Inventor： TAKAHASHI, Michimasa ,  AOYAMA, Masakazu

IPC: H05K3/46

CPC classification number: H05K3/4691 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/0052 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0909 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/1536

Abstract: A wiring board 19 is structured by laminating first substrate 1, second substrate 2 having a smaller mounting area than that of first substrate 1, and base substrate 3 formed between first substrate 1 and second substrate 2. The thickness of at least a portion of the periphery is made less than that of the central portion. Base substrate 3 is formed with resin containing inorganic filler, and first substrate 1 and second substrate 2 are formed with pliable resin. Vias 44 are formed in the first substrate 1 and the second substrate 2. An interlayer groove section 11 is formed between the first substrate 1 and the second substrate 2. In the interlayer groove section 11, gas or the like is filled.

Abstract translation: 布线板19通过层叠第一基板1，具有比第一基板1的安装面积小的第二基板2和形成在第一基板1和第二基板2之间的基底基板3而构成。 周边比中心部分小。 基材3由含有无机填料的树脂形成，第一基板1和第二基板2由柔韧的树脂形成。 通孔44形成在第一基板1和第二基板2中。在第一基板1和第二基板2之间形成层间槽部11.在层间槽部11中填充有气体等。

公开(公告)号：EP1845130A3

公开(公告)日：2010-04-07

申请号：EP07251536.4

申请日：2007-04-10

Applicant: E.I. DU PONT DE NEMOURS AND COMPANY

Inventor： Dueber, Thomas E. ,  Summers, John D. ,  Borland, William J. ,  Renovales, Olga L. ,  Majumdar, Diptarka ,  Amey, Daniel Irwin Jr.

IPC: C08L63/00 ,  C08L61/06 ,  C08G59/00 ,  H01L23/29

CPC classification number: H05K1/162 ,  C08G59/24 ,  C08G59/3218 ,  C08G59/621 ,  C08G59/686 ,  H01L23/293 ,  H01L2924/0002 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/09763 ,  H01L2924/00

Abstract: Compositions comprising: an epoxy containing cyclic olefin resin with a water absorption of 2% or less; one or more phenolic resins with water absorption of less than 2% or less; an epoxy catalyst; optionally one or more of an electrically insulated filler, a defoamer and a colorant and one or more organic solvents. The compositions are useful as encapsulants and have a cure temperature of 190°C or less.

公开(公告)号：EP2154939A1

公开(公告)日：2010-02-17

申请号：EP07743323.3

申请日：2007-05-14

Applicant: Ibiden Co., Ltd.

Inventor： TAKAHASHI, Michimasa ,  AOYAMA, Masakazu

IPC: H05K3/46

CPC classification number: H05K3/4691 ,  H05K3/0052 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2201/0191 ,  H05K2201/0209 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/1536

Abstract: Wiring board 19 is structured with first substrate 1, second substrate 2 having a smaller mounting area than that of first substrate 1, and base substrate 3 formed between first substrate 1 and second substrate 2. Also, wiring board 19 has vias 44 formed in at least either first substrate 1 or second substrate 2. In addition, wiring board 19 comprises interlayer groove portion 11 between first substrate 1 and second substrate 2. Interlayer groove portion 11 may be filled with at least one of gas, liquid, or solid material.

Abstract translation: 配线基板19由第一基板1，安装面积小于第一基板1的第二基板2，以及形成在第一基板1与第二基板2之间的基底基板3构成。另外，配线基板19具有形成于 第一基板1或第二基板2中的至少一个。另外，布线板19包括在第一基板1和第二基板2之间的层间凹槽部分11.层间凹槽部分11可以填充有气体，液体或固体材料中的至少一种。

公开(公告)号：EP2079291A1

公开(公告)日：2009-07-15

申请号：EP09156857.6

申请日：2000-09-01

Applicant: IBIDEN CO., LTD.

Inventor： Inagaki, Yasushi ,  Asai, Motoo ,  Wang, Dongdong ,  Yabashi, Hideo ,  Shirai, Seiji

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a thi rd res in substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract translation: 芯片电容器20设置在印刷电路板10的核心基板30中。这使得可以缩短IC芯片90与芯片电容器20之间的距离并减小回路电感。 由于核心基板30是通过在基板30c中以多层方式设置第一树脂基板30a，第二树脂基板30b和堤坝而构成的，所以核心基板30可以获得足够的强度。

公开(公告)号：EP1082732B1

公开(公告)日：2009-06-24

申请号：EP00906973.3

申请日：2000-01-20

Applicant: MOTOROLA, INC.

Inventor： LEE, Tien ,  LACH, Lawrence ,  DUNN, Gregory, J.

IPC: H05K1/16 ,  H01C1/01

CPC classification number: H05K1/167 ,  H05K3/0023 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09672 ,  H05K2201/09845 ,  H05K2201/10045 ,  H05K2203/0361 ,  Y10T29/49082

Abstract: A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).