公开(公告)号：EP2531640B1

公开(公告)日：2018-11-21

申请号：EP11708527.4

申请日：2011-02-02

申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives

发明人： VICARD, Dominique ,  BRUN, Jean

IPC分类号： D03D9/00 ,  D03D15/00 ,  D03D1/00 ,  H01L23/49 ,  H01L21/60 ,  H01L29/06 ,  H01L21/98 ,  H01L25/065

CPC分类号： H01L29/0657 ,  D03D1/0088 ,  D03D9/00 ,  D03D15/00 ,  D10B2401/16 ,  D10B2401/18 ,  D10B2501/00 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/4807 ,  H01L2224/49 ,  H01L2224/858 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01058 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/14 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/45099

公开(公告)号：EP1872387A4

公开(公告)日：2010-08-25

申请号：EP06739005

申请日：2006-03-20

申请人： MICRON TECHNOLOGY INC

发明人： HEMBREE DAVID R

IPC分类号： H01L23/49

CPC分类号： H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact. The semiconductor component can be used to form chip scale components, wafer scale components, stacked components, or interconnect components for electrically engaging or testing other semiconductor components.

摘要翻译： 用于通过导线互连制造半导体部件的方法包括提供具有电路侧，背面和贯通孔的基板的步骤。 该方法还包括以下步骤：将导线穿过通孔，在背面的导线上形成接触，在电路侧的导线上形成接合接触，然后将线从接合接触件断开。 通线互连包括通孔中的导线，背侧的触点和电路侧的接合触点。 背面的触点和电路侧的接合触点允许多个部件与相邻部件之间的电连接层叠。 用于执行该方法的系统包括具有通孔的基板和具有接合毛细管的引线接合器，所述接合毛细管被配置为使导线穿过通孔，并形成接触和接合接触。 半导体部件可用于形成用于电接合或测试其它半导体部件的芯片尺寸部件，晶片尺寸部件，堆叠部件或互连部件。

公开(公告)号：EP2195838A2

公开(公告)日：2010-06-16

申请号：EP08807066.9

申请日：2008-09-12

申请人： Toyota Jidosha Kabushiki Kaisha

发明人： TANAKA, Hiroaki

IPC分类号： H01L23/485 ,  H01L21/60 ,  H01L29/06 ,  H01L29/739

CPC分类号： H01L24/85 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/7397 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48458 ,  H01L2224/4846 ,  H01L2224/48471 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/4911 ,  H01L2224/78313 ,  H01L2224/78318 ,  H01L2224/85181 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device (2) includes: a (65) that is disposed on a field limiting ring (FLR) semiconductor substrate so as to divide the semiconductor substrate into an inner region and an outer region; a first bonding pad (24a to 24d) that is disposed in the inner region and is connected to an external circuit by a wire (14a to 14d) whose one end is connected to the external circuit; and a second bonding pad (26a to 26d) that is disposed in the outer region and on which the other end of the wire is bonded.

公开(公告)号：EP1927132A2

公开(公告)日：2008-06-04

申请号：EP06805805.6

申请日：2006-09-21

申请人： Infineon Technologies AG

发明人： KEMPER, Alfred ,  STROTMANN, Guido

IPC分类号： H01L21/48 ,  H01L21/607 ,  H05K3/32 ,  B23K20/10

CPC分类号： H05K3/328 ,  B23K20/10 ,  B23K2201/40 ,  H01L21/4853 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/072 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48458 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85099 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/19107 ,  H05K1/0306 ,  H05K3/4046 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2203/0285 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method for producing a power semiconductor module including forming a contact between a contact region and a contact element as an ultrasonic welding contact via a sonotrode. The ultrasonic welding operation also being used for joining the contact regions with the contact ends and consequently for joining the contacts and the foot regions.

摘要翻译： 一种用于制造功率半导体模块的方法，包括通过超声波焊接形成作为超声波焊接接点的接触区域和接触元件之间的接触。 超声波焊接操作也用于将接触区域与接触端部接合，并且因此用于接合触头和脚部区域。

公开(公告)号：EP0926721A2

公开(公告)日：1999-06-30

申请号：EP98120465.4

申请日：1998-10-29

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Schnabel, Rainer Florian ,  Ning, Xian J. ,  Spuler, Bruno

IPC分类号： H01L21/60 ,  H01L21/768

CPC分类号： H01L24/48 ,  H01L21/76804 ,  H01L21/76813 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05546 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/05042 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

摘要： An improved method of forming a bond pad (222) by performing a dual damascene etch through a layer stack (200) disposed above a substrate (204) using self aligned vias (216). The layer (200) stack includes an underlying conductive layer (208) and an insulating layer (202) disposed above the underlying conductive layer (208). The method includes the following operative steps. At least a via hole (216) is formed in the insulating layer (202) positioned over the underlying device layer (208) and extending to the underlying device layer (208) at the bottom of the via hole. A bond pad trench (218) is then formed that takes the form of the desired bond pad (222). A layer of conductive material (220) is then placed over the insulating layer (202) substantially simultaneously filling the via hole (216) and the bond pad trench (218). The bond pad (222) is then formed by removing the layer of conductive material (220) sufficient to expose the upper surface of the insulating layer (210).

公开(公告)号：EP0844664A2

公开(公告)日：1998-05-27

申请号：EP97120552.1

申请日：1997-11-24

申请人： Texas Instruments Incorporated

发明人： Efland, Taylor R. ,  Williams, Charles E. ,  Carter, Buford H.

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05073 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48458 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/85205 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2924/20754

摘要： A bond pad (18, 58) may comprise a base (20, 60) of bondable material. The base (20, 60) may have a periphery (26, 66). A segment of an interconnect (24, 64) may contact an extended section (28, 68) of the periphery (26, 66) to electrically couple the interconnect (24, 64) to the bond pad (18, 58). The interconnect (24, 64) may comprise a material less resistive than the bondable material.

摘要翻译： 接合垫（18,58）可以包括可结合材料的基底（20,60）。 基座（20,60）可以具有周边（26,66）。 互连部分（24,64）可以接触周边（26,66）的延伸部分（28,68），以将互连（24,64）电耦合到接合焊盘（18,58）。 互连（24,64）可以包括比可结合材料更小的电阻的材料。

公开(公告)号：EP0271110B1

公开(公告)日：1993-10-06

申请号：EP87118354.7

申请日：1987-12-10

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Usuda, Osamu c/o Patent Division

IPC分类号： H01L23/48

CPC分类号： H01L24/05 ,  H01L23/53223 ,  H01L23/53242 ,  H01L23/53247 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05172 ,  H01L2224/05181 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2924/00015 ,  H01L2924/01006

公开(公告)号：EP3410470A1

公开(公告)日：2018-12-05

申请号：EP18182981.3

申请日：2006-03-20

申请人： Micron Technology, Inc.

发明人： HEMBREE, David R.

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L25/065 ,  B23K20/00 ,  H05K3/40

CPC分类号： H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method for fabricating a semiconductor component (86) with a through wire interconnect (102) includes the step of providing a substrate (54) having a circuit side (62), a back side (64), and a through via (76). The method also includes the steps of: threading a wire (14) through the via (76), forming a contact (90) on the wire (14) on the back side (64), forming a bonded contact (92) on the wire (14) on the circuit side (62), and then severing the wire (14) from the bonded contact (92). The through wire interconnect includes (102) the wire (14) in the via (76), the contact (90) on the back side (64) and the bonded contact (92) on the circuit side (62). The contact (90) on the back side (64), and the bonded contact (92) on the circuit side (62), permit multiple components (86-1, 86-2, 86-3) to be stacked with electrical connections (170) between adjacent components. A system (120) for performing the method includes the substrate (54) with the via (76), and a wire bonder (10) having a bonding capillary (12) configured to thread the wire (14) through the via (76), and form the contact (90) and the bonded contact (92). The semiconductor component (86) can be used to form chip scale components, wafer scale components, stacked components (146), or interconnect components (861) for electrically engaging or testing other semiconductor components (156).

公开(公告)号：EP3401950A1

公开(公告)日：2018-11-14

申请号：EP18177442.3

申请日：2006-09-21

申请人： Infineon Technologies AG

发明人： Kemper, Alfred ,  Strotmann, Guido

IPC分类号： H01L21/48 ,  H01L21/607 ,  H05K3/32 ,  B23K20/10 ,  H01L25/07

CPC分类号： H05K3/328 ,  B23K20/10 ,  B23K2101/40 ,  H01L21/4853 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/072 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48458 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85099 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/19107 ,  H05K1/0306 ,  H05K3/4046 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2203/0285 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Vorgeschlagen wird ein Verfahren zum Herstellen eines Leistungshalbleitermoduls (1), bei welchem ein Kontakt (40 - 43) zwischen einem Kontaktbereich (20 - 23) und einem Kontaktelement (30 - 32) als Ultraschallschweißkontakt ausgebildet wird, indem eine Sonotrode (50), die für den Ultraschallschweißvorgang verwendet wird, auch zum Fügen der Kontaktbereiche (20 - 22) mit den Kontaktenden (33, 34) und mithin zum Fügen der Kontakte (40, 42) und der Fußbereiche (F, F1 - F3) verwendet wird.

公开(公告)号：EP0908944B1

公开(公告)日：2011-11-30

申请号：EP98402488.5

申请日：1998-10-07

申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives

发明人： Henaux, Stéphane

IPC分类号： H01L21/66

CPC分类号： H01L24/05 ,  G01R31/129 ,  H01L22/14 ,  H01L22/34 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/85399