摘要:
The generation and propagation of cracks in a connection to a connected member is prevented. A semiconductor device 10 is provided with a connection structure 15 between a bonding wire 17 consisting of an aluminum alloy which contains at least magnesium and silicon and in which a total of contents of the magnesium and the silicon is not less than 0.03 wt% but not more than 1.0 wt% and a silicon chip 16 to which this bonding wire 17 is connected. An aluminum-silicon film 16a is formed on the surface of the silicon chip 16. This connection structure 15 has a compound 18 containingmagnesium and silicon in a matrix layer 17a constituting the bonding wire 17, in a fine grain layer 17b of the aluminum alloy formed between the matrix layer 17a and the aluminum-silicon film 16a, and at an interface between the matrix layer 17a and the fine grain layer 17b.
摘要:
A light emitting device is provided having high luminous output while maintaining high wall plug efficiency, wherein the high thermal and electrical conductivity paths of the device are separated during the semiconductor wafer and die level manufacturing step. The device includes an electrical conducting mirror layer, which reflects at least 60% of generated light incident on it, and an isolation layer having electrical insulating properties and thermal conducting properties. A first electrode, which is not in contact with the main semiconductor layers of the device, is located on the mirror layer. A light emitting module, system and projection system incorporating the light emitting device are also described, as is a method of manufacture of the device.
摘要:
The invention relates to a method for wire bonding and a method for the production of a bonding connection. A bonding point (2, 20) is heated by means of a laser beam (4) originating from a laser. The arrangement (1) comprises a wedge-wedge-ultrasound-bonding device with a bonding needle (5), a copper or aluminium bonding wire guide (7) and a copper or aluminium wire (8) for a wedge-wedge-ultrasound-bonding method and at least one of the bonding points (2, 20) displays a hard metal covering (6).
摘要:
A lead frame (52, 100, 112) for a semiconductor device (die) package (50, 102, 110) is described. Each of the leads (60) in the lead frame (52, 100, 112) includes an interposer (64) having one end (66) disposed proximate the outer face (58) of the package (50, 102, 110) and another end (68) disposed proximate the die (14). Extending from opposite ends of the interposer (64) are a board connecting post (70) and a support post (74). A bond site (78) is formed on a surface of the interposer (64) opposite the support post (74). Each of the leads (60) is electrically connected to an associated input/output (I/O) pad (80) on the die (14) via wirebonding, tape bonding, or flip-chip attachment to the bond site (78). Where wirebonding is used, a wire electrically connecting the I/O pad (80) to the bond site (78) may be wedge bonded to both the I/O pad (80) and the bond site (78). The support post (74) provides support to the end (68) of the interposer (64) during the bonding and coating processes.(FIG. 3).
摘要:
A package for a semiconductor chip having the following features: (a) a power-supply layer, a ground layer, and a signal layer are formed in multilayer through intermediate layers including insulating layers; (b) the power-supply layer and ground layer each comprise an inner lead region exposed from the intermediate layers, an outer lead region, and a conductive region sandwiched by these two regions and covered by the intermediate layers; and (c) the conductive regions of the power-supply layer and ground layer consist of planar conductive members. The self-inductances of the power-supply and ground layers of this package are low, and the capacitance of the capacitor formed by these layers is low. Therefore, the noise of the power-supply system is little.
摘要:
Dispositif a semi-conducteur (10) comprenant un boitier non plaque metallurgiquement compatible. Le boitier comprend une zone de montage (2) de en alliage de cuivre sans placage (14) sur laquelle est fixee un de semi-conducteur (12). Le de semi-conducteur (12) est metallise sur sa surface de montage (40) pour assurer un contact electrique. Une soudure metallique (38) compatible aussi bien avec l'alliage de cuivre qu'avec la surface de metallisation du de relie le de (12) a la zone de montage de de (14). Le boitier comprend en outre une partie de conducteur en alliage de cuivre sans placage (16) reliee physiquement (42) a la zone de montage de de (14). La surface superieure du de semi-conducteur (12) est pourvue d'une couche de metallisation deposee selon un motif (24, 26) assurant le contact electrique avec des parties selectionnees du de. Le contact electrique entre la couche de metallisation de la surface superieure du de (24, 26) et la partie de conducteur (16) du boitier est realisee au moyen d'un ruban (28) de cuivre soude aux ultrasons. Le de (12) et le ruban d'interconnection (28) sont ensuite proteges par un element de scellement epoxyde (18) ou par un couvercle metallique soude (58).
摘要:
Die vorliegende Erfindung betrifft eine LTCC-Substratstruktur mit mindestens einem Kontaktelement zum Anschluss eines Drahtleiters, das eine erste, auf und/oder in dem keramischen Substrat angeordnete Metallisierung (20) zur elektrischen Verbindung mit dem Drahtleiter aufweist, wobei die erste Metallisierung (20) vorzugsweise Silber oder einer Silberlegierung enthält. Zur Vermeindung von Via-Posting oder eines Plattierungsprozesses sind eine die erste Metallisierung (20) überdeckende Diffusionssperrschicht (22), welche mit einem lokal wirkenden Aufbringungsverfahren hergestellt ist, und eine auf der Diffusionssperrschicht (22) angeordnete zweite Metallschicht (24) vorgesehen, wobei die zweite Metallschicht (24) vorzugsweise Gold und/oder Platin und/oder eine Legierung enthält, die mindestens eines dieser Elemente aufweist. Die Erfindung gibt außerdem ein Herstellungsverfahren für eine derartige LTCC-Substratstruktur an.
摘要:
A method for producing a power semiconductor module including forming a contact between a contact region and a contact element as an ultrasonic welding contact via a sonotrode. The ultrasonic welding operation also being used for joining the contact regions with the contact ends and consequently for joining the contacts and the foot regions.
摘要:
The invention provides a packaging structure applied to an automotive component having semiconductors (3, 4) and electronic parts mounted on a ceramic base (1), characterized in that the semiconductors and electronic parts are partly ore entirely sealed with a thixotropic silicone gel (10) which has a thixotropy index of about 1.5 - 3.6 and a penetration depth of about 6 - 10 mm and a rate of change in viscosity of less than 10 % of the initial value.