RESIST FORTIFICATION FOR MAGNETIC MEDIA PATTERNING
    2.
    发明申请
    RESIST FORTIFICATION FOR MAGNETIC MEDIA PATTERNING 有权
    用于磁介质图形的电阻强化

    公开(公告)号:US20140147700A1

    公开(公告)日:2014-05-29

    申请号:US14170009

    申请日:2014-01-31

    CPC classification number: G11B5/85 G11B5/743 G11B5/855

    Abstract: A method and apparatus for forming magnetic media substrates is provided. A patterned resist layer is formed on a substrate having a magnetically susceptible layer. A conformal protective layer is formed over the patterned resist layer to prevent degradation of the pattern during subsequent processing. The substrate is subjected to an energy treatment wherein energetic species penetrate portions of the patterned resist and conformal protective layer according to the pattern formed in the patterned resist, impacting the magnetically susceptible layer and modifying a magnetic property thereof. The patterned resist and conformal protective layers are then removed, leaving a magnetic substrate having a pattern of magnetic properties with a topography that is substantially unchanged.

    Abstract translation: 提供了一种形成磁性介质基板的方法和装置。 在具有磁敏感层的基板上形成图案化的抗蚀剂层。 在图案化的抗蚀剂层上形成保形层,以防止后续处理期间图案的劣化。 对衬底进行能量处理,其中能量物质根据形成在图案化抗蚀剂中的图案穿透图案化抗蚀剂和保形层的部分,撞击磁敏感层并改变其磁性。 然后去除图案化的抗蚀剂和共形保护层,留下具有基本上不变的形貌的磁性质图案的磁性基底。

    SEAMLESS GAP-FILL WITH SPATIAL ATOMIC LAYER DEPOSITION
    3.
    发明申请
    SEAMLESS GAP-FILL WITH SPATIAL ATOMIC LAYER DEPOSITION 审中-公开
    无缝隙填充空间原子层沉积

    公开(公告)号:US20150255324A1

    公开(公告)日:2015-09-10

    申请号:US14630757

    申请日:2015-02-25

    Abstract: Embodiments disclosed herein generally relate to forming dielectric materials in high aspect ratio features. In one embodiment, a method for filling high aspect ratio trenches in one processing chamber is disclosed. The method includes placing a substrate inside a processing chamber, where the substrate has a surface having a plurality of high aspect ratio trenches and the surface is facing a gas/plasma distribution assembly. The method further includes performing a sequence of depositing a layer of dielectric material on the surface of the substrate and inside each of the plurality of trenches, where the layer of dielectric material is on a bottom and side walls of each trench, and removing a portion of the layer of dielectric material disposed on the surface of the substrate, where an opening of each trench is widened. The sequence repeats until the trenches are filled seamlessly with the dielectric material.

    Abstract translation: 本文公开的实施方案通常涉及以高纵横比特征形成介电材料。 在一个实施例中,公开了一种用于在一个处理室中填充高纵横比沟槽的方法。 该方法包括将衬底放置在处理室内,其中衬底具有多个高纵横比沟槽的表面,并且该表面面向气体/等离子体分布组件。 该方法还包括执行在衬底的表面上以及多个沟槽的每一个内部沉积介电材料层的顺序,其中介电材料层位于每个沟槽的底部和侧壁上,并且移除部分 设置在基板的表面上的介电材料层,其中每个沟槽的开口被加宽。 该序列重复直到沟槽与电介质材料无缝填充。

    METHODS FOR SEAMLESS GAP FILLING OF DIELECTRIC MATERIAL

    公开(公告)号:US20230113965A1

    公开(公告)日:2023-04-13

    申请号:US17499955

    申请日:2021-10-13

    Abstract: A method for dielectric filling of a feature on a substrate yields a seamless dielectric fill with high-k for narrow features. In some embodiments, the method may include depositing a metal material into the feature to fill the feature from a bottom of the feature wherein the feature has an opening ranging from less than 20 nm to approximately 150 nm at an upper surface of the substrate and wherein depositing the metal material is performed using a high ionization physical vapor deposition (PVD) process to form a seamless metal gap fill and treating the seamless metal gap fill by oxidizing/nitridizing the metal material of the seamless metal gap fill with an oxidation/nitridation process to form dielectric material wherein the seamless metal gap fill is converted into a seamless dielectric gap fill with high-k dielectric material.

    ENHANCING ELECTRICAL PROPERTY AND UV COMPATIBILITY OF ULTRATHIN BLOK BARRIER FILM
    9.
    发明申请
    ENHANCING ELECTRICAL PROPERTY AND UV COMPATIBILITY OF ULTRATHIN BLOK BARRIER FILM 有权
    提高ULTRATHIN BLOK BARRIER膜的电气性能和UV兼容性

    公开(公告)号:US20160071724A1

    公开(公告)日:2016-03-10

    申请号:US14535803

    申请日:2014-11-07

    Abstract: Embodiments described herein generally relate to the formation of a UV compatible barrier stack. Methods described herein can include delivering a process gas to a substrate positioned in a process chamber. The process gas can be activated to form an activated process gas, the activated process gas forming a barrier layer on a surface of the substrate, the barrier layer comprising silicon, carbon and nitrogen. The activated process gas can then be purged from the process chamber. An activated nitrogen-containing gas can be delivered to the barrier layer, the activated nitrogen-containing gas having a N2:NH3 ratio of greater than about 1:1. The activated nitrogen-containing gas can then be purged from the process chamber. The above elements can be performed one or more times to deposit the barrier stack.

    Abstract translation: 本文描述的实施方案通常涉及形成与UV相容的阻挡层叠体。 本文所述的方法可以包括将处理气体输送到位于处理室中的基板。 工艺气体可以被活化以形成活化的工艺气体,活化的工艺气体在衬底的表面上形成阻挡层,阻挡层包括硅,碳和氮。 然后可以从处理室清除活化的工艺气体。 可以将活化的含氮气体输送到阻挡层,活性含氮气体的N 2 :NH 3比率大于约1:1。 然后可以将活化的含氮气体从处理室清除。 上述元件可以执行一次或多次以沉积势垒堆叠。

    VBD AND TDDB IMPROVEMENT THRU INTERFACE ENGINEERING
    10.
    发明申请
    VBD AND TDDB IMPROVEMENT THRU INTERFACE ENGINEERING 审中-公开
    VBD和TDDB改进THRU接口工程

    公开(公告)号:US20140273516A1

    公开(公告)日:2014-09-18

    申请号:US14173538

    申请日:2014-02-05

    Abstract: Methods for the repair of damaged low k films are provided. In one embodiment, the method comprises providing a substrate having a low k dielectric film deposited thereon, and exposing a surface of the low k dielectric film to an activated carbon-containing precursor gas to form a conformal carbon-containing film on the surface of the low k dielectric film, wherein the carbon-containing precursor gas has at least one or more Si—N—Si linkages in the molecular structure.

    Abstract translation: 提供修复损坏的低k膜的方法。 在一个实施例中,该方法包括提供其上沉积有低k电介质膜的基底,并将低k电介质膜的表面暴露于含活性炭的前体气体,以在该表面上形成共形含碳膜 低k电介质膜,其中含碳前体气体在分子结构中具有至少一个或多个Si-N-Si键。

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