公开(公告)号：US12094842B2

公开(公告)日：2024-09-17

申请号：US16360387

申请日：2019-03-21

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Walter Hartner ,  Maciej Wojnowski

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/31 ,  H01L23/66 ,  H01L29/06 ,  H01Q1/22

CPC classification number: H01L23/66 ,  H01L23/3114 ,  H01L23/5226 ,  H01L23/5227 ,  H01L24/19 ,  H01L24/20 ,  H01L29/0657 ,  H01Q1/2283 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/81203 ,  H01L2924/00014 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2224/83102 ,  H01L2924/00014

Abstract: A semiconductor device includes a semiconductor die having an active main surface and an opposite main surface opposite the active main surface. The semiconductor device further includes an antenna arranged on the active main surface of the semiconductor die and a recess arranged on the opposite main surface of the semiconductor die. The recess is arranged over the antenna.

公开(公告)号：US11798874B2

公开(公告)日：2023-10-24

申请号：US17456806

申请日：2021-11-29

Applicant: Infineon Technologies AG

Inventor： Walter Hartner ,  Francesca Arcioni ,  Tuncay Erdoel ,  Vincenzo Fiore ,  Helmut Kollmann ,  Arif Roni ,  Emanuele Stavagna ,  Christoph Wagner

IPC: H01L23/52 ,  H01L23/552 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00 ,  H01L23/528

CPC classification number: H01L23/49838 ,  H01L23/5283 ,  H01L23/5286 ,  H01L23/552 ,  H01L23/66 ,  H01L24/08 ,  H01L24/16 ,  H01L2223/6627 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/16238 ,  H01L2924/3025

Abstract: A semiconductor device includes a semiconductor chip including an electrical contact arranged on a main surface of the semiconductor chip, an external connection element configured to provide a first electrical connection between the semiconductor device and a printed circuit board, and an electrical redistribution layer extending in a direction parallel to the main surface of the semiconductor chip and configured to provide a second electrical connection between the electrical contact of the semiconductor chip and the external connection element. The electrical redistribution layer includes a ground line connected to a ground potential and a signal line configured to carry an electrical signal having a wavelength.

公开(公告)号：US20200006174A1

公开(公告)日：2020-01-02

申请号：US16447610

申请日：2019-06-20

Applicant: Infineon Technologies AG

Inventor： Christian GEISSLER ,  Walter Hartner ,  Claus Waechter ,  Maciej Wojnowski

IPC: H01L23/31 ,  H01L21/56

Abstract: A method comprises providing a least one semiconductor component, wherein each of the at least one semiconductor component comprises: a semiconductor chip, wherein the semiconductor chip comprises a first main surface and a second main surface opposite the first main surface, and a sacrificial layer arranged above the opposite second main surface of the semiconductor chip. The method further comprises encapsulating the at least one semiconductor component with an encapsulation material. The method further comprises removing the sacrificial material, wherein above each of the at least one semiconductor chip a cutout is formed in the encapsulation material. The method further comprises arranging at least one lid above the at least one cutout, wherein a closed cavity is formed by the at least one cutout and the at least one lid above each of the at least one semiconductor chip.

公开(公告)号：US08952521B2

公开(公告)日：2015-02-10

申请号：US13736553

申请日：2013-01-08

Applicant: Infineon Technologies AG

Inventor： Maciej Wojnowski ,  Walter Hartner ,  Ottmar Geitner ,  Gottfried Beer ,  Klaus Pressel ,  Mehran Pour Mousavi

IPC: H01L23/04 ,  H01L23/66 ,  H01L21/768 ,  H01L23/498 ,  H01Q1/22 ,  H01Q9/04 ,  H01Q9/16 ,  H01Q23/00 ,  H01L23/31

CPC classification number: H01L23/49816 ,  H01L21/568 ,  H01L21/76802 ,  H01L21/76885 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/17519 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/82101 ,  H01L2224/96 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/181 ,  H01Q1/2283 ,  H01Q9/0407 ,  H01Q9/16 ,  H01Q23/00 ,  H01L2224/19 ,  H01L2924/014 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01029 ,  H01L2924/01055 ,  H01L2924/01064 ,  H01L2924/01044 ,  H01L2924/01042 ,  H01L2924/01015 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/00

Abstract: In one embodiment of the present invention, a semiconductor package includes a substrate having a first major surface and an opposite second major surface. A chip is disposed in the substrate. The chip includes a plurality of contact pads at the first major surface. A first antenna structure is disposed at the first major surface. A reflector is disposed at the second major surface.

Abstract translation: 在本发明的一个实施例中，半导体封装包括具有第一主表面和相对的第二主表面的衬底。 芯片设置在基板中。 芯片包括在第一主表面处的多个接触垫。 第一天线结构设置在第一主表面处。 反射器设置在第二主表面处。

公开(公告)号：US11764453B2

公开(公告)日：2023-09-19

申请号：US17302468

申请日：2021-05-04

Applicant: Infineon Technologies AG

Inventor： Walter Hartner ,  Bernhard Rieder

IPC: H01P5/107 ,  H01P5/02 ,  H01L23/66

CPC classification number: H01P5/107 ,  H01L23/66 ,  H01P5/02 ,  H01L2223/6627

Abstract: A radio-frequency device comprises an encapsulation material and a radio-frequency chip embedded into the encapsulation material, wherein the radio-frequency chip has a first main surface and a second main surface. The radio-frequency device furthermore comprises an electrical redistribution layer arranged over the first main surface of the radio-frequency chip and the encapsulation material, and a radio-frequency antenna formed in the redistribution layer and configured to emit signals in a direction pointing from the second main surface to the first main surface and/or to receive signals in a direction pointing from the first main surface to the second main surface. The radio-frequency device furthermore comprises a microwave component having an electrically conductive wall structure, the microwave component being arranged below the radio-frequency antenna and embedded into the encapsulation material.

公开(公告)号：US10607911B2

公开(公告)日：2020-03-31

申请号：US14997596

申请日：2016-01-18

Applicant: Infineon Technologies AG

Inventor： Martin Richard Niessner ,  Walter Hartner ,  Gerhard Haubner ,  Sebastian Pahlke

IPC: H05K7/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/52 ,  H05K1/02 ,  H05K1/18 ,  H01L23/14 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00

Abstract: A chip carrier for carrying an encapsulated electronic chip, wherein the chip carrier comprises a laminate structure formed as a stack of a plurality of electrically insulating structures and a plurality of electrically conductive structures, and a chip coupling area at an exposed surface of the laminate structure being configured for electrically and mechanically coupling the encapsulated electronic chip, wherein one of the electrically insulating structures is configured as high frequency dielectric made of a material being compatible with low-loss transmission of a high-frequency signal, and wherein at least one of another one of the electrically insulating structures and one of the electrically conductive structures is configured as a thermomechanical buffer for buffering thermally induced mechanical load.

公开(公告)号：US20170309582A1

公开(公告)日：2017-10-26

申请号：US15496477

申请日：2017-04-25

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Walter Hartner ,  Maciej Wojnowski

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/522 ,  H01L23/31 ,  H01Q1/22 ,  H01L29/06

CPC classification number: H01L23/66 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5226 ,  H01L23/5227 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L29/0657 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01Q1/2283 ,  H01L2924/00014

Abstract: A semiconductor device includes a semiconductor die having an active main surface and an opposite main surface opposite the active main surface. The semiconductor device further includes an antenna arranged on the active main surface of the semiconductor die and a recess arranged on the opposite main surface of the semiconductor die. The recess is arranged over the antenna.

公开(公告)号：US20170288176A1

公开(公告)日：2017-10-05

申请号：US15628682

申请日：2017-06-21

Applicant: Infineon Technologies AG

Inventor： Gottfried Beer ,  Walter Hartner

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/538 ,  H01Q1/22 ,  H01Q23/00 ,  H01L23/31 ,  H01L23/66 ,  H01L25/10 ,  H01L25/16

CPC classification number: H01L24/82 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5226 ,  H01L23/5384 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05599 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1423 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/207 ,  H01Q1/2283 ,  H01Q23/00 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A method for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate; placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip; and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad.

公开(公告)号：US20170213800A1

公开(公告)日：2017-07-27

申请号：US15480751

申请日：2017-04-06

Applicant: Infineon Technologies AG

Inventor： Ernst Seler ,  Maciej Wojnowski ,  Walter Hartner ,  Josef Boeck

IPC: H01L23/66 ,  H01Q13/08 ,  H01L23/538 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/96 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/12042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01Q13/08 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device package includes placing a semiconductor chip on a carrier, covering the semiconductor chip with an encapsulation material to form an encapsulation body, providing a microwave component having at least one electrically conducting wall structure integrated in the encapsulation body, and forming an electrical interconnect configured to electrically couple the semiconductor chip and the microwave component.

公开(公告)号：US20160247780A1

公开(公告)日：2016-08-25

申请号：US15146090

申请日：2016-05-04

Applicant: Infineon Technologies AG

Inventor： Ernst Seler ,  Maciej Wojnowski ,  Walter Hartner ,  Josef Boeck

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/66

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/96 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/12042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01Q13/08 ,  H01L2924/00

Abstract: A method of manufacturing an array of semiconductor device packages includes placing a plurality of semiconductor chips on a temporary carrier, covering the plurality of semiconductor chips with an encapsulation material to form an encapsulation body, providing a plurality of microwave components each including at least one electrically conducting wall structure integrated in the encapsulation body, forming a plurality of electrical interconnects each configured to electrically couple a semiconductor chip and a microwave component, and separating the encapsulation body into single semiconductor device packages each including a semiconductor chip, a microwave component and an electrical interconnect.

Abstract translation: 制造半导体器件封装阵列的方法包括将多个半导体芯片放置在临时载体上，用封装材料覆盖多个半导体芯片以形成封装体，提供多个微波元件，每个微波元件包括至少一个电 导电壁结构集成在封装体中，形成多个电互连，每个电互连配置成电耦合半导体芯片和微波部件，并将封装体分离成单个半导体器件封装，每个半导体器件封装包括半导体芯片，微波部件和电 互连。